JPS5827216A - Switching regulator - Google Patents

Switching regulator

Info

Publication number
JPS5827216A
JPS5827216A JP12569681A JP12569681A JPS5827216A JP S5827216 A JPS5827216 A JP S5827216A JP 12569681 A JP12569681 A JP 12569681A JP 12569681 A JP12569681 A JP 12569681A JP S5827216 A JPS5827216 A JP S5827216A
Authority
JP
Japan
Prior art keywords
winding
main transformer
diode
load
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12569681A
Other languages
Japanese (ja)
Inventor
Koichi Horigami
堀上 江一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12569681A priority Critical patent/JPS5827216A/en
Publication of JPS5827216A publication Critical patent/JPS5827216A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To reduce losses of a snubber circuit by providing a separate winding in the secondary winding of a conversion transformer and connecting a rectifying/smoothing circuit that works when a switching transistor is off on the separate winding. CONSTITUTION:A DC power source 1 is supplied to a main transformer 3 through a switching transistor 2, and at the same time, energy is supplied from a smoothing choke 13 connected to the secondary winding of the main transformer 3 to load 15. A snubber circuit consisting of aondenser 7, a resistance 8 and a diode 9 is connected to the collector of the switching transistor 2. A separate winding 21 is provided in the secondary side of the main transformer, and rectifying/smoothing circuits 22, 23 that a diode 22 conducts when the transistor 2 is off are connected. By this way, the fly-back power of the main transformer 3 is supplied to a load 24, and the power consumption of the snubber circuit can be reduced.

Description

【発明の詳細な説明】 本発明はフォワード型のスイッチングレギュレータに関
するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a forward type switching regulator.

フォワード型スイッチングレギュレータにおいては、主
トランジスタのオフ時に発生する主トランスのフライバ
ック電圧および励磁エネルギーの放散の為に、主トラン
スには帰還巻線およびスナバ−回路を設けている。その
従来例を第1図に示す。同図において、主トランジスタ
2がオンしたときに直流電源1より電流が流れ、主トラ
ンス301次巻線4に電圧が発生し、2次巻線6に電圧
が誘起され、ダイオード11が順方向にバイアスされ、
負荷16にエネルギーが供給される。そのとき同時にチ
ョークトランス13に励磁エネルギーが蓄積される。次
に主トランジスタ2がオフになると、主トランス3の各
巻線には逆電圧が誘起され、ダイオード10はj@力方
向バイアスされ。
In a forward switching regulator, the main transformer is provided with a feedback winding and a snubber circuit in order to dissipate the flyback voltage and excitation energy of the main transformer that occurs when the main transistor is off. A conventional example is shown in FIG. In the figure, when the main transistor 2 is turned on, a current flows from the DC power supply 1, a voltage is generated in the primary winding 4 of the main transformer 30, a voltage is induced in the secondary winding 6, and the diode 11 is turned on in the forward direction. biased,
Energy is supplied to the load 16. At the same time, excitation energy is accumulated in the choke transformer 13. Next, when the main transistor 2 is turned off, a reverse voltage is induced in each winding of the main transformer 3, and the diode 10 is biased in the j@ force direction.

励磁エネルギーの一部は電源1g40に帰還されるが。A part of the excitation energy is fed back to the power supply 1g40.

ダイオード9を通じてコンデンサ7にも充電電流が流れ
る。この充電電流により、トランジスタ2のオフ時に発
生するスパイク状電圧を吸収するが、コンデンサ7に充
電されたエネルギーはトランジスタ2のオフ期間に放散
する必要があるため、現在は抵抗8を通じて損失として
消費するだけであり、これは効率の低下をもたらし、ま
だ、抵抗8として電力型抵抗を用いる必要があった。
A charging current also flows through the capacitor 7 through the diode 9 . This charging current absorbs the spike voltage that occurs when transistor 2 is off, but the energy charged in capacitor 7 needs to be dissipated during the off period of transistor 2, so it is currently consumed as a loss through resistor 8. This resulted in a decrease in efficiency, and it was still necessary to use a power type resistor as the resistor 8.

本発明は上記従来回路における問題点を解決するように
したものである。以下1本発明を図示の実施例に基いて
説明するが、第1図で説明したものと同様のものは同一
の符号を付して表わしている。第2図は本発明の第1の
実施例の回路図である。この実施例は、主トランス3に
別巻線21を設け、トランジスタ2がオフ時にダイオー
ド22が順方向にバイアスされるように結線することに
より、また、1次巻線4と別巻線210巻線数比を適当
に選ぶことにより、所望の電圧を持った別出力をコンデ
ンサ23の両端に得ることができる。
The present invention is intended to solve the problems in the conventional circuits described above. Hereinafter, one embodiment of the present invention will be explained based on an illustrated embodiment, and parts similar to those explained in FIG. 1 are denoted by the same reference numerals. FIG. 2 is a circuit diagram of a first embodiment of the present invention. In this embodiment, the main transformer 3 is provided with a separate winding 21 and connected so that the diode 22 is biased in the forward direction when the transistor 2 is off. By choosing the ratio appropriately, a separate output with the desired voltage can be obtained across the capacitor 23.

なお、図中の24は負荷を表わす。上記別出力は。Note that 24 in the figure represents a load. The above output is different.

主トランス3のフライバック電力を利用して供給される
だめ、従来のスナバ−回路、即ちコンデンザ了と抵抗8
およびダイオード9によって消費される電力を軽減する
ことができる。
A conventional snubber circuit, namely a capacitor and a resistor 8, is used to supply the flyback power of the main transformer 3.
In addition, the power consumed by the diode 9 can be reduced.

以上のようにこの第1の実施例においては、主トランス
のフライバック電力を利用することにより簡易に別出力
が得られ、かつ、スナバ−回路の損失を低減することが
できる。
As described above, in this first embodiment, by using the flyback power of the main transformer, another output can be easily obtained and the loss of the snubber circuit can be reduced.

第3図に本発明の第2の実施例を示す。この第2の実施
例は、別巻線21とダイオード22およびコンデンサ2
3によって得たフライバック電圧をトランジスタ31お
よびコンデンサ32を用いて安定化し、負荷24に電力
を供給するように構成したものである。即ち、この第2
の実施例は。
FIG. 3 shows a second embodiment of the invention. This second embodiment has a separate winding 21, a diode 22 and a capacitor 2.
The flyback voltage obtained in step 3 is stabilized using a transistor 31 and a capacitor 32, and power is supplied to a load 24. That is, this second
An example of this is.

第2図に示した第1の実施例によって得られる別出力に
対し、より安定化を図ったものである。
This output is more stable than the separate output obtained by the first embodiment shown in FIG.

第4図に本発明の第3の実施2例を示す。この1第4図
においては、別巻線21およびダイオード22により主
トランス3のフライバック電力はコンデンサ41とコン
デンサ46および負荷24に供給される。また、トラン
ジスタ43は第6図(b)に示すベース電圧で駆動する
ことにより、コンデンサ41の電荷を放電し、抵抗42
で消費する。
FIG. 4 shows two third embodiments of the present invention. In FIG. 4, the flyback power of the main transformer 3 is supplied to a capacitor 41, a capacitor 46, and a load 24 by a separate winding 21 and a diode 22. Further, by driving the transistor 43 with the base voltage shown in FIG. 6(b), the electric charge of the capacitor 41 is discharged, and the resistor 42
Consume with.

この放電回路はダイオード44によりコンデンサ46の
電荷の放電には影響せず、丑だ、コンデンサ41はトラ
ンジスタ2のターンオフ時のスパイク状電圧のみを吸収
するに必要な容量であればよく、コンデンサ46に比べ
て充分に小さな容量でよい。従って抵抗42で消費され
る電力は第1図に示した従来例に比べて少くて済む。
In this discharge circuit, the diode 44 does not affect the discharge of the charge in the capacitor 46, and the capacitor 41 only needs to have the capacity necessary to absorb only the spike voltage when the transistor 2 is turned off. A sufficiently small capacity is sufficient in comparison. Therefore, less power is consumed by the resistor 42 than in the conventional example shown in FIG.

以上のように第4図に示した第3の実施例により、従来
回路における1次側スナバ−回路は、2次側に設けた低
消費電力スナバ−回路を用いることにより不要となり、
効率の改善が図られる。
As described above, according to the third embodiment shown in FIG. 4, the primary side snubber circuit in the conventional circuit becomes unnecessary by using the low power consumption snubber circuit provided on the secondary side.
Efficiency will be improved.

以上のように本発明によれば、スナバ−回路における消
費電力の低減が図られ、回路効率の改善が可能であり、
また、得られた別出力は制御回路等のバイアス電源とし
て利用され得る。さらに、第3図に示した第2の実施例
と第4図に示した第3の実施例を組合せることにより、
第6図に示すような第4の実施例も実現可能であり、第
2の実施例および第3の実施例よりも、さらに高効率で
安定した別出力を得ることが可能である。なお、を一体
とした単一出力を得ることも可能である。
As described above, according to the present invention, power consumption in a snubber circuit can be reduced, circuit efficiency can be improved,
Further, the obtained separate output can be used as a bias power source for a control circuit or the like. Furthermore, by combining the second embodiment shown in FIG. 3 and the third embodiment shown in FIG.
A fourth embodiment as shown in FIG. 6 is also possible, and it is possible to obtain a separate output that is more efficient and stable than the second and third embodiments. Note that it is also possible to obtain a single output that combines the two.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のフォワード型スイッチングレギュレータ
の回路図、第2図、第3図および第4図はそれぞれ本発
明の第1.第2.第3の実施例の回路図、第6図(a)
 * (b)は第4図のトランジスタの動作波形図、第
6図は本発明の第4の実施例の回路図である。 1・・・・・・直流電源、2・・・・・主トランジスタ
、3・・・・・・主トランス、4・・・・・・主トラン
スの1次巻線、6・・−・・・主トランスの帰還巻線、
6・・・・・・主トランスの2次巻線、7.14,23
,41,45・・・・・・・コンデンサ、8,42・・
・・・・抵抗、9,10゜11.12,22,44.・
・・・・・ダイオード、13・・・・・チョークトラン
ス、21・・・・・・主トランスの別巻線、15,24
・・・・・・負荷、31,43,51・・・・・・トラ
ンジスタ。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第 
3rIII 第4図 第5図 第6図
FIG. 1 is a circuit diagram of a conventional forward type switching regulator, and FIGS. 2, 3, and 4 are a circuit diagram of a conventional forward switching regulator. Second. Circuit diagram of the third embodiment, FIG. 6(a)
*(b) is an operating waveform diagram of the transistor shown in FIG. 4, and FIG. 6 is a circuit diagram of a fourth embodiment of the present invention. 1... DC power supply, 2... Main transistor, 3... Main transformer, 4... Primary winding of main transformer, 6...・Feedback winding of main transformer,
6... Secondary winding of main transformer, 7.14, 23
, 41, 45... Capacitor, 8, 42...
...Resistance, 9,10°11.12,22,44.・
... Diode, 13 ... Choke transformer, 21 ... Separate winding of main transformer, 15, 24
...Load, 31, 43, 51...Transistor. Name of agent: Patent attorney Toshio Nakao and 1 other person
3rIII Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】[Claims] 1次巻線、2次巻線、帰還巻線および別巻線を有する主
トランスと、直流電源に対してコレクタ・エミツタ路が
前記1次巻線と直列にして接続された主トランジスタと
、前記直流電源に対して前記帰還巻線と直列にして逆バ
イアスとなるごとく接続された第1のダイオードと、前
記1次巻線に対し並列に接続されたコンデンサと抵抗の
並列回路と第2のダイオードとの直列接続回路と、前記
2次巻線から得られる出力を整流および平滑して第1の
負荷に供給する第1の給電回路と、前記別巻線から得ら
れる出力を整流および平滑して第2の負荷に供給する第
2の給電回路を具備してなるスイッチングレギュレータ
a main transformer having a primary winding, a secondary winding, a feedback winding and a separate winding; a main transistor having a collector-emitter path connected to the DC power source in series with the primary winding; a first diode connected to the power supply in series with the feedback winding so as to be reverse biased; a parallel circuit of a capacitor and a resistor connected in parallel to the primary winding; and a second diode. a first power supply circuit that rectifies and smoothes the output obtained from the secondary winding and supplies it to the first load; and a second power supply circuit that rectifies and smoothes the output obtained from the separate winding. A switching regulator comprising a second power supply circuit that supplies the load to the load.
JP12569681A 1981-08-10 1981-08-10 Switching regulator Pending JPS5827216A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12569681A JPS5827216A (en) 1981-08-10 1981-08-10 Switching regulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12569681A JPS5827216A (en) 1981-08-10 1981-08-10 Switching regulator

Publications (1)

Publication Number Publication Date
JPS5827216A true JPS5827216A (en) 1983-02-17

Family

ID=14916440

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12569681A Pending JPS5827216A (en) 1981-08-10 1981-08-10 Switching regulator

Country Status (1)

Country Link
JP (1) JPS5827216A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021225577A1 (en) * 2020-05-04 2021-11-11 Power Integrations, Inc. Voltage shaping circuit with diodes of various recovery times

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021225577A1 (en) * 2020-05-04 2021-11-11 Power Integrations, Inc. Voltage shaping circuit with diodes of various recovery times

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