JPS5826694B2 - Hatsushin Cairo - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an oscillation circuit, and by configuring it using IIL (Integrated Injection Logic) gates, it can be made into an IC (Integrated Circuit) with a high degree of integration and has extremely low power consumption. The purpose is to provide an oscillation circuit that can operate.

FIG. 1 shows a specific example of a conventional oscillation circuit.

This oscillation circuit is an IC-based astable multi-by-break, and as is well known, outputs a rectangular wave of a predetermined pulse width from output terminals 1 and 2, respectively.

That is, first, when the transistor T1 is on and the transistor T2 is off, the capacitor C2 generates a DC voltage ■ through the resistor R2.

0 is applied and charged, and when a predetermined level is reached, the collector current of the transistor T1 instantly becomes zero due to the positive feedback effect of the circuit, and the transistor T1 is turned off.

At the same time, transistor T2 is turned on.

Next, DC voltage ■.

Charging of the capacitor C1 begins with C being applied through the resistor R1, and the transistor T is turned on and the transistor T2 is turned off in the same way as above.

Thereafter, the same operation as above is repeated. The transistor T1. The collector output of T2 is led to output terminals 1 and 2 through transistors T3 and T4 forming emitter followers, respectively.

However, the above-mentioned conventional oscillation circuits require high voltage and large power for operation, and due to various reasons such as power consumption, temperature rise on the chip surface, and the need for a large amount of load resistance, it is difficult to achieve high integration when integrated into an IC. There were drawbacks such as the inability to configure the

The present invention eliminates the above-mentioned drawbacks, and one embodiment thereof will be described below in conjunction with FIGS. 2 and 3.

FIG. 2 shows a specific circuit diagram of an embodiment of the oscillation circuit according to the present invention, and FIG. 3 shows a basic circuit diagram of an example of the IIL gate used in FIG.

The IIL (or l2L) gate operates as a current source and is called an injector, as shown in Figure 3.
A transistor Tj and a multi-collector NPN transistor Tr supplied with base current from the transistor Tj.
It is composed of.

The base of the transistor Tr is connected to the collector of the transistor Tj, and the emitters of the transistor Tr are commonly connected to the base of the transistor Tj.

A digital signal input from the input terminal 3 has its polarity inverted by the transistor Tr, and is guided to output terminals 4, 5.6 whose collectors are respectively connected.

This IIL gate is a highly integrated IC that does not include a resistor and operates at low voltage and low power.

In FIG. 2, G1. G2. G3 and G4 are the third
In the IIL gate explained in the figure, injector Tj1. T
j2. Tj3 and Tj, and multi-collector transistor Tr1. Tr2. It is composed of T, 3 and Tr4.

Furthermore, the bases of the transistors Tr1 and Tr2 are NP.
N) Connected to the collectors of transistors Ta and Tb, respectively.

The emitters of the transistors Ta and Tb are connected to the emitters of the transistors Tr1 and Trl, respectively.

A capacitor Ca and a variable resistor Ra are connected in series between the collector of the transistor Ta and the positive DC voltage power supply terminal 7. Similarly, a capacitor Cb is connected between the collector of the transistor Tb and the power supply terminal 7. and variable resistor Rb are connected in series.

Here, the power supply voltage V from the power supply terminal 7.

0 is about 0.7 volts.

Further, the variable resistors Ra and Rb are linked in order to make the oscillation time constants the same.

Further, the collector of the transistor Trl is connected to the base of the transistor Tr3, and the collector of the transistor Tr2 is connected to the base of the transistor Tr4.

The emitters of the transistors (injectors) Tj1 to Tj3 are commonly connected to the power supply terminal 7.

Further, the base of the transistor Ta is connected to the connection point between the variable resistor Rb and the capacitor Cb, and the base of the transistor Tb is connected to the connection point between the variable resistor Ra and the capacitor Ca.

The variable resistors Ra, Rb1 capacitors Ca and Cb are externally attached when the circuit of this embodiment is integrated.

In the above configuration circuit, its operation is substantially the same as a general astable multi-by-break.

That is, first, when transistor T is on and transistor Tb is off, capacitor Ca is connected to resistor R.
is charged through a, and when it is charged to the power supply voltage ■Co, it turns on the transistor Tb, and the transistor Tb
The collector potential of T becomes approximately the ground level, and at the same time, the transistor Ta is turned off.

As a result, the transistor Tr1 becomes the injector Tj1
On the other hand, the transistor Tr2 is turned off due to no base current flowing through it due to the transistor Tb being turned on.

Next, the capacitor Cb is charged through the resistor Rb in the same manner as above, and the power supply voltage becomes ■.

When charged to 0, the transistor Ta turns on, and at the same time, the transistor Tb turns off.

Therefore, the transistor Tr2 is turned on by being supplied with the base current from the injector Tj2, and the transistor T
ri is turned off.

Thereafter, the same operation is repeated.

Therefore, transistor Tr1. Rectangular waves having mutually opposite phases are generated from the collector of Tr2 and supplied to the bases of transistors Tr 3 j and Tr4 constituting IIL gates G3 and G4, respectively.

As a result, a rectangular wave with a desired period is guided from each collector of the transistor Tr3 to the output terminals 81, 8□, and 83, while a rectangular wave having an opposite phase to this rectangular wave is guided to the transistor Tr4.
are led to output terminals 91, 92, and 93 from each collector.

Here, the above IIL gate G3. G4 is provided to obtain a desired current gain, and is not necessarily required to achieve the intended purpose of the present invention.

Furthermore, in the oscillation circuit shown in FIG. 2, the variable resistor R
The oscillation time constant of the product of the resistance value of a and the capacitance value of the capacitor Ca is equal to the oscillation time constant of the product of the resistance value of the variable resistor Rb and the capacitance value of the capacitor Cb.

Furthermore, by varying the resistance values of the variable resistors Ra and Rb while keeping them equal to each other, the cycle of the output rectangular wave can be arbitrarily varied (provided that the capacitance values of the capacitors C1 and C2 are equal to each other). ).

As described above, the oscillation circuit according to the present invention includes at least first and second IIL gates having first and second multi-collector transistors whose emitters are commonly connected;
The respective collectors are connected to the bases of the first and second multi-collector transistors, and the emitters are connected to the bases of the first and second multi-collector transistors.
first and second transistors commonly connected to the emitter of the multi-collector transistor; a first capacitive element connected between the collector of the first transistor and the base of the second transistor; a second capacitive element connected between the collector of the second transistor and the base of the first transistor; and a first capacitive element connected between the bases of the first and second transistors and the power supply, respectively.
and a second resistor element, it can operate with low power and voltage (approximately 0.7 volts), and is highly integrated.
It has the advantage that it can be used as a pulse generation circuit, a pulse modulation circuit, etc.

[Brief explanation of the drawing]

FIG. 1 is a specific circuit diagram of an example of a conventional oscillation circuit, FIG. 2 is a specific circuit diagram of an embodiment of an oscillation circuit according to the present invention, and FIG. 3 is an IIL gate used in FIG. FIG. 1 is a basic circuit diagram of an example of a gate. T4~T4...NPN transistor, Tj, Tj, ~
Tj4...PNP transistor (injector),
Tr. Tr□~Tr4...Multi-collector NPNI-transistor, T8°Tb...NPN transistor, 01~G
4...IIL gate.

Claims (1)

[Claims] 1 At least first and second multi-collector transistors having first and second multi-collector transistors whose emitters are commonly connected
and first and second transistors whose respective collectors are connected to the bases of the first and second multi-collector transistors and whose emitters are commonly connected to the emitters of the first and second multi-collector transistors. and a first capacitive element connected between the collector of the first transistor and the base of the second transistor, and the collector of the second transistor and the base of the first transistor. a connected second capacitive element;
and first and second resistance elements connected between the base of the second transistor and a power supply, respectively.