JPS5823946B2 - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5823946B2
JPS5823946B2 JP51152464A JP15246476A JPS5823946B2 JP S5823946 B2 JPS5823946 B2 JP S5823946B2 JP 51152464 A JP51152464 A JP 51152464A JP 15246476 A JP15246476 A JP 15246476A JP S5823946 B2 JPS5823946 B2 JP S5823946B2
Authority
JP
Japan
Prior art keywords
semiconductor substrate
conductive plate
external
cathode electrode
external electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP51152464A
Other languages
Japanese (ja)
Other versions
JPS5376684A (en
Inventor
徳能太
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP51152464A priority Critical patent/JPS5823946B2/en
Publication of JPS5376684A publication Critical patent/JPS5376684A/en
Publication of JPS5823946B2 publication Critical patent/JPS5823946B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Landscapes

  • Die Bonding (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 この発明は、半導体基体と外部電極との間に外部電極に
対する位置決めを必要とする導電板を有する半導体装置
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having a conductive plate between a semiconductor substrate and an external electrode that requires positioning with respect to the external electrode.

第1図は、半導体基体と外部電極との間に導電板を有す
る従来の平形サイリスクの縦断面図である。
FIG. 1 is a longitudinal cross-sectional view of a conventional flat silicon risk having a conductive plate between a semiconductor substrate and an external electrode.

第1図において、1は外部陽極電極、2は半導体基体、
3は半導体基体2と後述の外部陰極電極との間に配設さ
れモリブデンなどよりなる導電板、4は外部陰極電極、
5はコイルバネ、6はゲートリード支持体、7はゲート
リード、8は絶縁物よりなるゲートスリーブである。
In FIG. 1, 1 is an external anode electrode, 2 is a semiconductor substrate,
3 is a conductive plate made of molybdenum or the like and disposed between the semiconductor substrate 2 and an external cathode electrode to be described later; 4 is an external cathode electrode;
5 is a coil spring, 6 is a gate lead supporter, 7 is a gate lead, and 8 is a gate sleeve made of an insulator.

この場合、外部陰極電極4と導電板3との位置決めは、
コイルバネ5によって外部陰極電極4の凹部の底面より
支持されるゲートリード支持体6によって行われるが、
導電板3の図の上下方向の運動可能距離に比べて、導電
板3の厚さが不十分であるため、導電板3が、外部陰極
電極4の最上面(第1図に示すA)とゲートリ−ド支持
体6の最上面(第1図に示すB)との間のわずかな間隙
を乗り超えて、ゲートリード支持体6と半導体基体2と
の間に入り込み、ゲートリード7と半導体基体2との接
触が不完全になるという現象が起ることがあった。
In this case, the positioning of the external cathode electrode 4 and the conductive plate 3 is as follows:
This is done by a gate lead support 6 supported from the bottom of the recess of the external cathode electrode 4 by a coil spring 5.
Since the thickness of the conductive plate 3 is insufficient compared to the vertical movable distance of the conductive plate 3, the conductive plate 3 does not touch the top surface of the external cathode electrode 4 (A shown in FIG. 1). It crosses over a slight gap between the top surface of the gate lead support 6 (B shown in FIG. 1), enters between the gate lead support 6 and the semiconductor substrate 2, and connects the gate lead 7 and the semiconductor substrate. The phenomenon of incomplete contact with 2 sometimes occurred.

この発明は、導電板の移動を制限する係合体を外部陰極
電極の凹部にそう人することにより、上述の欠点を除去
した半導体装置を提供することを目的としたものである
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device in which the above-mentioned drawbacks are eliminated by providing an engaging body for restricting the movement of a conductive plate in a recessed portion of an external cathode electrode.

以下図面にもとずいてこの発明を説明する。The present invention will be explained below based on the drawings.

第2図は、この発明を平形サイリスクに適用した一実施
例の縦断面図である。
FIG. 2 is a longitudinal cross-sectional view of an embodiment in which the present invention is applied to a flat silisk.

第2図において、9は半導体基体2側の寸法が外部陰極
電極4側の寸法より大きくなっている開孔を有する導電
板、10は導電板9の開孔と係合する係合部であるつば
状部を有し外部陰極電極4の凹部にそう人されて導電板
9の移動を制限する係合体であるコツプ状体である。
In FIG. 2, 9 is a conductive plate having an opening whose dimensions on the semiconductor substrate 2 side are larger than those on the external cathode electrode 4 side, and 10 is an engaging portion that engages with the opening in the conductive plate 9. It is a tip-shaped body having a flange-like part and serving as an engaging body that is inserted into the recessed part of the external cathode electrode 4 and restricts the movement of the conductive plate 9.

第3図および第4図はそれぞれ導電板10の開孔の一例
を示す斜視図、第5図は係合部がつば状になっているコ
ツプ状体10の斜視図である。
FIGS. 3 and 4 are perspective views showing examples of openings in the conductive plate 10, and FIG. 5 is a perspective view of the pot-like body 10 in which the engaging portion is shaped like a brim.

実施例の平形サイリスクの組立方法の概略を説明すると
下記の通りである。
An outline of the method for assembling the flat-shaped silisk according to the embodiment is as follows.

まず導電板9にコツプ状体10をそう人する、次に、コ
イルバネ5をコツプ状体10の内部に入れる。
First, the tip 10 is placed on the conductive plate 9, and then the coil spring 5 is placed inside the tip 10.

次に、ゲートリード7をゲートリード支持体6に通し、
さらに、ゲートスリーブ8をかぶせ、これらをコツプ状
体10の内部にそう人する。
Next, pass the gate lead 7 through the gate lead support 6,
Furthermore, the gate sleeve 8 is covered and these are placed inside the cup-like body 10.

しかる後、コツプ状体10を外部陰極電極4の凹部にそ
う人し、半導体基体2を設置し、外部陽極電極4を装着
する。
Thereafter, the pot 10 is placed in the recess of the external cathode electrode 4, the semiconductor substrate 2 is placed, and the external anode electrode 4 is attached.

このよう番として製作された平形サイリスクは、第2図
に示す外部陽極電極1の最下面Cから外部陰極電極4の
最上面Aまでの距離と、半導体基体2および導電板9の
厚さの合計との差〔以後、導電板9の縦方向の有効移動
距離という〕に比べ、コツプ状体10の高さを充分に大
きくすることができる。
The flat silice manufactured in this manner is the sum of the distance from the bottom surface C of the external anode electrode 1 to the top surface A of the external cathode electrode 4 shown in FIG. 2, and the thickness of the semiconductor substrate 2 and the conductive plate 9. [hereinafter referred to as the effective vertical movement distance of the conductive plate 9], the height of the pot-shaped body 10 can be made sufficiently large.

導電板9を外部陰極電極4に対して第2図の縦方向にず
らすためには、コツプ状体10を外部陰極電極4の凹部
より完全に抜き去らなければならないが、前述のように
、コツプ状体10の高さを、導電板3の縦方向の有効移
動距離に比べて、充分大きくすることにより導電板9が
横方向にずれることは不可能になる。
In order to shift the conductive plate 9 with respect to the external cathode electrode 4 in the vertical direction in FIG. By making the height of the shaped body 10 sufficiently larger than the effective vertical movement distance of the conductive plate 3, it becomes impossible for the conductive plate 9 to shift laterally.

さらに、この発明によれば、ゲートリード7を半導体基
体2に加圧するコイルバネ5は、コツプ状体10の底部
にて支持されるので、外部陰極電極4の凹部の深さは、
コツプ状体10の高さより大きければ良く、従来のもの
に比べて加工精度が悪くても差し支えない。
Further, according to the present invention, since the coil spring 5 that presses the gate lead 7 against the semiconductor substrate 2 is supported at the bottom of the cup-like body 10, the depth of the recess of the external cathode electrode 4 is
It only needs to be larger than the height of the tip-shaped body 10, and there is no problem even if the machining accuracy is lower than that of the conventional one.

第6図は係合体の他の形状を示す斜視図である。FIG. 6 is a perspective view showing another shape of the engaging body.

第6図に示す係合体は、第5図に示すコツプ状体。The engaging body shown in FIG. 6 is the cup-shaped body shown in FIG.

と異なり、一方の端部につばを持った筒状体であり、コ
ツプ状体と同様に導電板の位置ずれを防ぐことができる
Unlike , it is a cylindrical body with a flange at one end, which can prevent the conductive plate from shifting in the same way as a cup-shaped body.

この場合、ゲートリードを加圧するコイルバネは、外部
陰極電極の凹部の底部にて支持される。
In this case, the coil spring that presses the gate lead is supported at the bottom of the recess of the external cathode electrode.

この発明は、上記の平形サイリスクのみならず、平行お
よびスタッド形のダイオード、サイリスク全般に適用す
ることができる。
The present invention can be applied not only to the above-mentioned flat type diodes, but also to parallel and stud-type diodes and all types of cyrisks.

ダイオードの場合、従来は導電板と外部電極との位置決
めのため、第1図に示したコイルバネ、ゲートIJ−ド
支持体などを必要としたが、この発明によれば、これら
の部品は必要でなく、導電板と係合する係合体のみでよ
く、部品の簡略化が可能で、価格の面では安価に、構造
の面では簡単にできる。
In the case of a diode, conventionally a coil spring, a gate IJ-board support body, etc., as shown in FIG. Instead, only the engaging body that engages with the conductive plate is required, and the components can be simplified, making it inexpensive and simple in structure.

さらに、この発明は、ゲートリードと半導体基体との接
続本性に、加圧方法でなく、ろう付は方法を採用する半
導体装置にも適用することができる。
Further, the present invention can also be applied to a semiconductor device in which a brazing method is used instead of a pressurizing method for the connection between a gate lead and a semiconductor substrate.

以上詳述したよ“うに、この発明による半導体装置にお
いては、半導体基体の主面に対向する外部電極の凹部に
そう人され半導体基体に勤向する先端部に軸線に垂直な
方向へ突出する係止部を有する係合体と、上記係止部と
上記外部電極との間に保持される側壁を有する開孔部を
有し上記半導体基体と上記外部電極との間に配設された
導電板とを備えているので、導電板の位置ずれを防止す
ることができる効果がある。
As described in detail above, in the semiconductor device according to the present invention, the external electrode has a groove formed in the concave portion facing the main surface of the semiconductor substrate, and a tip portion facing the semiconductor substrate that protrudes in a direction perpendicular to the axis. an engaging body having a stop portion; and a conductive plate disposed between the semiconductor substrate and the external electrode, the conductive plate having an opening portion having a side wall held between the stop portion and the external electrode. This has the effect of preventing misalignment of the conductive plate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の平形サイリスクの縦断面図、第2図はこ
の発明の一実施例である平形サイリスクの縦断面図、第
3図および第4図はそれぞれ導電板の開孔の一例を示す
斜視図、第5図および第6図はそれぞれ係合体の一例を
示す斜視図である。 図において、1は外部陽極電極、2は半導体基体、3お
よび9は導電板、4は外部陰極電極、10は係合体であ
る。 なお、図中同一符号は同一または相当部分を示す。
FIG. 1 is a vertical cross-sectional view of a conventional flat-shaped cylisk, FIG. 2 is a longitudinal sectional view of a flat-shaped cylisk that is an embodiment of the present invention, and FIGS. 3 and 4 each show an example of an opening in a conductive plate. The perspective view, FIG. 5, and FIG. 6 are perspective views each showing an example of an engaging body. In the figure, 1 is an external anode electrode, 2 is a semiconductor substrate, 3 and 9 are conductive plates, 4 is an external cathode electrode, and 10 is an engaging body. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 少くとも一つのPN接合を有する半導体基体、この
半導体基体の一生面に対向し上記半導体基体との対向面
に凹部を有する外部電極、上記凹部にそう人され上記半
導体基体に対向する先端部に軸線に垂直な方向へ突出す
る係止部を有する係合体、および上記半導体基体と上記
外部電極との間に配設され上記外部電極と上記係合体の
係止部との間に保持される係合部を有する導電板を備え
た半導体装置。
1. A semiconductor substrate having at least one PN junction, an external electrode facing the entire surface of the semiconductor substrate and having a concave portion on the surface facing the semiconductor substrate, an external electrode placed in the concave portion and having a tip portion facing the semiconductor substrate. an engaging body having a locking portion protruding in a direction perpendicular to the axis; and a lock disposed between the semiconductor substrate and the external electrode and held between the external electrode and the locking portion of the engaging body. A semiconductor device including a conductive plate having a joint.
JP51152464A 1976-12-18 1976-12-18 semiconductor equipment Expired JPS5823946B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51152464A JPS5823946B2 (en) 1976-12-18 1976-12-18 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51152464A JPS5823946B2 (en) 1976-12-18 1976-12-18 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5376684A JPS5376684A (en) 1978-07-07
JPS5823946B2 true JPS5823946B2 (en) 1983-05-18

Family

ID=15541073

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51152464A Expired JPS5823946B2 (en) 1976-12-18 1976-12-18 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5823946B2 (en)

Also Published As

Publication number Publication date
JPS5376684A (en) 1978-07-07

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