JPS58224571A - Voltage reference waveform generator circuit for pulse width modulation inverter - Google Patents

Abstract

PURPOSE:To obtain the input voltage specification of a load and to enhance the efficiencies of a pulse width modulation inverter and the load by storing a plurality of reference waveform patterns in a reference waveform generator, selecting the reference waveform by the value of a voltage command and outputting it to an amplitude modulator. CONSTITUTION:When a frequency command is applied to a clock signal generator 10, a clock pulse which is proportional to the command is generated, counted by a ring counter 20, and the counted content is outputted to a reference waveform generator 30. When a frequency command is applied to a frequency voltage setter 40, a voltage command is outputted to the generator 30 and an amplitude modulator 50 on the basis of a preselected frequency voltage ratio pattern. The generator 30 stores a plurality of reference waveform patterns, selects the prescribed reference waveform determined by the value of the voltage command, sets the frequency of the waveform to the frequency which obeys the frequency command on the basis of the counter content of the counter 20, and outputs it to the modulator 50.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width modulation inverter device (hereinafter abbreviated as PWM inverter device) that obtains an alternating current output of variable frequency and variable voltage. The present invention relates to a voltage reference waveform generation circuit for a FW'M inverter device that generates a reference waveform.

The configuration of a basic PWM inverter device is shown in FIG.

In the figure, 噸 means frequency command S. is received by the voltage reference waveform S
The voltage reference waveform generation circuit (200) that generates □ compares the voltage reference waveform S□ generated by the voltage reference waveform generation circuit (101) with a modulated wave such as a triangular wave, and generates the inverter main circuit (400).
Drive signal 8. controls on/off control of the switching element.
(30 is a drive circuit that drives the switching elements of the inverter main circuit (400) based on the drive signal S3 of the drive signal generation circuit (200).

Further, the inverter main circuit (400) of the illustrated device uses transistors Tr□ to Tr6 as switching elements for switching the DC power supply E, and each arm of the three-phase bridge is formed by the transistors Tr□ and Tr.

Tr, and Tr6. and each pair of Tr2 and Tr,
The connection points of the transistors in each pair are designated as respective phase output terminals U, V, and W, respectively. Note that flywheel diodes D□ to D6 are connected in antiparallel to each of the transistors Tr□ to Tr6, respectively.

Further, conventionally, a voltage reference waveform generating circuit has been configured as shown in FIG. That is, the frequency command S. A clock signal generator that generates clock pulses proportional to (
e), a ring counter that counts this clock pulse, and the frequency command S based on this count content.
. A reference waveform generator that generates a reference waveform of the frequency corresponding to the above-mentioned frequency command; a frequency generator that inputs the above-mentioned frequency command and outputs a voltage command based on the pattern selected from a plurality of frequency-voltage ratio patterns; pressure ratio setting; The voltage modulator is comprised of an amplitude modulator and an amplitude modulator that generates a voltage reference waveform from the voltage command and the above-mentioned reference waveform.

Next, we will discuss the operation of the conventional AWM inverter device in the first part.
This will be explained using Figure 3.

First, we will create a voltage reference waveform generation circuit (1) using Figure 6.
The operation of 00 will be explained. Frequency command S. is given to the frequency-voltage ratio setter (pLO), the frequency-voltage ratio setter (kl) selects one of the frequency-voltage ratio patterns preselected from a plurality of stored frequency-voltage ratio patterns as shown in FIG. According to this pattern, the voltage command is outputted to the full amplitude modulator (50).On the other hand, the above-mentioned frequency command S is also given to the clock signal generator (00), and the generator (If) receives it.
) is the frequency command S. Outputs a clock pulse proportional to the ring counter to the ring counter. The count contents of the ring counter are sent to the reference waveform generator (80), and the reference waveform generator side generates the above-mentioned frequency command S based on the count contents. The reference waveform with a frequency matching the amplitude modulator −
Output to. The amplitude modulator (50) generates a frequency command S from the above-mentioned voltage command and this reference waveform.

A voltage reference waveform S corresponding to the voltage reference waveform S is outputted to the drive signal generating section C200) shown in the diagram M1. This voltage reference waveform S is
The -1 role is given as a sine wave, taking into consideration the characteristics such as torque ripple and directivity of the electric motor that is the load.

In addition, FIG. 4 (A
J~(0), body] represents a constant torque pattern, (B) represents a reduced torque pattern, and (C) represents a constant torque constant output cover pattern, and ■ in each figure.

F represents voltage and frequency, respectively.

Next, the generation of drive signals for the switching elements of the inverter main circuit (400) shown in FIG. 1, that is, the transistors Tr□ to Tr6 will be explained using FIG. 2.

The voltage reference waveform S□ output from the voltage reference waveform generation circuit θ is compared with a modulation wave Sg (2) such as a triangular wave, a sawtooth 9 wave, etc. for performing pulse width modulation (triangular wave in Fig. 442), and the valley transistor A drive signal S3 is generated that determines the on/off period of Tr~Tr6. That is, Figure 2 GA
) is larger than the modulated wave S2, H
The driving signal S3 shown in FIG. 2 is generated in the L level state, or conversely, in the L level state when the sine wave S is smaller than the modulated wave S2.

Hypothetically, let the sine wave S shown in FIG. At its H level, the drive signal S3 turns on the U-phase positive side transistor Tr□ and turns on the negative side transistor Tr4.
On the other hand, its L level means turning off the positive side transistors Tr, , and turning on the negative side transistor Tr4.

According to the drive signal S3 determined in this way, the drive circuit section (300) drives each switching element, in the illustrated case, transistors Tr□-T, 6. The output waveform resulting from this drive becomes a sine wave approximation pulse width *v4 waveform S4 as shown in FIG. 2(0). In addition, S in Fig. 2 (0)
4 indicates the voltage vU-0 between the virtual neutral point 0 of the power supply and the output terminal U of the U phase, and 85 in FIG. 2(0) is a sine wave approximation curve of this output voltage waveform S4. The operation for the U phase has been explained above, but for the V's W phase, the drive signal can be generated in the same way from the voltage reference waveform and the modulated wave, which have a phase difference compared to the U phase. Output terminal U is generated by turning on and off transistors TrU to Tr6 according to the drive signal.

V and W are sine wave approximation bars corresponding to the frequency command.6
- Able to output three-phase AC voltage with pulse width modulation.

Since the conventional pWM inverter device is configured as described above, the output voltage waveform from the PWM inverter device is always generated as a reference waveform, no matter what value the voltage command output from the frequency-voltage ratio setter is. Since the pulse width modulation waveform is approximate to one type of reference waveform outputted from the device (30), and there is no choice, there may be a region where the output voltage is insufficient.

That is, if we consider a general sine wave as the reference waveform and make the output a pulse width modulated wave approximating the sine wave, the fundamental wave of the output will be βIIi 7' 4 for the phase voltage and βIIi 7' 4 for the line voltage. In some cases, there is an upper limit of ρK/2, and therefore, there may be an output voltage insufficient region of the PWM inverter device that does not satisfy the input voltage specifications of the electric motor serving as the load. Comparing the case where the load torque is output in this insufficient region and the case where the load torque is output while satisfying the voltage specifications, in the former case, the current increases and the efficiency of the inverter and electric wj machine deteriorates. There was a drawback.

The present invention was made to eliminate the drawbacks of the conventional PWM inverter device as described above, and by improving the voltage reference waveform generation circuit, it is possible to ensure an output voltage that satisfies the input voltage specifications of the load. Another object of the present invention is to provide a PWM inverter device that can improve the efficiency of the inverter device and load. Therefore, in order to achieve the core purpose, a plurality of reference waveform patterns are stored in the reference waveform generator in the voltage reference waveform generation circuit of the PWM inverter device, and this reference waveform generator is connected to the voltage from the frequency-voltage ratio setter. The configuration is such that a predetermined reference waveform is selected from the pattern according to the command value and output to the amplitude modulator.

A voltage reference waveform generating circuit according to an embodiment of the present invention is shown in FIG. 5, with the same reference numerals as those in FIG. 6 or the same parts having the same effect. The configuration shown in FIG. 5 differs from the conventional circuit shown in FIG. 6 in that the voltage command is also sent from between the frequency-voltage ratio setters to the reference waveform generator (4), and that the reference waveform generation The point is that the section stores a plurality of reference waveform patterns and selects a reference waveform based on a voltage command.

Next, the operation of the embodiment shown in FIG. 5 according to the present invention will be explained.

First, frequency command S. is applied to the clock signal generator, a proportional clock pulse is generated, the clock pulse is counted by the ring counter, and the count is output to the reference waveform generator (BO). Furthermore, when the above-mentioned frequency command 8° is given between the frequency-voltage ratio setters, the voltage command is set as the standard based on a preselected frequency-voltage ratio pattern (for example, any one of FIG. 4 (A) to (0)). output to a waveform generator (30) and an amplitude modulator m). Further, the reference waveform generator βO) is, for example, 8f
J, s figure) ~ (D month) (Memorize multiple reference waveform patterns as shown, select a predetermined reference waveform determined by the circumstances of this voltage command, and set the frequency of that waveform to the above count contents. Based on the frequency command, the frequency is set to a frequency that conforms to the frequency command and output to the amplitude modulator (60).The value of the voltage command that determines the selection of the reference waveform is set so that the final output of the PWM inverter device satisfies the input d-pressure specifications of the load. The amplitude modulator (50) performs amplitude modulation based on the reference waveform output from the reference waveform generator (80) and the voltage command value output from the frequency-voltage ratio pattern. Voltage reference waveform s
Outputs 2. In this way, a reference waveform that can ensure the output voltage is selected and generated in accordance with the voltage command value, so compared to the conventional method of outputting only one type of reference waveform, for example, a sine wave reference waveform. , it is possible to eliminate the situation of insufficient output voltage of the PWM inverter device.

Furthermore, FIG. 7 shows a part of the configuration example shown in FIG. 5 described above in more detail.

In this Figure 7, ('') is the ring counter % (8
1) is the reference waveform generation ROM (Reaa 0nly M
memory), frequency-voltage ratio setting ROM, 喀)~
f44) is an AND gate; is ■Level voltage■.Frequency voltage ratio setting RO
Switches SW1 to SW4 that open and close the input to MS)
, and resistors R1 to R4.

The operation of the configuration example shown in FIG. 7 will be explained below -10- Ru.

In this configuration example, 16 frequency-voltage ratio patterns are stored in the frequency-voltage ratio setting ROM←1).
The upper address of this ROM el) is A. By applying the input signals of 1 to 1 to the switches SW1 to SW4, any one frequency-voltage ratio pattern can be selected and set.

ROM sail) is the frequency command S in binary code. When input, the frequency command S is executed according to the selected pattern. Depending on the voltage command. -Output from Dヮ. The voltage command is output to the amplitude modulator, and on the other hand,
ANI) as the reference waveform selection signal 5431S44
The signal is processed through the gates and is input to the reference waveform generation ROM (81). As shown in the figure, voltage command ([S4□ is Do”
8-bit data from ''y, i.e. 0 to 0 in decimal
255 (=28-1), which is given by, for example,
0 to 207 (ST1), which can secure the output voltage of the PWM inverter device with sine wave approximation, and 208-223 (ST2), 224N239 (which is divided into 16 units), 224N239 (
ST3), 240 to 255 (ST) are distinguished into four states, and these four states are processed using AND gates (b) so as to be represented by 2-bit data, and the reference waveform is generated RO.
The upper address of M+8 is A8. Enter in A9. In this case, the output of the frequency voltage ratio setting ROM field) and the AN
D gate) and 04) output S4. .

8) and CB). In the reference waveform generation ROM (9), as shown in FIG. A reference waveform divided and approximated into states of 8 bits A7 to Ao is stored in four addresses corresponding to 8T4, respectively.The reference waveform related to this storage is, for example, the 6th address mentioned above. With the waveforms shown in Figures (A) to CD), 5T1-flT4 are shown in Figure 6, respectively.
It may also be stored in correspondence with (D). Therefore, those reference waveforms are the output of the ring counter (21) and the A
ND Gate (b).

(g)) Output "431" selected by S44, D7
~Do is output to the amplitude modulator (50I).

Here, to explain the operation of the configuration example shown in FIG. 7, when a binary code frequency command B (, iE is given, switches sw1 to
Voltage command is issued according to the frequency-voltage ratio pattern selected by BW4. -D7 to an amplitude modulator not shown in FIG.
@The signal 843S44 for selecting a reference waveform is output to the reference waveform generation ROM (811).The ROM (8) selects the corresponding reference waveform from the reference waveform patterns stored in memory based on this signal 8431844. The selected reference wave R is output to an amplitude modulator (not shown in FIG. 7) according to the contents of a ring counter (21) that counts clock pulses proportional to the frequency command S. The modulator outputs a voltage reference waveform signal 8□ in which the reference waveforms ˜ are amplitude-modulated in accordance with the voltage command S, □.

The above is the operation of the voltage reference waveform generation circuit newly configured based on the present invention, but the operation after this circuit, that is, the drive signal generation section (200) and the drive circuit section (300) shown in FIG. , the operation of the inverter main circuit (400) is the same as the conventional one. Therefore, the explanation will be omitted.

In this way, if the voltage command from between the frequency-voltage ratio setters is a value that can be output using the sine wave approximation method, for example, select the sine wave reference waveform and perform the sine wave approximation procedure. On the other hand, if the voltage command is within a range that cannot be output using the sine wave approximation method, a non-sine wave reference waveform is selected and the inverter operates as a non-sine wave approximation inverter.
It is possible to ensure an output voltage that always satisfies the specifications of the motor that is the load.

In the configuration example shown in FIG. 7 above, when you want to increase the frequency-voltage ratio patterns and reference waveform patterns stored in the frequency-voltage ratio setting ROM and reference waveform generation ROM, and when you want to increase the number of voltage command decompositions, If you want to change the output voltage waveform, you can increase the storage capacity, which will result in a smoother change in the output voltage waveform. 9. Although FIG. 7 above shows only one phase, it goes without saying that the same configuration may be used for the other two phases, except for the phase. Furthermore, the present invention is not limited to the digital circuit shown in FIG. 7 in its specific configuration, but can also be applied to other digital circuits or analog circuits based on the above-mentioned technical idea. Similar effects can be expected.

As described above, in the present invention, a plurality of reference waveform patterns are stored in the reference waveform generator in the voltage reference waveform generation circuit of the PWM inverter, and the reference generator is used to set the frequency-voltage ratio. Since the configuration is configured such that a predetermined reference waveform is selected from the above pattern and output to the amplitude modulator according to the value of the voltage command from the converter, the input voltage specifications of the load can be ensured, and the efficiency of the inverter and load can be maintained. It has the effect that it can be improved.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing a basic configuration example of a PWM inverter device partially in blocks, Fig. 2 CA) to (0) are waveform diagrams for explaining the operation of the sine wave approximation pulse width modulation method, and Fig. 3
The figure is a block diagram showing a conventional voltage reference waveform generation circuit in a PWM inverter, FIGS. 4(A) to (0) are diagrams showing examples of frequency-voltage ratio patterns, and FIG. A block diagram showing a voltage reference waveform generation circuit according to an embodiment, FIG. 6cA) to O)) are diagrams showing examples of reference waveform patterns, and FIG. A diagram showing a specific configuration example, FIG. 8 is an explanatory supplementary diagram for explaining the relationship between the voltage command and the address of the reference waveform generation circuit in FIG. 7, and FIG.
The figure is an auxiliary diagram for explaining how the reference waveform is stored in the reference waveform generation circuit. ([0)...Clock signal generator (Foundation)...Ring counter)...Reference waveform generator...Frequency voltage ratio setter f50)...Amplitude modulator (-...Voltage reference waveform generation circuit (200 )・Red drive signal generation section (300)・・Drive circuit section (400)・・Inverter main circuit E・・DC power supply Tr~Tr6・・Switching element (transistor)
D to D6.Φ flyhole diode In the drawings, the same reference numerals indicate the same or corresponding parts. Agent Makoto Kuzuno - Figure 1 Figure 2 (A) , 4\7\(/\SA Kujipe\l\Wag\
/Fubū l\7-■ 111 If 1111111 II l”'53Hl
+l 11 II +ll H+l +l l'(B
) ・l II +l 'l 1. l'l
111I (If Ill II II II 'l
. Fig. 300 Fig. 4 (A) (B) (C) Fig. 8 (A) (B) Fig. 9 Relationship with the case of the person who filed the patent application Address of the patent applicant
1 = Number 12 Name (601,) Mitsubishi Electric Co., Ltd. Representative Kata 11.1 Jin Hachibe 4, Agent Address Higashijj [Miyakochiyo 111-ku Marunouchi 2-ro 1
Section 2, Section 3, Paragraph 5, Claims column and Detailed Description of the Invention column of the specification subject to the amendment. 6. Contents of amendment (1) The claims of the specification shall be amended as specified. , 21. Yu threat number. □No.□, Wow. ".llil%(200
) Correct the description "J" to "Circuit, (200) J." (3) Delete the description "Switching the DC power supply E" on line 20 of the second page of the specification. (4) The statement "following the pattern" in line 7 of No. 4 of the specification is amended to "following the pattern." (5) The statement "(B) is a reduction torque" in lines 2 and 3 of No. 5 of the specification is corrected to "(B) is a reduction torque." (6) In the specification, page 7, lines 12 to 13, [The fundamental wave of the output is phase 1: Js'E/4 in the case of Suda, and vTE/2 in the case of line voltage. The statement "There is an upper limit" is corrected to "The fundamental wave effective value of the line-to-line output has an upper limit of J"ir E / 4." 2- (7) The statement "reference waveform S2" in line 3 of page 10 of the specification is corrected to "reference waveform S,". (8) “Pattern (Fig. 4 (
From A) to (C)" is replaced by "pattern (for example,
4 (A) to (C), etc.). 7. t ii? that describes the scope of claims after the amendment to the list of attached documents? 1 average above - 3 = Frequency-voltage ratio setting that stores a written frequency-electronic ratio pattern that describes the scope of claims after amendment, and outputs an electronic command based on the frequency-voltage ratio pattern in response to an input frequency command. a reference waveform generator that outputs a reference waveform of a frequency according to the frequency command, and an amplitude modulator that outputs a Denda base waveform based on the voltage command and the base waveform. Voltage reference waveform generation for a pulse width modulation inverter V device in which a driving signal for on/off control of switching elements of a pulse width modulation inverter main circuit is obtained by comparing the output reference waveform with a modulated wave. In the circuit, a plurality of reference waveform patterns are stored in the reference waveform generator 14K, and the reference waveform generator is configured to select a predetermined reference waveform according to the value of the Narita command and output it to the amplitude modulator. A voltage base M waveform generation circuit for a pulse swell inverter device which has this as a % characteristic. 346-

Claims (1)

[Claims] a frequency-voltage ratio setter that stores a frequency-voltage ratio pattern and outputs a voltage command based on the frequency-voltage ratio pattern according to an input frequency; and a reference waveform that outputs a reference waveform of a frequency that follows the frequency command. The generator includes a generator, and an amplitude modulator that outputs a voltage reference waveform based on the voltage command and the reference waveform. In a voltage reference waveform generation circuit of a pulse width modulation inverter device which obtains a driving signal for controlling switching elements in the main circuit on and off, a plurality of reference waveform patterns are stored in the reference waveform generator, and the reference waveform is generated. the utensils,
A voltage reference waveform generation circuit for a pulse width modulation inverter device, characterized in that the circuit is configured to select a predetermined reference waveform according to the value of the voltage command and output it to the amplitude modulator.