JPS58223382A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JPS58223382A
JPS58223382A JP57106513A JP10651382A JPS58223382A JP S58223382 A JPS58223382 A JP S58223382A JP 57106513 A JP57106513 A JP 57106513A JP 10651382 A JP10651382 A JP 10651382A JP S58223382 A JPS58223382 A JP S58223382A
Authority
JP
Japan
Prior art keywords
light
light emitting
film
untransmitting
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57106513A
Other languages
Japanese (ja)
Inventor
Hirohisa Abe
阿部 洋久
Yasuo Josa
帖佐 康生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57106513A priority Critical patent/JPS58223382A/en
Publication of JPS58223382A publication Critical patent/JPS58223382A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To prevent the blur or unsharpness of a light emitting part and enable to largely reduce the photo crosstalk between light emitting parts by providing a light untransmitting part composed of an insulation film and a light untransmitting film. CONSTITUTION:P type diffused regions 38 are formed on an n type semiconductor wafer 33. The first insulation film 34, light untransmitting film 35, and second insulation film 36 which covers it are formed successively on the surface of this wafer 33. These insulation films and the light untransmitting film compose the light untransmitting part 41. The light untransmitting part 41 is equipped with light emitting windows 37 on the diffused regions 38. The light untransmitting part 41 formed in this manner enables to prevent the leak to light toward the side or light scattered in the crystal from the non-light emitting regions. Thus, the blur or unsharpness of the light emitting part is prevented, and the light crosstalk can be largely reduced.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、発光ダイオード等の半導体発光装置に関す
るもので、特にモノリシック発光表示器或は発光ダイオ
ードアレイ等として使用されるものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor light emitting device such as a light emitting diode, and is particularly used as a monolithic light emitting display or a light emitting diode array.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来より腕時計や電卓の表示素子として、複数の発光部
を有するモノリシック型の発光ダイオードが使用されて
いる。
2. Description of the Related Art Monolithic light emitting diodes having a plurality of light emitting parts have conventionally been used as display elements for wristwatches and calculators.

このように複数の発光部を有するモノリシック型の発光
ダイオードの代表的な構造を第1図に示す。まず、n型
GaAs基板Jo上に順にn型GaAs1−xPx(0
(x(0,4)およびn型GaA[io、6P+)、4
なる2層構造のn型層11を成長させた半導体ウェーハ
12表面に、例えばAt203膜による拡散マスク13
を被着し、開口部14.14よりZnを拡散させて、上
記n型層11とpn接合するp型拡散領域15.15を
形成する。そして、上記拡散マスク13の開口部14.
14の端部においでp型拡散領域15に接続するp型オ
ーミック電極17.17およびウェーハ裏面のn型オー
ミ、り電極18を形成して発光ダイオードとする。ここ
で上記各オーミック電極17および18間に順方向に通
電すれば前記pn接合近傍より約660 nmの波長で
発光する。
FIG. 1 shows a typical structure of such a monolithic light emitting diode having a plurality of light emitting parts. First, n-type GaAs1-xPx (0
(x(0,4) and n-type GaA[io, 6P+), 4
A diffusion mask 13 made of, for example, an At203 film is placed on the surface of a semiconductor wafer 12 on which an n-type layer 11 with a two-layer structure has been grown.
is deposited and Zn is diffused through the opening 14.14 to form a p-type diffusion region 15.15 that makes a pn junction with the n-type layer 11. Then, the opening 14 of the diffusion mask 13.
A p-type ohmic electrode 17.17 connected to the p-type diffusion region 15 at the end of the wafer 14 and an n-type ohmic electrode 18 on the back surface of the wafer are formed to form a light emitting diode. Here, if current is applied in the forward direction between the ohmic electrodes 17 and 18, light is emitted at a wavelength of about 660 nm from the vicinity of the pn junction.

しかし、上記のような構造の発光ダイオードは限られた
結晶劇料のものにしか適用できない。
However, the light emitting diode having the above structure can only be applied to a limited number of crystal-heavy materials.

す力わち、第1図で示したGaAs系の結晶は660n
m付近の波長に対し吸収係数が充分に大きいため、pn
接合伺近で発光した光のうち、側方および下方に向った
元の大部分は結晶内で吸収される。しかし、発光波長に
対し、吸収係数の小さい半導体たとえばQapを材料と
する発光ダイオードでは、結晶内を側方および下方に向
った光が、直接或は反射散乱して発光窓周辺より漏れ、
発光パターンかにじんだりぼけたりする。このため、発
光ダイオードアレイや発光表示装置では、実用に供さな
い場合があった。
In other words, the GaAs crystal shown in Figure 1 is 660n
Since the absorption coefficient is sufficiently large for wavelengths around m, pn
Of the light emitted near the junction, most of the original light directed laterally and downwardly is absorbed within the crystal. However, in a light emitting diode made of a semiconductor such as Qap, which has a small absorption coefficient relative to the emission wavelength, light directed laterally and downward within the crystal leaks from around the emission window either directly or through reflection and scattering.
The light emission pattern is blurred or blurred. For this reason, light emitting diode arrays and light emitting display devices may not be of practical use.

第2図に示すものは、前記のような欠点を改善スるため
、メサエッチング構造を有する他のモノリシ、り型の発
光ダイオードの例である。
What is shown in FIG. 2 is an example of another monolithic type light emitting diode having a mesa etching structure in order to improve the above-mentioned drawbacks.

この場合は、n型GaP基板2o上に順にn型GaP層
2ノおよびp型GaP層22を液相成長させ、発光領域
とすべき部分を囲むようにn型GaP層21に達するメ
サ溝23をエツチングし、各発光領域24.24ごとに
独立したpH接合部を形成する。
In this case, an n-type GaP layer 2 and a p-type GaP layer 22 are grown in liquid phase on the n-type GaP substrate 2o in order, and a mesa groove 23 that reaches the n-type GaP layer 21 surrounds a portion to be a light emitting region. is etched to form independent pH junctions for each light emitting region 24.24.

そして、この発光領域24.24間のp型GaP層22
表面には、例えばシリコン膜等による光吸収膜25を被
着させる。まだ、発光領域24.24に対応するp型G
aP層22表面にはアノード電極となるp型オーミック
電極26゜26を接続し、このウェーハの裏面すなわち
n型GaP基板20にはn型オーミック電極27を被着
する。この場合には上記両電極26および27間にI+
1方向通電すれば約565 nmの波長で発光する。
Then, the p-type GaP layer 22 between the light emitting regions 24 and 24
A light absorption film 25 made of, for example, a silicon film is deposited on the surface. Still, the p-type G corresponding to the light emitting region 24.24
A p-type ohmic electrode 26° 26 serving as an anode electrode is connected to the surface of the aP layer 22, and an n-type ohmic electrode 27 is attached to the back surface of the wafer, that is, the n-type GaP substrate 20. In this case, I+
When energized in one direction, it emits light at a wavelength of approximately 565 nm.

このように、メサエッチングして各発光領域を分離した
ものでは、結晶の吸収係数の如何に拘らず、発光ノやタ
ーンのにじみやぼけ或は光漏話を充分低減させることが
できる。
In this way, when the light emitting regions are separated by mesa etching, it is possible to sufficiently reduce the blurring, blurring, and optical crosstalk of the light emission and turns, regardless of the absorption coefficient of the crystal.

しかし、第2図の装置のようyc液相成長層でpn接合
を形成する場合には、メサ溝の深さを20μm以上と深
くする必要があシ、歩留が悪く、さらに、このように深
いメサエッチングでは、精密で微小な発光図形を得るこ
とができない。また、pn接合を拡散により形成したウ
ェーハにメサエッチングを施し、発光領域・9ターンを
形成する方法では、第1図に示したような選択拡散によ
り発光領域の・ぞターンを形成する方法に比らべ量産性
も歩留も劣っている1 〔発明の目的〕 この発明は上記のような点に鑑みなされたもので発光光
に対する半導体結晶の吸収係数の大小に拘らず形成でき
、メサエッチング型の発光ダイオードよシも高い歩留で
微細な発光領域パターン形成でき、発光部のにじみやぼ
けおよび谷発光部間の光漏話が充分に小さ込モノリシッ
ク型の半導体発光装置を提供しようとするもの5− である。
However, when forming a pn junction using a YC liquid phase growth layer as in the apparatus shown in Fig. 2, it is necessary to make the mesa groove as deep as 20 μm or more, resulting in a poor yield. With deep mesa etching, it is not possible to obtain precise and minute luminescent patterns. In addition, the method of forming nine turns of the light emitting region by performing mesa etching on a wafer in which a pn junction has been formed by diffusion is compared to the method of forming nine turns of the light emitting region by selective diffusion as shown in Figure 1. [Objective of the Invention] This invention was made in view of the above points, and can be formed regardless of the magnitude of the absorption coefficient of the semiconductor crystal for emitted light. To provide a monolithic semiconductor light-emitting device which can form a fine light-emitting area pattern with a higher yield than that of a light-emitting diode and has sufficiently small blurring and blurring of the light-emitting part and optical crosstalk between the valley light-emitting parts. − is.

〔発明の概要〕     − すなわちこの発明に係る半導体発光装置は、−導電型の
半導体ウェーハ表面よりpn接合を形成する逆導電型の
拡散領域を形成し、下層から順に第1の絶縁膜とこの絶
縁膜上に形成された光不透過膜とこの光不透過膜を覆う
第2の絶縁膜とによる積層構造を成し上記拡散領域上に
発光窓を有する光不透過部を上記ウェーハ表面に形成し
たものである。
[Summary of the Invention] - That is, the semiconductor light emitting device according to the present invention forms a diffusion region of opposite conductivity type forming a pn junction from the surface of a semiconductor wafer of - conductivity type, and connects the first insulating film and this insulating film in order from the bottom layer. A light-opaque portion having a laminated structure of a light-opaque film formed on the film and a second insulating film covering the light-opaque film and having a light-emitting window on the diffusion region was formed on the wafer surface. It is something.

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照してこの発明の一実施例につき説明する
。第3図(4)〜■)は複数の゛発光部を有する発光ダ
イオードをその製造工程と共に示す図で、まず、第3図
(3)に示すように面方位(100)のn −GaP基
板3θ上にシリコンをドープしたn −GaAs、−、
PX(0,65<x<1 )を除々にAsを増しながら
気相成長し、n −GaAsP層31を層成1、とのn
 −GaAsP層3ノ上にシリコンをドープしたn −
GaA[lO,55P 0065層32を形成する。そ
して、6一 このn −GaA30.35PO,65層32表面には
発光中心となる窒素■をドープしておく。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 (4) to (■) are diagrams showing a light emitting diode having a plurality of light emitting parts along with its manufacturing process. First, as shown in FIG. n-GaAs doped with silicon on 3θ, -,
PX (0,65<x<1) is grown in a vapor phase while gradually increasing the amount of As, and the n-GaAsP layer 31 is formed by layer 1.
-N- doped with silicon on the GaAsP layer 3
A GaA[lO,55P 0065 layer 32 is formed. Then, the surface of this n-GaA30.35PO,65 layer 32 is doped with nitrogen (2), which serves as a luminescent center.

次にこのようにして形成したn型の半導体ウェーハ33
の表面に、順にそれぞれ1000 Xの膜厚の第1の絶
縁膜としてのS l 3N4膜34および光不透過膜と
しての18層35を高周波ス・セツタリング法によって
被着形成し、さらにこのTa層35上に第2の絶縁膜と
してPSG (’)ン硅酸ガラス) 11!G s 6
をCVD法によって形成する。その後、発光領域パター
ンと一致する拡散窓37゜37を上記S l 3N4膜
34.18層35およびPSG膜36に開口する。
Next, the n-type semiconductor wafer 33 formed in this way
An S l 3N4 film 34 as a first insulating film and an 18-layer 35 as a light-opaque film each having a thickness of 1000× are deposited on the surface of the wafer by high-frequency setting, and further this Ta layer PSG (')n silicate glass) as a second insulating film on 35! G s 6
is formed by CVD method. Thereafter, a diffusion window 37° 37 matching the light emitting region pattern is opened in the S 1 3N4 film 34, 18 layer 35 and PSG film 36.

次に第3図(B)に示すように18層35のみを、Ta
を選択的に溶かすエツチング液で約3μm程度サイト゛
エツチングし、周縁部を除去する。
Next, as shown in FIG. 3(B), only the 18 layers 35 are made of Ta.
The site is etched to a depth of about 3 μm using an etching solution that selectively dissolves the etchant, and the peripheral portion is removed.

その後、このウェーハ33とZnと共に石英アングルに
真空封入して700℃10時間の拡散を行かい第3図(
C)に示すようVC6μm程度の深さのP −GaA’
0.55P0.65領域となるp型拡散領域38゜38
を形成する。この拡散処理中に、PSG膜36は軟化し
て、18層35のサイドエツチングによシ除去された部
分の上のPSG膜36が下J−の515N4Il!!3
4と接合し、Tae輌35を覆って絶縁する。
Thereafter, this wafer 33 and Zn were vacuum sealed in a quartz angle and diffused at 700°C for 10 hours.
As shown in C), P-GaA' with a depth of about VC 6 μm
P type diffusion region 38°38 which becomes 0.55P0.65 region
form. During this diffusion process, the PSG film 36 is softened, and the PSG film 36 on the portion of the 18 layer 35 removed by side etching becomes 515N4Il! ! 3
4 and covers and insulates the Tae tank 35.

その後、第3図の)に示すように端部においてp型拡散
領域38.38とそれぞれ接続するp型オーミック電極
39 、.99を被着し、n−GaP基板30裏面には
n型オーミック電極40を被着する。その後、上記各電
極を充分なオーミック接触化させるだめのシサンタリン
グ工程等ヲ行い発光ダイオードとする。
Thereafter, as shown in FIG. 3), p-type ohmic electrodes 39, . 99, and an n-type ohmic electrode 40 is deposited on the back surface of the n-GaP substrate 30. Thereafter, a process such as a sintering process is carried out to bring the respective electrodes into sufficient ohmic contact to form a light emitting diode.

このようにして形成された素子に順方向通電すると、上
記p型拡散領域38.38とn −GaABO,35P
O,65層32とのpn接合部近傍において波長63 
Onm付近の赤色光が発光し、この赤色発光光は、発光
窓となる拡散窓37 、37よp1外部へ放出される。
When forward current is applied to the element thus formed, the p-type diffusion region 38.38 and the n-GaABO, 35P
The wavelength 63 near the pn junction with the O,65 layer 32
Red light in the vicinity of Onm is emitted, and this red emitted light is emitted to the outside of p1 through the diffusion windows 37, 37 serving as light emission windows.

この場合、光不透過膜の18層35をそれぞれ第1およ
び第2の絶縁膜のS i 6N4膜34およびPSG膜
36で挾み絶縁した状態の光不透過部41によって、側
方へ回った光や結晶内を散乱している光が非発光領域か
ら漏れることが防止される。第3図の)で示す装置にお
いて、発光部の間隔を70μmに設定し、通電時の発光
強度を100%とした場合の隣接する発光窓への光の漏
れ(光漏話)は、約7%となった。従来の第1図で示し
た構造にした場合の光漏話は、約18%であり、半分以
下に改善される。
In this case, the 18 layers 35 of the light-opaque film are sandwiched and insulated by the Si 6N4 film 34 and the PSG film 36, which are the first and second insulating films, respectively. Light or light scattered within the crystal is prevented from leaking from the non-light emitting region. In the device shown in ) in Figure 3, when the interval between the light emitting parts is set to 70 μm and the light emission intensity when energized is 100%, the leakage of light to adjacent light emitting windows (optical crosstalk) is approximately 7%. It became. The optical crosstalk in the conventional structure shown in FIG. 1 is about 18%, which is improved to less than half.

まだ、第2図で示した装置の最終的な歩留は35係であ
るが、上記実施例によるものでは60チとなシ大幅に改
善された。
The final yield of the apparatus shown in FIG. 2 is still 35 pieces, but in the above embodiment it is 60 pieces, which is a significant improvement.

なお、上記実施例では、GaP基板に活性層としてGa
As Pを成長させた場合につき述べたが、GaP等、
他の半導体結晶を有するウェーハにも適用できることは
明らかである。
Note that in the above embodiment, Ga was formed as an active layer on the GaP substrate.
Although we have described the case where AsP is grown, GaP etc.
It is clear that the invention can also be applied to wafers with other semiconductor crystals.

第4図囚〜の)は、他の実施例をその製造過程へ と共に示す図で、前実施例と同一構成分には同一符号を
付してその説明を省略する。
FIGS. 4(a) to 4(b) are diagrams showing another embodiment along with its manufacturing process, and the same components as those in the previous embodiment are given the same reference numerals and their explanations will be omitted.

第4図(A)の33は前実施例と同様のn型の半導体ウ
ェーハで、このウェーハ330表面には9− 順に約1,0OOXの厚さの第1の絶縁膜となる5I0
2膜42を堆積し、この5iO2jli 42上に光不
透過膜のTa、1$35を高周波スパッタリング法で積
層被着させる。さらに、このTa)偵35上には第2の
絶縁膜としてPSG膜36を3000 X程度の膜厚で
形成し、上層のPSG ll1A s 6および18層
35のみに拡散窓43.43を写真蝕刻する。
Reference numeral 33 in FIG. 4(A) is an n-type semiconductor wafer similar to that in the previous embodiment, and the surface of this wafer 330 is coated with 5I0 which becomes the first insulating film with a thickness of about 1,000X in the order of 9.
2 film 42 is deposited, and on this 5iO2jli film 42, a light-opaque film of Ta, 1$35, is laminated and deposited by high frequency sputtering method. Furthermore, a PSG film 36 is formed as a second insulating film on this Ta layer 35 to a thickness of about 3000×, and diffusion windows 43 and 43 are photo-etched only on the upper PSG ll1A s 6 and 18 layers 35. do.

その後、第4図(B)に示すように上下を絶縁膜で挾ま
れた18層35を3μm程度サイドエツチングし、縁部
のTaを除去する。
Thereafter, as shown in FIG. 4(B), the 18 layers 35 sandwiched between upper and lower insulating films are side-etched by about 3 μm to remove Ta at the edges.

次に第4図(C)に示すようにこのウェーハ33にZn
を拡散する。この場合、18層35および8102膜3
6が拡散マスクとな、!2.Znは約1.0OOX程度
の5tO2膜42を通して半導体結晶内に拡散しp型拡
散領域44.44を形成する。このp型拡散領域44.
44は、5IO2膜42を通さずにZn’)拡散した場
合に比べ、表面のZn9度が一桁以上低くなり、このた
め、pn接合刊近で発光した光が結晶表面で再吸収され
る割合が低下して外部発光効率が向上する。
Next, as shown in FIG. 4(C), this wafer 33 is coated with Zn.
spread. In this case, 18 layers 35 and 8102 membranes 3
Number 6 is a diffusion mask! 2. Zn diffuses into the semiconductor crystal through the 5tO2 film 42 of approximately 1.000X to form p-type diffusion regions 44.44. This p-type diffusion region 44.
44, compared to the case where Zn') is diffused without passing through the 5IO2 film 42, the Zn9 degree on the surface is more than an order of magnitude lower, and therefore the rate at which light emitted near the pn junction is reabsorbed on the crystal surface is decreases and improves external light emitting efficiency.

10− また、第2の絶縁膜となるPSG膜36は、前実施例と
同様に軟化し、Ta層35を覆うようにコンタクトホー
ルを5102膜42に写真蝕刻して設け、n−GaP基
板30裏面を適宜ラッピング研磨して、上記p型拡散領
域44.44とn −GaP基板30にそれぞれ接続す
るp型オーミック電極45.45およびn型オーミック
電極46を形成する。
10- Also, the PSG film 36, which becomes the second insulating film, is softened as in the previous embodiment, and a contact hole is photo-etched into the 5102 film 42 so as to cover the Ta layer 35, and the n-GaP substrate 30 is The back surface is appropriately lapped to form p-type ohmic electrodes 45.45 and n-type ohmic electrodes 46 connected to the p-type diffusion regions 44, 44 and the n-GaP substrate 30, respectively.

ここで上記p型オーミック蛋極4.5 、45およびn
型オーミック電極46間に通電すると、pTl接合部付
近で発光した光は、5102膜を透過し発光窓となるA
il記拡散窓43.43より外部へ放射する。
Here, the p-type ohmic electrodes 4.5, 45 and n
When electricity is applied between the type ohmic electrodes 46, the light emitted near the pTl junction passes through the 5102 film and forms a light emitting window A.
It radiates to the outside from the diffusion window 43.43.

この場合も前実施例と同様に第1の絶縁膜とし′″rO
8iO・膜″・光不透j品(牢とし100°J脅35お
よび第2の絶縁膜としてのPSG膜36の積層構造部分
が光不透過部41となって、発光パターンかにじんだり
ぼけて見えることを防ぐ。
In this case, as in the previous embodiment, the first insulating film is
8iO・film・light-opaque product (the laminated structure part of the 100°J film 35 and the PSG film 36 as the second insulating film becomes the light-opaque part 41, causing the light emitting pattern to blur or become blurred. prevent it from being seen.

なお、」二記実施例では光不透過膜としてTa1m用い
た場合につき説明したが、W(タングステン)等の他の
高融点金属でも良く、pn接合を形成するための選択拡
散を行った後、光不透過+1nおよび第2の絶縁膜を形
成するならげAt等の金橋蒸着膜でも良く、発光光を吸
収するシリコン等の半導体膜でも良い。捷だ、第1およ
び第2の絶縁膜もAt20. 、 S l 3N4. 
S 102 等による他の絶縁膜でもよい。
In addition, in Example 2, the case where 1m of Ta was used as the light-opaque film was explained, but other high melting point metals such as W (tungsten) may also be used, and after performing selective diffusion to form a p-n junction, It may be a metal bridge vapor deposited film such as At, which forms a light-opaque +1n and second insulating film, or a semiconductor film, such as silicon, which absorbs emitted light. However, the first and second insulating films are also At20. , S l 3N4.
Other insulating films such as S 102 may also be used.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、光不透過膜を第1およ
び第2の絶縁膜で挾み絶縁した構成の光不透過部を設け
ることにより、歩留が悪く微細な発光領域i4ターンを
形成できないメサエッチングを行なわずに、半導体結晶
の発光光の吸収系数の大小に拘らず発光部のにじみやほ
けおよび発光部間の光漏話が充分に小さいモノリシック
型の半導体発光装置を提供できる。
As described above, according to the present invention, by providing the light-opaque portion having a structure in which the light-opaque film is sandwiched between the first and second insulating films and insulated, the fine light emitting area i4 turn, which has a low yield, can be removed. To provide a monolithic semiconductor light emitting device in which blurring and blurring of a light emitting part and optical crosstalk between light emitting parts are sufficiently small, regardless of the magnitude of the absorption coefficient of emitted light of a semiconductor crystal, without performing mesa etching that cannot be formed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は従来の半導体発光装置を示す断1
m図、第3図(A、’l〜Q)lはこの発明の一実施例
に係る半導体発光装置を製造過程と共に示す図、第4図
(A)〜(D)はこの発明の他の実施例を製造過程と共
に示す図である。 、93 =−ウェーハ、34−:号15N4膜、35−
・−Ta層、36.45・・・I)SGN、 38 、
44・・・p型拡散領域、41・・・光不透過部、42
・・・S iO2膜、4θ・・・発光窓。 出願人代理人  弁理士 鈴 江 武 彦13− 第1図 第2図
Figures 1 and 2 are cross sections showing a conventional semiconductor light emitting device.
Figure m, Figure 3 (A, 'l~Q)l are diagrams showing a semiconductor light emitting device according to an embodiment of the present invention together with the manufacturing process, and Figures 4 (A)~(D) are views showing another example of the present invention. It is a figure which shows an Example together with a manufacturing process. , 93 =-wafer, 34-: No. 15N4 film, 35-
・-Ta layer, 36.45...I) SGN, 38,
44...p-type diffusion region, 41...light-opaque portion, 42
...SiO2 film, 4θ...light emitting window. Applicant's agent Patent attorney Takehiko Suzue 13- Figure 1 Figure 2

Claims (3)

【特許請求の範囲】[Claims] (1)−導電型の化合物半導体と、この化合物半導体表
向より拡散形成され上記化合物半導体と逆導電型の拡散
領域と、上記拡散領域を含む上記化合物半導体表面上に
形成され下層から順に第1の絶縁膜、光不透過膜および
上記光不透過膜を扱う第2の絶縁膜の積層構造の光不透
過部を具備し、上記光不透過部は上記拡散領域上に発光
窓を有することを%徴とする半導体発光装置。
(1) - A compound semiconductor of a conductivity type, a diffusion region of a conductivity type opposite to that of the compound semiconductor which is diffused from the surface of the compound semiconductor, and a first layer formed on the surface of the compound semiconductor including the diffusion region in order from the bottom. the light-impermeable part has a laminated structure of an insulating film, a light-impermeable film, and a second insulating film that handles the light-impermeable film, and the light-impermeable part has a light-emitting window on the diffusion region. Semiconductor light emitting device with % characteristics.
(2)上記光不透過膜は金属膜もしくは半導体膜とした
ことを特徴とする特許請求の範囲第1項記載の半導体発
光装置。
(2) The semiconductor light emitting device according to claim 1, wherein the light-opaque film is a metal film or a semiconductor film.
(3)上記第1および第2の絶縁膜はそれぞれ5i5N
4.5102およびAt203のいずれかで構成したこ
とを特徴とする特許請求の範囲第1または第2項記載の
半導体発光装置。
(3) The first and second insulating films are each 5i5N.
4. The semiconductor light emitting device according to claim 1 or 2, characterized in that it is constructed of either At203 or At203.
JP57106513A 1982-06-21 1982-06-21 Semiconductor light emitting device Pending JPS58223382A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57106513A JPS58223382A (en) 1982-06-21 1982-06-21 Semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57106513A JPS58223382A (en) 1982-06-21 1982-06-21 Semiconductor light emitting device

Publications (1)

Publication Number Publication Date
JPS58223382A true JPS58223382A (en) 1983-12-24

Family

ID=14435494

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57106513A Pending JPS58223382A (en) 1982-06-21 1982-06-21 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPS58223382A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5038186A (en) * 1988-11-07 1991-08-06 Mitsubishi Denki Kabushiki Kaisha Light emitting diode array
US5105236A (en) * 1989-06-23 1992-04-14 Eastman Kodak Company Heterojunction light-emitting diode array
WO2004008549A3 (en) * 2002-07-11 2004-10-14 Qinetiq Ltd Photodetector circuits

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5038186A (en) * 1988-11-07 1991-08-06 Mitsubishi Denki Kabushiki Kaisha Light emitting diode array
US5105236A (en) * 1989-06-23 1992-04-14 Eastman Kodak Company Heterojunction light-emitting diode array
WO2004008549A3 (en) * 2002-07-11 2004-10-14 Qinetiq Ltd Photodetector circuits

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