JPS5821813A - Method of producing multilayer ceramic condenser - Google Patents

Method of producing multilayer ceramic condenser

Info

Publication number
JPS5821813A
JPS5821813A JP56119316A JP11931681A JPS5821813A JP S5821813 A JPS5821813 A JP S5821813A JP 56119316 A JP56119316 A JP 56119316A JP 11931681 A JP11931681 A JP 11931681A JP S5821813 A JPS5821813 A JP S5821813A
Authority
JP
Japan
Prior art keywords
paste
binder
multilayer ceramic
dielectric
internal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56119316A
Other languages
Japanese (ja)
Other versions
JPS6347134B2 (en
Inventor
山田 成一
松崎 壽夫
信吉 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56119316A priority Critical patent/JPS5821813A/en
Publication of JPS5821813A publication Critical patent/JPS5821813A/en
Publication of JPS6347134B2 publication Critical patent/JPS6347134B2/ja
Granted legal-status Critical Current

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  • Ceramic Capacitors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は多層セラミックコンデンザの製造方法の改良に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in the method of manufacturing multilayer ceramic capacitors.

従来多層セラミックコンデンザの製造方法には大別して
次の2方法がある。その第1はM’y YIi体粉末を
有(幾バインダー系中に分散して泥I!j7とな17、
これをシート状に形成し、このグリーンシートに内部電
極を印刷し、このグリーンシートの何枚かを;i1!i
み矩ねて加熱加圧により一体にして多層化し、次いでチ
ップに切断しパーンアウト及び)シ(5成を行なったの
しi>++ij+電極を形成してコンデンサとするグリ
ーンシート積)・5法であり、第2は誘′−12体粉末
を上記と同様にバインダ系に分散してペースト状となし
、この誘電体ベーストと内部電極ベーストを何らかの基
体の上で交互にスクリーン印刷して多))4化し、次い
でチップに切断しパーンアウト及び焼成を行なったのち
端子電二庵を形成してコンデンサとする印刷法である。
Conventional methods for manufacturing multilayer ceramic capacitors can be roughly divided into the following two methods. The first has M'y YIi body powder (dispersed in a binder system to form mud I!j7,
Form this into a sheet, print internal electrodes on this green sheet, and print some of these green sheets; i1! i
It is squared and integrated by heating and pressure to form a multi-layered product, then cut into chips and punched out. The second method is to disperse the dielectric-12 powder in a binder system to form a paste in the same manner as above, and then screen-print the dielectric base and internal electrode base alternately on some kind of substrate. ) This is a printing method in which the capacitor is made into a capacitor by cutting into chips, punching out and firing, and then forming terminals.

このような多層セラミックコンデンサの製造方法におい
て、積層法、印刷法の何れにおいても、グリーンシート
、芯電体ペース)・と内部電極ペースト(主としてPd
−Ag)のバインダ系およびその添加f、′cがマツチ
ングしてない場合、パーンアウトおよび焼成中にR:5
開削IJLc、 (デラミネーション)又は表「11に
割れが発生する。デラミネーションは誘電体中のバイン
ダ化rが少々く且っ内部型・1カベ−21・中のバイン
ダが少ない場合に発生し、表面の割れは誘電体中のバイ
ンダが多く内部電材イベースト中のバインダが少ない場
合に発生し易い。両者のバインダを多くするとこのよう
なことは起らないが容けが減少する不具合を生ずる。本
発明はこの間i・qを解決するために案出されたもので
ある。
In the manufacturing method of such multilayer ceramic capacitors, in both the lamination method and the printing method, green sheets, core conductor paste) and internal electrode pastes (mainly Pd
- If the binder system of Ag) and its additions f and 'c are not matched, R: 5
Open-cut IJLc, (Delamination) or Table 11 cracks occur.Delamination occurs when the binder in the dielectric is a little low and there is little binder in the internal mold, 1 wall, 21, Surface cracking is likely to occur when there is a lot of binder in the dielectric material and there is little binder in the internal electric material base.If both binders are increased, this will not occur, but the problem will be that the capacity will be reduced.The present invention was devised during this period to solve i and q.

このため本発明においては、積層法又は印刷法を用いる
多ハ・フセラミックコンデンサの製造方法において、グ
リーンシート及び誘電体ペーストと内部電N24ペース
トのバインダは全べて同じ組成のものを用い、且つそれ
ぞれのバインダ添加量は、グリーンシート及び誘+1ヱ
体ベーストを等しくシ、内部電、(眞ペーストはグリー
ンシー;・及び訪′1y体ペーストの50〜80%とし
たことを特徴とするものである。
Therefore, in the present invention, in the method of manufacturing a multi-half ceramic capacitor using a lamination method or a printing method, the green sheets and the binders of the dielectric paste and the internal electric N24 paste all have the same composition, and The amount of each binder added was equal to that of the green sheet and the dielectric base, and was 50 to 80% of the amount of the green sheet and the dielectric paste. be.

以下来施例に基いて本発明を詳に((1に説明する。The present invention will be explained in detail below based on Examples ((1).

実屓′4例−1 先ず平均粒径1.2μmのセラミック粉末(1250℃
で・b゛1−成可能)を下記のバインダ系に分散させ誘
電体ペーストを作成した。
Actual Example 4-1 First, ceramic powder with an average particle size of 1.2 μm (1250℃
A dielectric paste was prepared by dispersing the following binder system in the following binder system.

第1表 一方50 Ag −50Pd (平均粒径i、 5tt
m )粉末を誘′「B体間−ストのバインダ(樹脂十可
塑剤)の30.40,50,60,70.80,90゜
1、00重量%(でなるようカバインダ系に分散し内部
電Cペーストを作成した。この際分散剤の添加−訃は誘
電体ペーストと同じにし、溶剤はテルピネオールを用い
、この量をバインダ添加量とともに変化させ同一粘度と
した0 次に基体の上に誘電体ペーストを250μmの厚さに塗
布し、この上に内部′1メペーストをスクリーン印刷に
てA′勺8μmのIi<さに塗布する。次いで内部゛〔
匠1.ジベースト上に誘電体ペーストを40μn1の厚
さに塗布する。この操作を21回繰返した後、最後に詩
′市体ベースI・を250μm塗布する。スクリーン印
刷による塗布後は全ぺて120℃で8〜10分乾燥した
。このように20層(有効な誘′眠体J+O)に多層化
したものから基体を取シ去シ120℃で1時間乾燥後テ
ッゾに切1iaFする。このチップを140℃×4時間
→160℃×4時間→200℃×10時間のパーンアウ
トを行なった後、1250℃で3時間焼成した(昇温速
度200’/時)。
Table 1 On the other hand, 50 Ag -50Pd (average particle size i, 5tt
m) The powder is dispersed in the binder system so that the amount of 30.40, 50, 60, 70.80, 90% by weight (of the binder (resin and plasticizer)) is An electric carbon paste was prepared.At this time, the addition of a dispersant was the same as that of the dielectric paste, and the solvent was terpineol, and the amount was changed with the amount of binder added to maintain the same viscosity.Next, dielectric paste was added on the substrate. The body paste is applied to a thickness of 250 μm, and the internal paste is applied on top of this by screen printing from A to 8 μm.
Takumi 1. A dielectric paste is applied to a thickness of 40 μn1 on the dibase. After repeating this operation 21 times, a final coating of 250 μm of Shi'ichitai Base I. After coating by screen printing, all the coatings were dried at 120° C. for 8 to 10 minutes. The substrate thus formed into 20 layers (effective sleep-inducing material J+O) was removed, dried at 120° C. for 1 hour, and then cut into Tezzo sheets and subjected to 1iaF. This chip was punched out at 140° C. for 4 hours → 160° C. for 4 hours → 200° C. for 10 hours, and then fired at 1250° C. for 3 hours (temperature increase rate 200'/hour).

これらの焼成したチップに端子電極を取着し完成品とし
た。このチップコンデンサについて特性の6・!j定、
表面割れ及びデラミネーションの有無を調査しその結果
を第2表に示す。
Terminal electrodes were attached to these fired chips to produce a finished product. 6. Characteristics of this chip capacitor! J fixed,
The presence or absence of surface cracks and delamination was investigated and the results are shown in Table 2.

以下金山 第 2 表 但し○印は無し、X印は有りを示す。Kanayama below Table 2 However, the mark ○ indicates no, and the mark X indicates presence.

表より40係以下のものには表面割れ及びデラミネーシ
ョンの発生があり、90チ以上のものは容量不足が生じ
ていることがわかる。50〜80チのものについては−
δを含めてこのような不都合は認められない。
From the table, it can be seen that surface cracks and delamination occur in those with a coefficient of 40 or less, and that capacity is insufficient in those with a coefficient of 90 or more. For those between 50 and 80 inches -
Such inconvenience is not recognized including δ.

実施例−2 実施例−1と同じバインダ、分散剤を用い、溶剤として
メチル・エチル・ケトンを用いて泥漿を作成し、厚さ5
0μmのグリーンシートを作成した。内部電極ペースト
も実施例1と同じバインダ、分散剤でm剤を変えたペー
ストを作成した。この内部電極ペースI・の溶剤は蒸発
速度が速く上記グリーンシートを々るべく侵さないもの
を用いた。
Example-2 Using the same binder and dispersant as in Example-1, a slurry was made using methyl ethyl ketone as a solvent, and the slurry was made to a thickness of 5.
A 0 μm green sheet was created. An internal electrode paste was also prepared using the same binder and dispersant as in Example 1, but with a different m agent. The solvent used for this internal electrode paste I was one that had a high evaporation rate and did not attack the green sheet as much as possible.

そして前記グリーンシートに前記内<ry r電極ペー
ストを印刷l〜乾燥したものを21枚;jlみ重ね、そ
の上下に内部αzレスペーストを印刷してないグリーン
シートを5枚づつ重ね、100℃+10Qk広かにおい
て積層し、これをチップに切断後実施例−1と同じ方法
でチップコンデンサとなし、表面割れとデラミネーショ
ンの有無及び特性測定を行なった。その語間1に1:実
施例1と全く同様であった。
Then, 21 pieces of the above-mentioned <ry r electrode paste printed on the green sheet and dried were stacked on top of each other, and 5 green sheets each without the internal αz-res paste printed on top and bottom were stacked, and heated at 100°C + 10Qk. After laminating the capacitors in a wide area and cutting them into chips, they were made into chip capacitors in the same manner as in Example 1, and the presence or absence of surface cracks and delamination and characteristics were measured. 1 in 1 between words: Exactly the same as in Example 1.

以上話(λ明した如く本発明の多層セラミックコンデン
ツの製造方法は誘電体と内部′1・i君、スペーストの
バインダに同じものを使用するため積層時あるいは印刷
時に内部電極ベーストが誘電体によく接着し剥陥を生ず
ることはガい。また内部゛電極ベーストのバインダ量を
誘電体のそれの50〜80チに規定することによシブラ
ミネーション及び表面割れを防止することができた。
As mentioned above, the method for producing multilayer ceramic contents of the present invention uses the same binder for the dielectric and the internal space. It adheres well to the electrode base and does not cause peeling.Furthermore, by setting the amount of binder in the internal electrode base to 50 to 80 times that of the dielectric, it was possible to prevent scablamination and surface cracking.

々お容量がでるでないは誘電体の焼成収縮率と内部電極
ベーストの焼成収縮率に左右され、内部+’i(極ペー
ストの焼成収縮率が誘電体のそれよシも大きい場合に容
量がでなくなる。上記焼成収縮率は誘電体に用いられて
いるセラミック粉末の粒径および内部電極ベーストに用
いられるPd−Ag粉末の粒径に影響されるがセラミッ
ク粉末の平均粒径が0.5〜311m 、 Pd−Ag
粉末の平均粒径が0.5〜3μmの間では容量のでなく
なるバインダ量およびデラミネーション、表面割れの発
生するバインダ量は殆ど同じである。従って本発明の範
囲内であれば安全である。
Whether or not the capacitance is increased depends on the firing shrinkage rate of the dielectric and the firing shrinkage rate of the internal electrode base. The above firing shrinkage rate is influenced by the particle size of the ceramic powder used for the dielectric and the particle size of the Pd-Ag powder used for the internal electrode base, but if the average particle size of the ceramic powder is 0.5 to 311 m. , Pd-Ag
When the average particle size of the powder is between 0.5 and 3 .mu.m, the amount of binder at which capacity is lost and the amount of binder at which delamination and surface cracking occur are almost the same. Therefore, it is safe within the scope of the present invention.

特許出願人 富士通株式会社 々ζ許出願代理人 一7’F哩士青木 朗 弁理士西舘和之 弁理士 内 1)幸 男 弁理士  山  口  昭  之patent applicant Fujitsu Limited - ζ Permit application agent 17’F Officer Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney 1) Yukio Patent attorney Akira Yamaguchi

Claims (1)

【特許請求の範囲】[Claims] 1、j、□絹5法又は印刷法を用いる多層セラミックコ
ンデンザの製造方法において、グリーンシート及び:’
jKj ′I!イ1体ペーストと内部型1・51ペース
トのバインダは全べて同じ組成のものを用い、旧、つそ
れぞれのバインダ添力旧l、1は、グリーンシート及び
訪′1d体べ〜ストを等しくシ、内部型11ジベースト
はグリーンシート及び誘電体ベーストの50〜80俤と
i〜たことをl待機とする多;帝士ラミックコンデンサ
の製造方法。
1, j, □ Silk 5 In a method for manufacturing a multilayer ceramic capacitor using the method or printing method, a green sheet and:'
jKj 'I! The binders for the A1 body paste and the internal mold 1/51 paste are all of the same composition, and the binder additives for each of the former and The manufacturing method of Teishi Ramic capacitors is that the internal type 11 dibase is 50 to 80 layers of green sheet and dielectric base.
JP56119316A 1981-07-31 1981-07-31 Method of producing multilayer ceramic condenser Granted JPS5821813A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56119316A JPS5821813A (en) 1981-07-31 1981-07-31 Method of producing multilayer ceramic condenser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56119316A JPS5821813A (en) 1981-07-31 1981-07-31 Method of producing multilayer ceramic condenser

Publications (2)

Publication Number Publication Date
JPS5821813A true JPS5821813A (en) 1983-02-08
JPS6347134B2 JPS6347134B2 (en) 1988-09-20

Family

ID=14758425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56119316A Granted JPS5821813A (en) 1981-07-31 1981-07-31 Method of producing multilayer ceramic condenser

Country Status (1)

Country Link
JP (1) JPS5821813A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6949822B2 (en) * 2000-03-17 2005-09-27 International Rectifier Corporation Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance
JP2019212746A (en) * 2018-06-05 2019-12-12 太陽誘電株式会社 Ceramic electronic component and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6949822B2 (en) * 2000-03-17 2005-09-27 International Rectifier Corporation Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance
JP2019212746A (en) * 2018-06-05 2019-12-12 太陽誘電株式会社 Ceramic electronic component and manufacturing method thereof
US11688556B2 (en) 2018-06-05 2023-06-27 Taiyo Yuden Co., Ltd. Ceramic electronic device with inflected external electrodes

Also Published As

Publication number Publication date
JPS6347134B2 (en) 1988-09-20

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