JPS58214958A - Synchronizing data transfer system of multi-processor system - Google Patents

Abstract

PURPOSE:To realize simply a synchronizing data processing system, by providing a synchronizing port to each of plural microprocessors and setting the synchronizing data and interruption signal transfer lines between the synchronizing ports to transfer the synchronizing data. CONSTITUTION:An external input/output device 8 is connected to microprocessors of a main system 11 and a secondary system 12 via input/output interfaces 9 and 10 respectively. Each microprocessor contains synchronizing data interruption control circuits 15 and 16 and synchronizing data input/output interfaces 13 and 14. Then both microprocessors are connected to each other via a synchronizing data transfer line 17 and an interruption signal transfer line 18 to form synchronizing ports. When the synchronizing data is transferred between both microprocessors, an interruption is applied to a microprocessor from the other one. Thus the synchronizing data is transferred by the output and input instructions. In such a way, it is possible to form an economical multi-processor system which excludes a special synchronizing monitor device. This system can be applied to a system including >=2 structures.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention allows two microprocessors to execute the same process in parallel, performs a match check on both microprocessors, and detects a failure in one of the microprocessors. This invention relates to a synchronous data transfer method for multiprocessor systems in which microprocessors of other systems automatically operate independently.

In the conventional synchronous data transfer method of a dual-system multiprocessor system, as shown in Figure 1, a common computer clock is supplied to both the main system 1 and slave system 2 microprocessors by a clock generator 7. This is a method in which synchronization is performed at the level, and the synchronization monitoring device 6 monitors the synchronization operation when data is transferred to the external input/output device 6.

For this reason, synchronization processing by software is not required, and synchronization can be achieved at high speed. However, the structure of the synchronization monitoring device is complicated, resulting in high costs, and it has not been widely used.

The present invention has been made in view of the above problems, and it is difficult to synchronize two microprocessors by normally operating them independently and using interrupts when synchronization is required. The object of the present invention is to provide an economical synchronous data processing method for a multiprocessor system that does not require a synchronous monitoring device.

Hereinafter, the present invention will be explained with reference to the drawings and embodiments.

FIG. 2 is a block diagram of a dual-system multiprocessor system showing one embodiment of the present invention. The external input/output device 8 is connected to the main system 11 through input/output interfaces 9 and 10. A slave system 12 microprocessor is connected. Synchronous data is mutually transferred via interrupt control circuits 15, 16, synchronous data input/output interfaces 13, 14, and a synchronous port consisting of a synchronous data transfer line 1 and an interrupt signal transfer line 18.

The synchronous data transfer method will be explained with reference to FIG. For example, if the slave microprocessor 12 requests synchronization at a time when it is necessary to lose synchronization such as during data transfer with an external device, an output command interrupts the main microprocessor 11. The main microprocessor 11i receives an interrupt, and takes in synchronized data using an input command in the interrupt processing and stores it in a buffer.

If the main microprocessor 11 requests synchronization,
Comparison and verification are performed using the synchronization data from the slave microprocessor 12 that has already been taken into the buffer, and the results are returned to the slave microprocessor 12. If synchronization data from the slave microprocessor 12 is not in the buffer when synchronization is requested by the main microprocessor 11, it waits until it is input. The procedure for transferring synchronized data to the slave microprocessor 12 is similar to that described above.
- generates an interrupt to slave microprocessor 12;
Import it into the buffer using the input command. After this, both systems continue to operate synchronously.

As explained above, in the present invention, when transferring synchronous data between two microprocessors, one microprocessor interrupts the other microprocessor, and the synchronous data is transferred using an output command and an input command. Therefore, even if there is a synchronization difference between the two microprocessors, it is possible to achieve synchronization by using interrupts to transfer synchronized data to the other microprocessor.
By simply adding a simple synchronization port to a single microprocessor, an economical multiprocessor system can be obtained without requiring any special synchronization monitoring equipment.

In the embodiment, a dual-system system has been described, but the present invention can also be applied to a system using more microprocessors.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a conventional dual system system, FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention,
FIG. 3 is a flowchart showing the processing procedure of the present invention. 1...Main processor, 2...Slave processor, 3.4...External input/output interface, 6...External input/output device, 6.・・・・・・
Synchronous monitoring device, 7... Clock generator,
8... External input/output device, 9.10...
External input/output interface, 11...Main processor, 12...Slave processor, 13.1
4...Synchronized data input/output interface, 1
6.16... Interrupt control circuit, 17...
- Synchronous data transfer line, 18... Interrupt signal transfer line. Name of agent: Patent attorney Toshio Nakaichio and one other figure 1 Figure 5 Figure 2/7

Claims (1)

[Claims] first and second microprocessors, each comprising a synchronization port connected to the two microprocessors, and a synchronization data transfer line connecting the two synchronization ports, and transmitting synchronization data between the two microprocessors. A synchronous data transfer method for a multiprocessor system, characterized in that when performing transfer, an interrupt is generated from one of the microprocessors to the other microprocessor, and the synchronous data is transferred in accordance with an output command and an input command. .