JPS5821335A - Etching method for semiconductor wafer - Google Patents
Etching method for semiconductor waferInfo
- Publication number
- JPS5821335A JPS5821335A JP11763281A JP11763281A JPS5821335A JP S5821335 A JPS5821335 A JP S5821335A JP 11763281 A JP11763281 A JP 11763281A JP 11763281 A JP11763281 A JP 11763281A JP S5821335 A JPS5821335 A JP S5821335A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- etchant
- temperature
- bath
- liquid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【発明の詳細な説明】 この発明は半導体ウェハのエツチング方法に関する。[Detailed description of the invention] The present invention relates to a method for etching semiconductor wafers.
半導体素子が形成される半纏体ウェハは半導体のインゴ
ットにスライシングを施してウェハ状とし、これにラッ
ピング、ケミカルエツチング、ボリシング等の工程を施
して製造されていた。そして、スライシング工程では反
りの低減、他の工程では両主面の平行度と平面性の向上
のための改良が進められつつある。最近、半導体ウェハ
の大径化が進み、例えば100■φのものが用いられる
よう6二なるとともに、半導体素子におけるパターンの
微細化のために上記平面性その他の性状の向上が強く要
望されるよう(二なpつつある。A semi-integrated wafer on which semiconductor elements are formed is manufactured by slicing a semiconductor ingot into a wafer shape, which is then subjected to processes such as lapping, chemical etching, and boring. Improvements are being made to reduce warpage in the slicing process and to improve parallelism and flatness of both principal surfaces in other processes. Recently, semiconductor wafers have become larger in diameter, for example, 100 mm in diameter, and as the patterns in semiconductor devices become finer, there is a strong demand for improved flatness and other properties. (It's getting worse.
2ツピング[に施されるタイカルエツチングに従来第1
図に示すようなエツチング装置によって次のように行な
われていた。すなわち、複数の半導体ウェハ(1)、
(1’)・・・を夫々が水平かつ複数段暑二収納する円
筒形の回転ケージ(2)に入れ、エツチング液槽(3)
内のエツチング液(4)中に浸漬する。上記エツチング
液は所望の温度に維持されるよう温度検出部(5)とこ
れに連動するヒータ(6)が設置られている。また回転
ケージ株円筒形の軸を中心に液中で回転される。さらに
前記回転と同時に上下動も併せ行う。Traditionally, it is the first type of traditional etching applied to 2-pings.
The etching process was carried out as follows using an etching device as shown in the figure. That is, a plurality of semiconductor wafers (1),
(1')... are placed in a cylindrical rotating cage (2) that stores horizontally and in multiple stages, and placed in an etching liquid tank (3).
immerse it in the etching solution (4). A temperature detecting section (5) and a heater (6) interlocked with the temperature detecting section (5) are installed so that the etching solution is maintained at a desired temperature. The rotating cage also rotates in the liquid around a cylindrical axis. Further, at the same time as the rotation, vertical movement is also performed.
上記従来のエツチング方法にはエツチング中心=エツチ
ング液の上部と下部との間に温度差を生ずるという欠点
がある。このため、均一なエツチングが行なえず、ラッ
ピングの精度を損するので対策が要望されていた。The above-mentioned conventional etching method has the disadvantage that a temperature difference is generated between the etching center (the upper part and the lower part of the etching solution). For this reason, uniform etching cannot be performed and the precision of wrapping is impaired, so countermeasures have been required.
この発明は上述の従来方法の欠点を改良するためになさ
れたもので、仕上ラッピング後の半導体ウェハをエツチ
ング液槽内にてケミカルエツチングを施す1二あたり、
エツチング液内にて半導体ウェハの回転と上下動、液温
コントロールおよびエツチング液の下部6二バブリング
を施し、エツチング液の上部と下部との間に生ずる温度
差を無くするようにしたものである。This invention was made in order to improve the drawbacks of the above-mentioned conventional method.
The semiconductor wafer is rotated and moved up and down in the etching solution, the temperature of the solution is controlled, and the etching solution is bubbled in the lower part of the etching solution to eliminate the temperature difference between the upper and lower parts of the etching solution.
以下に不発明を1実施例につき詳細に説明する。The invention will be explained in detail below with respect to one embodiment.
この発明の方法6二用いられるエツチング装置は第2図
に示すように、従来の装置を示す弗1図に対しエツチン
グ液に対するバブリングを施すための噴気部員をエツチ
ング液槽の下部に備えた点のみ異なり、エツチング方法
としては従来方法における半導体ウェハの回転と上下動
、液温のコントロールを施す点は変らず、これらに加え
てエツチング液の下部にバブリングを施すものである。The etching apparatus used in method 62 of this invention is as shown in FIG. 2, in contrast to the conventional apparatus shown in FIG. Differently, the etching method is the same as the conventional method in that the rotation and vertical movement of the semiconductor wafer and the liquid temperature are controlled, but in addition to these, bubbling is applied to the lower part of the etching liquid.
このバブリングはエツチング容器の大きさ、深さ、エツ
チング時間等によって実験的に強度を調節して施す。ま
た、とのバブリングのための噴気気体は空気でよいが、
エツチング液の保−のためには電素のような非酸化性ガ
スが適する。The intensity of this bubbling is experimentally adjusted depending on the size, depth, etching time, etc. of the etching container. In addition, the fumarole gas for bubbling with may be air, but
A non-oxidizing gas such as an electron is suitable for storing the etching solution.
仁の発明によれば、エツチング液の上部と下部との温度
差がきわめて低減し工゛ツチングの均一性が向上し、所
望のフラットエツチングが達成できる。なお、従来の方
法によるエツチングでは一般に10℃前後の温度差を生
じエツチング速度で約2倍の差があったが、実施例によ
れば1℃以下になり、大口径の半導体ウェハのケミカル
エツチングを良好にする。According to Jin's invention, the temperature difference between the upper and lower parts of the etching solution is extremely reduced, the uniformity of etching is improved, and the desired flat etching can be achieved. In addition, in conventional etching methods, there was generally a temperature difference of around 10°C and a difference of about twice the etching speed, but according to the example, the temperature difference was less than 1°C, making it possible to chemically etch large-diameter semiconductor wafers. make it good.
si図は従来のケミカルエツチングの装置の概略を示す
断面図、第2図#′il実施例のケミカルエツチングの
装置の概略を示す断面図である。
1、l′・・・ 半導体ウェハ
3 エツチング液槽
4 エツチング液
10 (バブリングの)噴気部代理人
弁理士 井 上 −男Figure si is a sectional view schematically showing a conventional chemical etching apparatus, and Figure 2 is a sectional view schematically showing a chemical etching apparatus of the embodiment. 1, l'... Semiconductor wafer 3 Etching liquid tank 4 Etching liquid 10 (Bubbling) Blower agent
Patent Attorney Inoue - Male
Claims (1)
てケミカルエツチングを施す(二あたり、エツチング液
内にて半導体クエへの回転と上下動、液温コントロール
およびエツチング液の下aSニバブリングを施すことを
特徴とする半導体ウェハのエツチング方法。After final lapping, the semiconductor wafer is subjected to chemical etching in an etching liquid bath (characteristics include rotation and vertical movement of the semiconductor wafer in the etching liquid, liquid temperature control, and aS nibbling under the etching liquid). A method for etching semiconductor wafers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11763281A JPS5821335A (en) | 1981-07-29 | 1981-07-29 | Etching method for semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11763281A JPS5821335A (en) | 1981-07-29 | 1981-07-29 | Etching method for semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5821335A true JPS5821335A (en) | 1983-02-08 |
Family
ID=14716514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11763281A Pending JPS5821335A (en) | 1981-07-29 | 1981-07-29 | Etching method for semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5821335A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5035769A (en) * | 1989-10-04 | 1991-07-30 | The United States Of America As Represented By The United States Department Of Energy | Nondestructive method for chemically machining crucibles or molds from their enclosed ingots and castings |
-
1981
- 1981-07-29 JP JP11763281A patent/JPS5821335A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5035769A (en) * | 1989-10-04 | 1991-07-30 | The United States Of America As Represented By The United States Department Of Energy | Nondestructive method for chemically machining crucibles or molds from their enclosed ingots and castings |
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