JPS58209140A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain the device of high reliability easily by forming a SiO2 film onto an Si substrate, selectively forming a poly Si film, coating the surface with an Si3N4 mask, simultaneously oxidizing the poly Si film and the Si substrate and forming a field oxide film. CONSTITUTION:The poly Si layer 4 is vapor-grown onto a thermal oxide film 3 on the P type Si substrate 1 and patterned, the surface is coated with the Si3N4 masks 5', 5'', and the field oxide film 6 is formed through thermal oxidation. Poly Si 4 not masked is changed completely into SiO2 at that time. When the masks 5', 5'' are removed, the SiO2 film 3 is removed and SiO2 7, 8 of approximately 10<3>Angstrom thickness are each formed onto the Si substrate and poly Si at the same time, two regions 9, 10 surrounded by the field oxide film are obtained. A poly Si layer 11 is formed selectively, and the device in which different elements are contained on the Si substrate can be formed in accordance with a normal method.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an improved semiconductor device, and more particularly, to a method for manufacturing an improved semiconductor device including different elements on a semiconductor substrate, by simultaneously oxidizing a polycrystalline Si film and the substrate.
This invention relates to a novel method for manufacturing a semiconductor device including a step of forming a =i shadow.

Conventionally, regarding the manufacturing method of this type of semiconductor device, a method relatively similar to the present invention is disclosed in "Japanese Patent Application No. 1983" by the same inventor.
-17153”. The method for manufacturing a semiconductor device presented in the prior art includes a step of forming a first insulating film on one main surface of a semiconductor substrate, and a step of forming a conductive film made of a conductor or a semiconductor on the first insulating film. a step of forming an oxidation-resistant film on the conductive film; and a step of forming an acid-resistant film on the conductive film.
What is the selective removal process and the remaining oxidation-resistant insulating film?
The method includes a step of forming a field insulating film as a mask using a thermal acid method.

The purpose of the present invention is to manufacture a semiconductor device which is basically based on a concept relatively similar to the prior art as described above, but which is very effective in manufacturing a large number of different elements within the same semiconductor substrate. It is about providing law.

The method for manufacturing a semiconductor device of the present invention includes a step of forming a first insulating film on the main surface of a predetermined semiconductor substrate, a step of forming a semiconductor film thereon and applying reversing, and a step of applying the semiconductor film pattern and the first insulating film. Forming a second insulating film having acid resistance covering the semiconductor film and separating the first region partially covering the semiconductor film and the second region on the first insulating film by performing revertaning. Selective remaining page process, this? Make it a mask @
A step of forming a thick field insulating film by simultaneously oxidizing the semiconductor substrate and the semiconductor film other than the 1.2 region, and a step of forming different elements in the n-1.2 region surrounded by this field insulating film. Contains. Further, in another method of manufacturing a semiconductor device of the present invention, the second method of the above description is provided.
After patterning the insulating film, the first insulating film and the multilayer film of the semiconductor film and the first insulating film are transmitted through the first insulating film and the multilayer film of the semiconductor film and the first insulating film by a total ion implantation method of the same conductivity type as the substrate. According to the method of manufacturing a semiconductor device of the present invention as described above, which includes the step of forming a region of the same conductivity type as the substrate, which becomes a diffusion layer directly under the field insulating film, by adding the acid near the surface of the substrate. There is no need to etch the semiconductor film after patterning the second insulating film having the same characteristics, so that the first insulating film is not excessively exposed to the etchant of the semiconductor film, and is therefore sufficient as the first insulating film. Thin film thickness can be used.

In addition, since the semiconductor film can be partially covered with an acid-resistant insulating film, the entire semiconductor film itself can be made as thin as possible to the minimum necessary thickness, and therefore, the unevenness on the surface of the device can be completely eliminated and smoothed, and the acid-resistant insulating film can be used as a mask. When forming a thick field oxide film by the thermal oxidation method, it is possible to reduce the lateral penetration of the field oxide film into the first region to the same level as that in the second region, and to form a thick field oxide film using the ion implantation method. Advantages such as the ability to easily add impurities of the same type to the vicinity of the substrate surface by transmitting the same type of impurity through the semiconductor film and the first insulating layer can be obtained. Therefore, according to the present invention, a semiconductor device with excellent q# properties and high reliability can be easily exploded at a high yield.

Next, to make the characteristics of this invention easier to understand.

When the manufacturing method of the present invention is applied to forming a 5G (Stacked-Gate) type MOS transistor and a normal MO8 transistor on the same gold substrate, several embodiments will be described in detail with reference to the drawings. .

Figures 1 (5) to (5) are cross-sectional model diagrams of main steps in an embodiment of the semiconductor device manufacturing method of the present invention, and Figure 2 is a plan view of Figure 1 (F). Figures 1 (5) to (F') show the A-A cross section in Figure 2. Figure 3 is a plan view of Tomoki, who has proceeded further through the process, and shows the B-B and C-
Figure 4 (A) shows the cross-sectional model diagram of part 0.
, (B). In Figure 1 (5), the specific resistance is approximately 10Ω-α
The main surface 2 of the P-type 8i semiconductor substrate 1 having a surface index (100)'i is coated with a thickness of approximately 5 mm using the thermal acid method of Si substrate.
Grow 5IO2 film 3 of 00X L7t. (B)-1' is 5
102 film 3 is grown in a vapor phase by thermal decomposition of SiH4 in a first polycrystalline Si layer 4fNz with a thickness of about 5001 cm, and after diffusing phosphorus into this to increase conductivity, a well-known PR (Ph
Patterning is performed using oto Re5ist) technology and etching technology.

(In q, a thickness of about 1000XO8ia is formed on the entire surface due to the 8iH4+NHsO thermal reaction, and a gas phase of N4$5=1 is formed.
Next, pattern the Si3N4 film 5 to form a polycrystalline 5i
4=i partially covered part cj,=, separated from this by 2S
Leaving the part on iOz film 3 and other parts? Remove friend, (
In E), using an 8i3N4 model with acid resistance ratio, using f as a mask, the Si substrate 1 and the polycrystalline Si model 4 in the area not covered with 98i 3N4 were simultaneously compared with acid using a thermal acid ratio method to obtain a thickness of approximately Form a field S i02 of 1μ and t5
At this time, the polycrystalline S in the part not covered with the 5iaN4 film
The i film 4 is completely converted into a 5iOz film and is at risk (in the town, we first sniff the 8iaN4, remove it by complete etching, and then remove the
After removing 5I02 layer 3 directly under the i3N4 pattern, 5iQz 7,8'? with a thickness of about 1000X was removed using the hot acid ratio method.
They were formed simultaneously on polycrystalline Si and on a Si substrate, respectively. FIG. 2 is a plan view corresponding to the opening in FIG. 1, and 9.10 in this figure is surrounded by a thick field 5iQz.

A first area portion and a second area portion are shown, respectively. In FIGS. 3 and 4, (B), a second polycrystalline S1 layer 11f 8 i with a thickness of about 50,001 mm is further formed over the entire surface.
After vapor phase growth using H4+N2 system, phosphorus was completely diffused to increase conductivity. Next, the polycrystalline Si layer 11 is patterned using known PR and etching techniques. After that, the 5iQz film 7.81, the first polycrystalline St pattern 4.5102 film 3 is successively applied to the portions not covered by the pattern. Etching removed. Next, using a purple mask for the polycrystalline Si layer 11, Asf ions are implanted into the substrate surface 81 in a self-aligned manner to form an N+ region 12.1.
3.14°15tl-formed. This figure 4 (5), (
As can be easily seen from the cross-sectional model diagram in B), the question is N area 1
2.13' (H respectively source, drain, first polycrystalline S1 layer 4 as floating gate electrode, second polycrystalline Si layer 11
SG (S stacked-Ga
te ) type MOS transistor Gai (b) is N+ region 1
4.15 each shows a MOS transistor having a source and a drain, 5102g3 an 'f-to insulating film, and a second polycrystalline 8i' film 11 as a gate electrode. In the subsequent steps, as shown in FIGS. 5(5) and 5(B), an interlayer PSG (P
After growing a (Ospho-81licate Glass) film 16 in a vapor phase to a thickness of approximately 1.5 μm, source contact holes 17, 19 . Drain contact hole 18.20. Gate contact hole 21
．． 22 to PSG film 16! Open a hole in fp, then make a hole in the thickness of about 1
μ's A! After the film is grown by sputtering.

After patterning, the source extraction electrode 23°25
, drain extraction electrode 24.26. Gate lead-out electrodes 27 and 28' are formed, and the entire device is generally completed.

FIGS. 6(5) and 6(B) show process cross-sectional model diagrams in another embodiment of the method for manufacturing a semiconductor device of the present invention. In this Figure 6, the % prisoner is exposed to P at an energy of 150 kev and a dose of 1 x 1013/d after passing through the mouth in Figure 1.
By implanting all the ions of boron, which is a type conductive impurity, it passes through the multilayer film portion of the di-8iOz film 32, the polycrystalline 81 film 4, and the 5iOz film 3, and is added near the surface of the substrate to form the P+ region 2.
In (B), a P+ region is buried directly under the field 5iO26, and a P+ region is buried directly under the field 5iO26. Fully realized.

It is clear from the description of the text that the above-described embodiments are merely for illustrative purposes and the present invention is not limited thereto. For example, the materials, manufacturing methods, and dimensions of each part of the device can be changed.

There is also a degree of freedom in selecting the 4-electric type. In addition, in the example, SG type M
OS transistors and regular MOS) transistors are the same.
Although the manufacturing method for manufacturing on a semiconductor substrate has been described, there are various other types of semiconductor devices to which the one-piece manufacturing method can be applied.

In short, as herein indicated and in the appended claims, without departing from the spirit and scope of the invention.

Various modifications can be made by those skilled in the art.

[Brief explanation of the drawing]

Fig. 1 (A) to (1') and Fig. 4 (5), (B),
In Figure 5. (to) is a cross-sectional model diagram of the main steps in an embodiment of the semiconductor device manufacturing method of the present invention, and FIGS. 2 and 3 are respectively the opening of FIG. ) is a plan view corresponding to the model. 6(5) and (B) are cross-sectional model diagrams in other embodiments.5 In these boar diagrams, 1...P-type Si semiconductor substrate, 2... ...main surface of 1, 3.7.8...
...5iOz film, 4.11...polycrystalline Si film,
5.5', 1'...Si3N4 film, 6...
...Field 5iQ2 membrane, 9.10...
Pattern edge, 12.13.14.15...
N-type diffusion region, 16...PSG film, 17. f8
゜19.20.21.22...River/contact hole, 23
゜24.25.26.27.28・Old...Aluminum extraction electrode, 29...P+ type diffusion region, [Representatives shown here: Patent attorney Susumu Uchihara (A) ( bsu(D) (E) Crane 1 Illustration entertainment? Zushima J Su(Aノ(βug, 5 concave(A) (B) 62

Claims (2)

[Claims] (1) A step of forming a first insulating film on the main surface of a predetermined semiconductor substrate, a step of forming a semiconductor film on the first insulating film, and a step of determining the shape of the semiconductor film to partially a remaining step, a step of forming a second insulating film having acid resistance on the shape-determined semiconductor film and the first insulating film, and patterning the second insulating film. a step of leaving a first region partially covering the semiconductor film and a second region on the first insulating film separated from the region; forming a thick field insulating film by simultaneously oxidizing the semiconductor substrate and the semiconductor film in the portions not covered by the insulating film with the entire insulating film being masked; A method of manufacturing a semiconductor device, comprising the step of forming different elements in the first region portion and the second region portion. (2) After patterning the acid-resistant (arsenic-resistant) insulating film, a multilayer structure of the first insulating film, the semiconductor film, and the first insulating film is formed by total ion implantation of impurities of the same conductivity type as the substrate. film? A method for manufacturing a semiconductor device according to claim (1), characterized in that the method includes a step of transmitting the second insulating film and adding it to the vicinity of the main surface of the substrate in a portion not covered with the second insulating film.