JPS58200369A - Picture processor - Google Patents

Abstract

PURPOSE:To prevent an error of the check result of an ununiform picture to be checked by allowing a picture processor which finds the number of pictures to be checked and the total area to find cumulative sum data on a small area consisting of picture elements gradually. CONSTITUTION:Time-series picture data dij obtained by a two-dimentional scan is inputted to the 1st shift register 13 of M picture elements by (n) lines to be delayed successively, and each line output is extracted selectively; and sum data Si,j on (n) picture elements is found gradually from picture data, selected line output data, and data stored in the 2nd register in M-stage constitution, and stored successively in the 2nd shift register 16. The cumulative sum data is found gradually from data stored in a cumulative sum register 23, the input sum data to the shift register 16, and selected tap output data si-m,j of the 2nd shift register 16, and then stored in the cumulative sum register 23 to obtain the cumulative sum data on (m)X(n) picture elements.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] ' This invention relates to an image processing device having a simple and highly practical configuration capable of effectively extracting small area-6 features in an image. .

[Technical background of the invention and its problems] □' When inspecting the particle size or flaws on the surface of an object, the above-mentioned inspection object is often input as an image, and the image 6 includes the inspection object within a certain area. Image processing is used to calculate the number and the total area of the inspection target. In this kind of image geography,
Conventionally, in order to shorten the processing time, the entire area to be inspected for ridges is divided into a plurality of small areas, and predetermined 0 image processing is performed within each small area. However, such a processing method is very effective when the inspection target in the image is uniformly distributed over the entire area of the image, but when the distribution is uneven, as shown in Figure 1, for example, If shi exceeds
The problem arises depending on which subregion is to be inspected.

That is, as shown in FIG. 1, focusing on a small area 2 consisting of an (mX,) image of an inspection target image 1 consisting of (MXN) pixels, the number of scratches 3 within this small area 2 is counted and the inspection result is obtained. 2, the number of scratches 3 will vary depending on the setting position of the small area 2, as shown in FIG. 2(,)(b). For this reason, even though the same image 1 is being processed (inspected), the inspection result may pass or fail, which is extremely inconvenient. For this reason, conventionally, when the inspection target is unevenly distributed, it has been necessary to perform image processing over the entire area of the target image 1.

[Purpose of the invention]

The present invention was made in consideration of these circumstances, and its purpose is to locally easily and quickly obtain error-free inspection results even for non-uniform images of the inspection target. The object of the present invention is to provide a highly practical image processing device that can perform the following tasks.

[Summary of the invention]

The present invention inputs time-series pixel data obtained by two-dimensionally scanning an image into a first storage means (M pixels x n lines), sequentially delays the data, and selectively extracts the output of each of these lines. Then, from the image data, the selected line output data, and the data stored in the second storage means of the M stage, the summation data of n pixels is gradually calculated and the second storage means of the M stage is calculated. data stored in the cumulative sum memory and additional data input to the second storage means of the M stages;
Furthermore, by recursively determining the cumulative sum data from the selected tap output data of the second storage means and storing it in the cumulative sum memory, (m
The cumulative sum data of Xn) pixels is obtained.

〔Effect of the invention〕

Therefore, according to the present invention, it is possible to easily and rapidly obtain the cumulative sum data of a small area consisting of (mXn) pixels for an image in a gradual manner.

Moreover, by setting the small area positions for the entire area of the image, the cumulative sum data at each position can be determined with high precision.

This also makes it possible to obtain the sum of densities in small areas of the shading cape image. Therefore, information on the image to be processed can be accurately obtained from any small area, and its practical advantage is enormous. Furthermore, the size of the small area can be arbitrarily varied by selecting the line output and the tap output, which is extremely effective.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

5- Figure 3 shows the calculation principle of this device, and 1 is (
The image to be processed is composed of (MXN) pixels, and 2 indicates a small region of (mXn) pixels that are excluded from the arithmetic processing target. Also 4
1 and 2 respectively show time-series pixels obtained by two-dimensionally scanning the above image 1. In addition, 5 in the figure indicates the above-mentioned small area 2.
This is a hypothetical representation of the sum of data for n247 pixels in the vertical direction, addition data in the vertical direction, and data sum of n pixels in the vertical direction.

Now, the cumulative sum 5i-1,j of the small region 2 consisting of (mX,) pixels has already been found, and the data sum S,5 1-m of each column (vertical direction) in this small region 2, It is assumed that j i-m+Lj 4 s, -1, and j are respectively determined. It is assumed that the next small area 2 to be calculated is shifted to the right by one pixel. In this case, new pixel data dl,j (t,j) is input by scanning, and this data is used to calculate the sum of data for n pixels in that column.

The calculation is based on the already determined data sum Si for that row.
, j-1, pixel data dt, 1-1 one row above
is subtracted, and the above data d12. Adding 6
It is determined as follows: Si, j=Si, j-1+di, j-di, j-n. Then, this newly obtained addition data 8t,j is converted into the previously obtained cumulative sum S of the small area 2,
1. ．． In addition, by adding this row, the leftmost column of the previous small area 2 is deleted and a new small area 2 is set that is shifted one pixel to the right, so subtract the data sum S of the leftmost column. and i-m, j, $i, j=Si-1. The new cumulative sum data of small area 2 is obtained as j+Si,j ''i-m,j.Each time new pixel data d1.3 is input by two-dimensional scanning of image 1, the above-mentioned If calculation processing is performed, (mXn
) The cumulative sum of the small area 2 consisting of pixels can be sequentially obtained.

By the way, at the initial stage of inputting image data d, □, 1. ' is defined by the pixel position (1,j) (mXn
) Small region 2 of pixels is never set for image 1. Then, the small area 2 is determined for the image 1 only when the pixel position (1, j) reaches nine points (m, n). Therefore, for items for which pixel data cannot be obtained before then, by considering pixels virtually and treating all of that data as zero (0), it is possible to calculate the above-mentioned cumulative sum for each of them. becomes. Then, by outputting the cumulative sum data at the time when the data of pixels (m, n) is input, the cumulative sum data of each small area 2 set over the entire area of the image 1 is obtained. Toto becomes possible.

FIG. 4 is a schematic diagram of an apparatus according to an embodiment of the present invention that performs image processing in this manner.

The data of the image to be processed, which is temporarily stored in an image memory or the like, is two-dimensionally scanned by a control device (not shown) and sequentially read out in time series. This time-series pixel data dt,j is led to the adder 12 via the erase selector 11, and also to the first shift register 13 of (M pixels×n lines) stages. This shift register 13 is
The data transfer is driven by the clocking of the pixel data, and the shift register 13 &
n pieces are connected in cascade. Through this shift register 13, the pixel data is delayed by one line each time it passes through one shift register 13&;
Pixel timing has been delayed. Further, the erase selector 11 selects zero (0) prior to inputting the pixel data dl,j.
0) Input the data and use it to shift register 1 above.
3 and other registers to be described later are reset to zero.

Thus, the vertical selector 14 selectively extracts each 2-in output of the first register 13 according to the constant n' set in the register 15, and thereby the pixel data delayed by n' lines. has been taken out. This selector 14 selects pixel data delayed from one line to n lines, and as described later, the column direction size n' of the small area 2 to be processed is determined. It is now possible to

On the other hand, the second shift register 16 corresponding to one line and configured in M stages sequentially stores data S obtained by adding n1 pixels in the column (vertical) direction over one line. Data transfer of the register 16 is also controlled and driven by the clock of the pixel data.

The output data of the second shift register 16 is temporarily stored in the vertical sum register 17 and then applied to the adder 12. In this adder 12, the current input pixel data di, j is added to this output data, and the added data is supplied to a subtracter 18, where the pixel data delayed by n' lines selected by the selector 14 is subtracted. . Then, the output data of this subtracter 18 is
'Pixel addition data S19. The signal is input to the shift register 16 as a signal.

Furthermore, data J input to this shift register 16,
j is led to an adder 19. Furthermore, shift register 1
The data stored in 6 is taken out as a tap output delayed by m' steps in accordance with the value (m') set in the register 21 via the horizontal 10-selector 20. The selected data is then provided to the subtracter 22. In addition, the above selector 2
0 is used to set the width in the horizontal (row) direction of the small area 2 to be processed. The cumulative sum register 23' stores the output data of the subtracter 22 as cumulative sum data of the small area 2, and outputs the data and supplies it to the adder 19. The vertical addition data of a new column, which is the input data to the register 16, is added to the cumulative sum data already determined by the adder 19. Then, the subtracter 22 subtracts the added data delayed by m' pixel positions (columns) from this added data, and creates a new cumulative sum value of the small area 2 shifted by one pixel position. I'm looking for relief.

Then, this data is written into the cumulative sum register 23, and the data is updated.

According to the device configured in this manner, first, the shift registers 13 and 16 are all cleared to @0'', and then the two-dimensionally scanned time-series pixel data d i is input. Then, the pixel data d i and i are sequentially stored in the shift register 13 . At this time, since all of the data sequentially read out from the shift register 13 is zero (0), the pixel data for one line input first is sequentially stored in the shift register 16 as is. When inputting pixel data for the next line (second line), the data read from the shift register 13 is zero (0), and the data from the shift register 16 is read from the same row address one line before. Since the data is read out, the shift register 16 stores data obtained by adding the pixel data of the first and second lines corresponding to the row address positions. In this way, the shift register 16 stores data S1.n1247 pieces of pixel data added in the vertical direction. nl
, S2. nl-8M and nl will be stored respectively. Thereafter, from the time when the pixel data of the (n'+i) line is input, the pixel data delayed by n' lines is sequentially read out from the shift register 13 and given to the subtracter 18. 81,j″5Lj-1+di,j'i,j-n'
The data obtained by incrementally adding n' pixels in the vertical direction will be stored sequentially.

On the other hand, when pixel data is input to the cumulative sum register 23, pixel data d11. is stored and the data is accumulated sequentially until m/pixel data is input. After that, data from m' pixels before is sequentially subtracted m
'7 pixel cumulative sum is stored. Then, the accumulation process is repeated from the 22nd input to the input of the n'th line. n'7
Since pixel addition data 8 is stored respectively,
When the m'th pixel of the (n'+1)th line is input, the cumulative sum of the first small area consisting of (mXn) pixels is determined in the cumulative sum register 23. In other words, each vertical addition data 8i,
According to j, the cumulative sum data of the small region 2, which is the product value, is obtained. Thereafter, each time pixel data is input, the vertical addition data S of one pixel before is subtracted in the subtracter 22, and as described above, St+j=St-1+j +Siej-8t-mcj, which is a small value shifted by one pixel. The cumulative sum data Si, j of the area is sequentially obtained, stored in the cumulative sum register 23, and output.

As described above, according to the present device, along with pixel data that is input in time series through two-dimensional scanning, cumulative sum data of a small area consisting of (m'X n') pixels determined by the data input pixel position is calculated. It can be found sequentially. Furthermore, the arithmetic processing can be performed at high speed in real time. In addition, by selecting the number of delay lines of pixel data and the number of delay pixels of addition data according to the data set in register 15.17/, the size of the small area to be processed can be easily varied arbitrarily14-. I can do it. However, it goes without saying that the setting of this size is limited by the number of lines in the shift register 3 and the number of pixels in one line. Therefore, while setting each small area over the entire area of the image I to be processed,
It is possible to accurately obtain information in that small area. Therefore, there is no possibility of obtaining erroneous inspection results due to non-uniform distribution of the inspection object, which has been a problem in the past, and there is no problem such as having to take measures to set small areas in order to prevent such errors. Conventionally, for inspection of the entire image area (M x N
This enables real-time continuous cumulative sum processing (mXn ''), which requires an enormous amount of calculation processing (X m This has great practical advantages.Also, as mentioned above, the size of the small area can be arbitrarily set, so it is very versatile and can be used for flexible image processing. Furthermore, it is also possible to calculate the local extra-density sum □ of a grayscale image, which makes it possible to perform dynamic and linear binarization processing on images with new set unevenness.

Note that the present invention is not limited to the above embodiments. For example, the number n of constituent lines of the shift register 1s may be determined according to specifications.

Further, instead of the shift register, a RAM may be used and the address thereof may be controlled to perform similar processing. Furthermore, it is also possible to initialize each register with a reset signal and set it to zero without using ``0#0#'' data instead of pixel data.Also, it is possible to perform addition.

Cumulative sum processing is performed using multiple arithmetic circuits installed in parallel□
The different m,
It is also possible to perform image processing on various small regions of H in parallel. In summary, the present invention can be implemented with various modifications without departing from the gist thereof.

[Brief explanation of the drawing]

Figures 1 and 2 (,) (b) are diagrams showing the relationship between images and small areas showing problems in image processing, Figure 3 is a diagram showing the processing concept of the present invention, and Figure 4 is a diagram of the present invention. 1 is a schematic configuration diagram of an apparatus according to an embodiment of the invention. 11... Erase selector, 12... Adder, 1 g.
...First shift register, 14...Vertical selector, 1
6... Second shift register, 17... Relaxation register, 18... Subtractor, 19... Adder, 20...
Horizontal selector, 22... subtractor, 23... cumulative sum register. Applicant's agent Patent attorney Takehiko Suzue-'1.7・- 1!1 Figure 3

Claims (2)

[Claims] (1) A first storage means in a stage (M pixels x n lines) that temporarily stores time-series pixel data obtained by two-dimensionally scanning an image, and selectively outputs each line of this first storage means. The first selector to retrieve the data and M to temporarily store the added data.
a second storage means of the means; and adding the image data input to the first storage means to the output data of the second storage means and subtracting the data selected by the first selector. a first arithmetic circuit that obtains data and inputs it to the second storage means; a second selector that selectively takes out the tap output of the second storage means; and a third circuit that temporarily stores cumulative sum data. and the input data of the second storage means are added to the output data of the third storage means, and the data selected by the second selector is subtracted to obtain the cumulative sum data. IF
! Image processing unit 0 for f9 (2) The image processing apparatus according to claim 1i, wherein each of the first to third storage means is driven to transfer data by a clock of time-series pixel data.
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