JPH0375914B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an image processing device having a simple and highly practical configuration capable of effectively extracting features of small regions in an image.

[Technical background of the invention and its problems]

When inspecting the particle size or flaws on the surface of an object, image processing is often used to input an image of the object to be inspected and calculate the number of objects to be inspected within a certain area of the image and the total area of the objects to be inspected. used. Conventionally, in order to shorten the processing time in such image processing, the entire area to be inspected is divided into multiple small areas, and predetermined image processing is performed within each small area. There is. but,
Such a processing method is very effective when the inspection target in the image is uniformly distributed over the entire area of the image, but if the distribution is uneven, as shown in Figure 1, for example, If so, the question arises as to which sub-area is to be inspected.

That is, as shown in FIG. 1, focusing on a small area 2 consisting of an (m x n) image of an image to be inspected 1 consisting of (M x N) pixels, the number of scratches 3 within this small area 2 is counted. Assuming that the inspection results are obtained using the same method, the number of scratches 3 will vary depending on the setting position of the small area 2, as shown in FIGS. 2a and 2b. For this reason, even though the same image 1 is being processed (inspected), the inspection result may pass or fail, which is extremely inconvenient. For this reason, conventionally, when the inspection target is unevenly distributed, it has been necessary to perform image processing over the entire area of the target image 1.

[Purpose of the invention]

The present invention was made in consideration of these circumstances, and its purpose is to locally easily and quickly obtain error-free inspection results even for non-uniform images of the inspection target. The object of the present invention is to provide a highly practical image processing device that can perform the following tasks.

[Summary of the invention]

The present invention inputs time-series pixel data obtained by two-dimensionally scanning an image into a first storage means (M pixels x n lines), sequentially delays the data, and selectively extracts the output of each of these lines. Then, from the image data, the selected line output data, and the data stored in the second storage means of the M stage, the summation data of n pixels is gradually calculated and the second storage means of the M stage is calculated. The cumulative sum data is obtained from the data stored in the cumulative sum memory, the input addition data to the second storage means of the M stages, and the selected tap output data of the second storage means. By recursively obtaining the data and storing it in the cumulative sum memory, cumulative sum data of (m×n) pixels is obtained in the cumulative sum memory.

〔Effect of the invention〕

Therefore, according to the present invention, it is possible to easily and rapidly obtain the cumulative sum data of a small area consisting of (m×n) pixels for an image in a recursive manner. Moreover, by setting the small area positions for the entire area of the image, the cumulative sum data at each position can be determined with high precision. This also makes it possible to determine the sum of densities in small areas of a grayscale image. Therefore, information on the image to be processed can be accurately obtained from any small area, and its practical advantage is enormous. Furthermore, the size of the small area can be arbitrarily varied by selecting the line output and the tap output, which is extremely effective.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

Figure 3 shows the calculation principle of this device.
indicates a small area of (m×n) pixels to be subjected to arithmetic processing. Further, 4 indicates time-series pixels obtained by two-dimensionally scanning the image 1. Further, numeral 5 in the figure hypothetically shows the vertically added data for n lines of the small area 2, that is, the data sum of n vertical pixels.

Now, the cumulative sum S _i-1,j of the small area 2 consisting of (m×n) pixels has already been found, and the data sum S _in,j of each column (vertical direction) in this small area 2,
It is assumed that S _i-n+1,j to _{S i-1,j} are respectively determined. It is assumed that the next small area 2 to be calculated is shifted to the right by one pixel. In this case, new pixel data d _i,j of (i, j) is input by scanning, and this data is used to calculate the sum of data for n pixels in that column. This calculation involves subtracting the data d i _,jo of the pixels one row above from the already determined data sum S _i,j- 1 for that row, and adding the new data d _i,j . Therefore, S _i,j = S _i,j-1 + d _i,j − d _i,jo . Then, this newly obtained addition data S _i,j is applied to the previously obtained small area 2
In addition to the cumulative sum S _i-1,j of ,
By subtracting the data sum S _{in,j in} the leftmost column, the new cumulative sum data of small area 2 is obtained as S _i,j = S _i-1,j + S _i,j −S _in,j. Desired. In other words, each time new pixel data d _i,j is input by two-dimensional scanning of image 1, if the calculation process described above is performed, the data (m× n) The cumulative sum of the small area 2 consisting of pixels can be successively determined.

By the way, at the initial stage of input of pixel data d, (m
×n) Small area 2 of pixels is never set for image 1. Then, starting from the time when the pixel position (i, j) becomes (m, n), the above-mentioned small area 2
is determined for image 1. Therefore, for those for which pixel data cannot be obtained before then, if we consider the pixels virtually and treat all of their data as zero (0), we can calculate the above-mentioned cumulative sum for each of them. It becomes possible. Then, from the time when the data of pixels (m, n) is input, by outputting the cumulative sum data, the cumulative sum data of each small area 2 set over the entire area of the image 1 is calculated. It becomes possible to obtain.

FIG. 4 is a schematic diagram of an apparatus according to an embodiment of the present invention that performs image processing in this manner.

The data of the image to be processed, which is temporarily stored in an image memory or the like, is two-dimensionally raster scanned by a control device or the like (not shown) and sequentially read out in time series. This time-series pixel data d _i,j is led to the adder 12 via the erasure selector 11 and (M pixels×
(n line) stage first shift register 13. This shift register 13 is driven for data transfer by the clock of the pixel data, and consists of one line and M stages.
n pieces of A are connected in cascade. This shift register 13 allows the pixel data to be 1
Each time it passes through two shift registers 13a, it is delayed by one line, that is, the timing of M pixels is delayed. The erase selector 11 inputs zero (0) data prior to inputting the pixel data d _i,j , thereby resetting each register to be described later including the shift register 13 to zero.

Thus, the vertical selector 14 selectively extracts each line output of the first register 13 according to the constant n' set in the register 15, thereby delaying the line output by n' lines. Pixel data is being extracted. This selector 14 selects pixel data delayed by one line to n lines, and thereby determines the size n' in the column direction of the small area 2 to be processed, as described later. .

On the other hand, the second shift register 16, which is configured in M stages and corresponds to one line, sequentially stores data S over one line by adding n' pixels in the column (vertical) direction. Data transfer in the register 16 is also controlled and driven by the pixel data clock. And this second
The output data of the shift register 16 is temporarily stored in the vertical sum register 17, and then transferred to the adder 12.
given to. In this adder 12, the current input pixel data d _i,j is added to this output data, the added data is supplied to a subtracter 18, and the pixel data delayed by n' lines selected by the selector 14 is subtracted. It will be destroyed. Then, the output data of this subtracter 18 is inputted to the shift register 16 as addition data S _i,j of n' pixels in the vertical direction.

Further, data S _i,j input to this shift register 16 is guided to an adder 19. Furthermore, the data stored in the shift register 16 is taken out via the horizontal selector 20 as a tap output delayed by m' stages in accordance with the value (m') set in the register 21. This selected tap output data is then provided to a subtracter 22. still,
The selector 20 is used to set the width in the horizontal (row) direction of the small area 2 to be processed. The cumulative sum register 23 stores the output data of the subtracter 22 as cumulative sum data of the small area 2.
The data is outputted and also provided to the adder 19. The vertical addition data of a new column, which is the input data to the shift register 16, is added to the cumulative sum data already obtained by the adder 19. Then, the subtracter 22 subtracts the delayed addition data to the m' pixel position (column) from this addition-processed data, and creates new cumulative sum data of the small area 2 shifted by one pixel position. I'm looking for. Then, this data is written into the cumulative sum register 23, and the data is updated.

According to the device configured in this way, first, the shift registers 13 and 16 are all cleared to "0", and then the two-dimensionally scanned time-series pixel data is
d _i,j is input. And shift register 13
The pixel data d _i,j are sequentially stored in . At this time, since all of the data sequentially read out from the shift register 13 is zero (0), the pixel data for one line input first is sequentially stored in the shift register 16 as is. Then, the next line (second line)
When inputting pixel data, the shift register 1
Since the data read from pixel 3 is zero (0), and data at the same row address one line before is read from the shift register 16, the shift register 16 contains pixel data of the first and second lines. The added data corresponding to the row address positions will be stored. In this way,
The shift register 16 contains data S _1,o ′, in which pixel data for n′ lines are added in the vertical direction, respectively.
S _2,o ′ to _{S M,o} ′ are respectively stored. Thereafter, from the time when the (n'+1) line of image data is input, the pixel data delayed by n' lines is sequentially read out from the shift register 13 and given to the subtracter 18. The data of S _i,j =S _i,j-1 +d _i,j −d _i,jo ′, which is progressively added by n′ pixels in the horizontal direction, is stored sequentially.

On the other hand, the cumulative sum register 23 stores pixel data d _1,1 when pixel data is input, and the data is sequentially accumulated until the data of m' pixels is input. After that, the cumulative sum of m' pixels is stored, which is obtained by sequentially subtracting the data of m' pixels before. The accumulation process is repeated from the second line to the input of the n'th line. Thereafter, when the data of the (n'+1)th line is input, the shift register 16 has already stored the summed data S of each n' pixel in the vertical direction, so the data of the (n'+1)th line is inputted. When the m'-th pixel is input, the cumulative sum of the first small area consisting of (m×n) pixels is calculated in the cumulative sum register 23. In other words, the cumulative sum data of the small area 2, which is the cumulative value, is determined according to each vertical addition data S _i,j . Thereafter, each time pixel data is input, the vertical addition data S of the previous pixel is subtracted in the subtracter 22, and as described above, 〓 _i,j =〓 _i-1,j +S _i,j −S _in ′ _,j , cumulative sum data of a small area shifted by one pixel 〓 _i,j are sequentially obtained, stored in the cumulative sum register 23, and output.

As described above, according to the present device, along with pixel data input in time series through two-dimensional scanning, the cumulative sum of a small area consisting of (m'×n') pixels determined by the data input pixel position Data can be obtained sequentially. Moreover, the subtraction process can be executed at high speed in real time. Also register 1
By selecting the number of delay lines of pixel data and the number of delay pixels of addition data based on the data set to 5 and 17, the size of the small region to be processed can be easily varied as desired. However, it goes without saying that the setting of this size is limited by the number of lines in the shift register 13 and the number of pixels in one line. Therefore, it is possible to set each small area over the entire area of the image 1 to be processed, and to accurately obtain information on the small area. Therefore, there is no possibility of obtaining erroneous inspection results due to non-uniform distribution of inspection objects, which has been a problem in the past, and there is no problem such as the need to take measures to set small areas in order to prevent such errors. Conventionally, for inspection of the entire image area (M×N×m×
n) times (m×
n) continuous cumulative sum processing can be performed in real time using a high-speed calculation method. Moreover, as mentioned above, the hardware configuration is simple, and its practical advantages are enormous. Furthermore, since the size of the small area can be arbitrarily set as described above, it is extremely versatile for images to be processed and enables flexible image processing. Furthermore, it is also possible to calculate the local density sum of grayscale images, thereby making it possible to perform dynamic binarization processing of so-called uneven images.

Note that the present invention is not limited to the above embodiments. For example, the number n of constituent lines of the shift register 13 may be determined according to specifications. Further, instead of the shift register, a RAM may be used and the address thereof may be controlled to perform similar processing. Furthermore, it is also possible to initialize and reset each register to zero using a reset signal, without inputting "0" data instead of pixel data. In addition, by simultaneously performing addition and cumulative sum processing using multiple arithmetic circuits installed in parallel, different m, n
It is also possible to perform image processing on various types of small areas in parallel. In summary, the present invention can be implemented with various modifications without departing from the gist thereof.

[Brief explanation of drawings]

Figure 1 and Figures 2a and 2b are diagrams showing the relationship between an image and a small area showing problems in image processing, Figure 3 is a diagram showing the processing concept of the present invention, and Figure 4 is a diagram showing an example of the present invention. FIG. 1 is a schematic configuration diagram of an example device. 11... Erase selector, 12... Adder, 13
...First shift register, 14...Vertical selector, 16...Second shift register, 17...Vertical sum register, 18...Subtractor, 19...Adder,
20...Horizontal selector, 22...Subtractor, 23...
Cumulative sum register.

Claims (1)

[Claims] 1 Time-series pixel data obtained by two-dimensionally scanning an image is sequentially shifted and input and temporarily stored, and output data is output from any one line among n lines (M pixels x (n lines) stages of first storage means; and M stages of second storage means for sequentially shifting and inputting added data and temporarily storing it, and outputting tap output data from any one of the M stages of taps. and adding the pixel data input to the first storage means to the output data of the final stage of the second storage means and subtracting the output data of the first storage means to obtain the added data. 1 arithmetic means; a third storage means for temporarily storing cumulative sum data; and a third storage means for adding the input data of the second storage means to the output data from the third storage means; an image processing device comprising: second calculation means for subtracting the tap output data to obtain the cumulative sum data. 2. The image processing apparatus according to claim 1, wherein each of the first to third storage means is driven to transfer data by a clock for time-series image data. 3 The first storage means sequentially shifts and inputs the time-series pixel data and temporarily stores it (M pixels×n
Claim 1, characterized in that the device comprises shift registers of (line) stage and a selector for selectively taking out output data of any one line among the n lines of output data of these shift registers. The image processing device according to item 1. 4. The second storage means includes an M-stage shift register that sequentially shifts and inputs the addition data and temporarily stores it, and a selector that selects any one tap output data from the M-stage tap output data of this shift register. An image processing device according to claim 1, characterized in that the image processing device comprises: