JPS5819945A - Multichannel analog/digital converting circuit - Google Patents

Multichannel analog/digital converting circuit

Info

Publication number
JPS5819945A
JPS5819945A JP11784181A JP11784181A JPS5819945A JP S5819945 A JPS5819945 A JP S5819945A JP 11784181 A JP11784181 A JP 11784181A JP 11784181 A JP11784181 A JP 11784181A JP S5819945 A JPS5819945 A JP S5819945A
Authority
JP
Japan
Prior art keywords
signal
input
channel
analog
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11784181A
Other languages
Japanese (ja)
Other versions
JPS5952459B2 (en
Inventor
Taku Ihara
伊原 卓
Kunishiro Mori
森 国城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP11784181A priority Critical patent/JPS5952459B2/en
Publication of JPS5819945A publication Critical patent/JPS5819945A/en
Publication of JPS5952459B2 publication Critical patent/JPS5952459B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/05Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To reduce the number of parts and reduce the fault rate and the cost, by using only one A/D converter for many analog inputs for the purpose of inputting measure data to a computer. CONSTITUTION:When a correction signal 11 is transmitted from a computer 4, the output of an amplifier 5 is given to an A/D converter 3 to produce a digital signal and is inputted to CPU4. Stored contents are converted to an analog signal by a D/A converter 8 and are fed back as a signal, which corrects the offset in the direction where the output signal reduced to zero, to the amplifier 5. Next, the correction signal 11 is transmitted from the CPU4 to input amplifiers 1A- 1Z, and the input signal is put into the state of full scale in the input amplifier 1A, and the output becomes a digital signal and is inputted to the CPU4. Its contents come to an analog signal by a D/A conveter 7 and are fed back as an amplification degree adjusting signal 15 to the amplifier 5 so as to attain the amplification degree a prescribed value.

Description

【発明の詳細な説明】 本発明はコンピュータに測定デ刊夕を入力する目的で、
多数のアナログ入力を1個のみのアナログ・ディジタル
変換器(以下A/D変換器と略記する)を用いて次々と
ディジ・タル量に変換する回路の改良に関するものであ
る。
[Detailed Description of the Invention] The present invention provides a method for inputting measurement data into a computer.
The present invention relates to an improvement in a circuit that successively converts a large number of analog inputs into digital quantities using only one analog-to-digital converter (hereinafter abbreviated as an A/D converter).

近年コンピュータは計測値処理の分野に広く利用されて
いる。計測の対象である温度、圧力、速度等は通常アナ
ログ電気信号として検出され、これを増幅器で適度のレ
ベルに増幅したのち、A/D変換器を用いてディジタル
信号に変換したものがコンピュータにデータとして入力
される。入力データはコンピュータによって処理され、
また整理された後に記録や制御に使用される。
In recent years, computers have been widely used in the field of measurement value processing. The objects of measurement, such as temperature, pressure, and speed, are usually detected as analog electrical signals, which are amplified to an appropriate level using an amplifier, and then converted to digital signals using an A/D converter, which is then sent as data to a computer. is entered as . The input data is processed by a computer,
It is also used for recording and control after being organized.

ところでA/D変換器は高価なものであり、計測の対象
が数百〜数千点になる場合は、対象とするアナログ信号
1個に対しA/D変換器を用いる方式ではその費用は莫
大となり、コンピュータの価格を超えてしまう。従って
計測システムのコストを低減させるため高価なA/D変
換器の数を少なくし、数lOのアナログ信号をリレーな
どで切換え2、次々と1個のA/D変換器で変換する多
チャンネルA/D変換方式が工業的に広く使用されてい
る。この方式はコストを低減させるためには極めて優れ
た方式であるが、近年工業計測に対し要求される精度が
高くなるに従いこの方式の欠点が問題となっている。
By the way, A/D converters are expensive, and when measuring hundreds to thousands of points, the cost of using an A/D converter for each analog signal is enormous. This means that the price exceeds the price of the computer. Therefore, in order to reduce the cost of the measurement system, the number of expensive A/D converters is reduced, and several 100 analog signals are switched using relays, etc. 2, and multi-channel A is converted one after another by one A/D converter. /D conversion method is widely used industrially. Although this method is an extremely excellent method for reducing costs, the drawbacks of this method have become a problem as the accuracy required for industrial measurement has become higher in recent years.

問題の原因は詳しくは後述するが、各アナログ\ 信号のための入力増幅器の持っているオフセントや増幅
度の誤差あるいはリレーの熱起電力等の誤差が存在する
ことにあり、これらの誤差が入力信号に混入するため測
定の精度を高めることが困難になっている。そこでこれ
らの誤差を減少させるために補正回路を各入力回路に付
加することが実用されているが、多数の補正回路を用い
れば多数の部品が必要になるので、価格が増大し多チヤ
ンネル型変換回路の目的であるコストの低減に反するば
かりでなく、故障の増大による信頼性の低下、補正作業
を短い期間に繰返して行うための稼動率の低下等の欠点
があり根本的な対策になっていない。
The cause of the problem, which will be explained in detail later, is that there are errors in the offset and amplification of the input amplifier for each analog signal, errors in the thermal electromotive force of the relay, etc. This makes it difficult to improve measurement accuracy because it mixes into the signal. Therefore, in order to reduce these errors, it has been put into practice to add a correction circuit to each input circuit, but using a large number of correction circuits requires a large number of parts, which increases the cost and requires multi-channel conversion. Not only does it go against the goal of circuits to reduce costs, but it also has disadvantages such as lower reliability due to an increase in failures and lower operating rates due to repeated correction work in a short period of time, so it is not a fundamental countermeasure. do not have.

また他の方法として誤差の補正をコンピュータによる演
算で行うことも実行されているが、そのような補正演算
を多数の入力信号について測定の都度実施することは、
それだけコンピュータに余分の仕事をさせることになり
、本来のデータ収集の効率を低下させる結果となってい
る。すなわちこの方法も根本的な対策とは言えない。
Another method used is to correct errors using computer calculations, but it is difficult to perform such correction calculations on a large number of input signals each time a measurement is made.
This forces the computer to do extra work, reducing the efficiency of data collection. In other words, this method cannot be called a fundamental countermeasure either.

本発明は以上のような欠点を除き、精度の高い測定を行
うことを可能としたもので、価格の大幅なL昇や信頼性
の低下、稼動率やデータ収集の効率の低下等を生じない
ことが特長である。以下本発明をさらに具体的に説明す
る。
The present invention eliminates the above-mentioned drawbacks and makes it possible to perform highly accurate measurements, and does not cause a significant increase in price, decrease in reliability, or decrease in operating rate or data collection efficiency. This is a feature. The present invention will be explained in more detail below.

第1図はこれまで使用されている多チャンネルA/D変
換回路の回路構成例図で、詳しくは図中のCPUを除く
破線で囲んだ部分18がA/D変換回路部、CPU4は
コンピュータである。図中のアナログ信号入力端子A、
B、−・・・Y、zに印加された各入力信号は、入力増
幅器IA、 IB、・・・・IY。
Figure 1 is a diagram showing an example of the circuit configuration of a multi-channel A/D conversion circuit that has been used up to now. In detail, the part 18 surrounded by a broken line excluding the CPU in the figure is the A/D conversion circuit part, and the CPU 4 is the computer part. be. Analog signal input terminal A in the figure,
Each input signal applied to B, -...Y,z is input to an input amplifier IA, IB,...IY.

lZ により各チャンネル毎に適当な大きさに増幅され
る。リレー2A、 2B、・Φ・・2Y、 2z  は
各チャンネル毎に配置されたチャンネル接断切替器、す
なわちチャンネル冊閉器群である。第1図の場合測定は
次のように行われる。まずリレー2AがCPU4よりの
リレー開閉信号lOによりて閉じ、チャンネルAのアナ
ログ信号が選択されてA/D変換器8に送られる。こ\
で信号はディジタル信号に変換されCPU4に人力され
る。その後リレー2AはCPU4よりのリレー開閉信号
lOによって開き、チャンネルAについての動作が完了
する。
Each channel is amplified to an appropriate size by lZ. Relays 2A, 2B, .PHI. . . 2Y, 2z are channel connection/disconnection switches arranged for each channel, that is, a channel closing device group. In the case of FIG. 1, the measurement is carried out as follows. First, relay 2A is closed by relay open/close signal lO from CPU 4, and the analog signal of channel A is selected and sent to A/D converter 8. child\
The signal is converted into a digital signal and inputted to the CPU 4. Thereafter, relay 2A is opened by relay opening/closing signal lO from CPU 4, and the operation for channel A is completed.

続いてリレー2Bが閉じられ、同様な過程で次のチャン
ネルBのディジタル化された信号がCPU4に入力する
。このような動作を繰返すことによって全チャンネルの
信号がCPU4に入力する。
Subsequently, relay 2B is closed, and the next digitized signal of channel B is input to CPU 4 in the same process. By repeating such operations, signals of all channels are input to the CPU 4.

この回路は構成が単純であり、測定に高い精度が要求さ
れない場合には有効である。しかし高い精度が要求され
るときは回−路自身が誤差を発生し、入力信号を変化さ
せるので種々の問題が発生する。
This circuit has a simple configuration and is effective when high accuracy is not required for measurement. However, when high accuracy is required, various problems occur because the circuit itself generates errors and changes the input signal.

これをさらに詳しく説明すると、入力増幅器IA。To explain this in more detail, the input amplifier IA.

1B、・・・・IY、 1zは入力信号が零の場合にも
多少の出力信号(オフセット)が生じ、その大きさは周
囲温度や経過時間によって変化する。また入力増幅51
A、 IB、・・・・lzの増幅度は一定ではなく個々
にばらつきをもち、かつ周囲温度や時間によって変化す
る。さらにリレー2A〜2zの各接点の接触抵抗や熱起
電力等が周囲の状況によって変化し、これらはすべて誤
差の原因となっている。
1B, . . . IY, 1z generates some output signal (offset) even when the input signal is zero, and its magnitude changes depending on the ambient temperature and elapsed time. In addition, the input amplification 51
The amplification degrees of A, IB, . Furthermore, the contact resistance, thermoelectromotive force, etc. of each contact of the relays 2A to 2z change depending on the surrounding conditions, and these all cause errors.

これらの誤差原因を除き高精度の測定を実行するために
従来用いられている対策には、入力増幅器IA −12
のそれぞれにオフセット補正回路を付加しオフセットが
零になるよう調整する方法、人力増幅器IA −12の
それぞれに増幅度調整回路を付加し増幅度を調整する方
法、リレー2A〜2zに接触抵抗が低くかつ安定してい
る水銀リレーを採用する方法等があり、これらを実施し
慎重に微調整を行えば誤差は低下する。しかし微調整は
人手によって行われ、長時間を必要としその間側室が中
断されるという大きな欠点がある。また各人力増幅器に
補正回路が付加されると部品数は大幅に増加し価格ばか
りでなく故障率も大幅に増加する欠点がある。さらに基
本的な問題は、これらの対策は周囲温度の変化や時間の
経過に伴う誤差の変動については効果がないことであっ
て、これらの変動に対しては微調整を再度実施すること
が必要となる。すなわち高精度の測定を実行するには頻
繁に微調整と較正の作業を繰返すことが必要で、測定工
数の増大と測定装置の稼動率が著しく低くなるという大
きな欠点がある。
Measures conventionally used to eliminate these sources of error and perform highly accurate measurements include the input amplifier IA-12
A method of adding an offset correction circuit to each of the IA-12 and adjusting the amplification so that the offset becomes zero, a method of adding an amplification adjustment circuit to each of the human power amplifiers IA-12 and adjusting the amplification, There are methods such as using a mercury relay, which is also stable, and if you implement these methods and make careful fine adjustments, the error will decrease. However, the major disadvantage is that the fine adjustment is done manually and requires a long time, during which time the side chambers are interrupted. Furthermore, if a correction circuit is added to each human power amplifier, the number of parts will increase significantly, which has the drawback of significantly increasing not only the price but also the failure rate. A more fundamental problem is that these measures are ineffective against changes in ambient temperature or fluctuations in error over time, which require fine-tuning again. becomes. That is, in order to carry out highly accurate measurements, it is necessary to frequently repeat fine adjustment and calibration operations, which has the major disadvantage of increasing the number of measurement steps and significantly lowering the operating rate of the measuring device.

従来用いられている別な対策として誤差の補正をコンピ
ュータによる演算で行う方法があることは前記の通りで
あるが、この方法は各回路の誤差を回路により補正する
のではなく、測定動作に必要な頻度で較征動作を挿入し
、その時点での各チャ/ネルの誤差を1確に把握してコ
ンピュータのメモリに記憶させ、得られた各自の測定結
果をその記憶内容に従って演算で補正する方法である。
As mentioned above, another conventionally used countermeasure is a method in which errors are corrected using computer calculations, but this method does not correct errors in each circuit by circuit, but rather corrects errors necessary for measurement operation. Insert a calibration operation at a certain frequency, accurately grasp the error of each channel at that time, store it in the computer memory, and correct the obtained measurement results by calculation according to the stored contents. It's a method.

この方法は部品数の増加は少なく、価格や故障率もあま
り増加しないので優れており、較正作業が人手によらず
コンピュータにより短時間内で行われるため、測定装置
の稼動率も良好である。しかし測定の規模が大きくなり
数千、数万の測定をごく短時間でオンラインリアルタイ
ムで処理する場合には、コンピュータが各チャンネルに
ついて補IF演算を測定のっど繰返すため、本来の目的
であるデータ収集の効率が低下し必要な時間内で測定が
終了しなくなるという大きな欠点がある。
This method is excellent because it does not increase the number of parts, cost, or failure rate much, and the operating rate of the measuring device is also good because the calibration work is done by computer within a short time without manual labor. However, when the scale of measurement increases and thousands or tens of thousands of measurements are processed online in real time in a very short period of time, the computer repeats the supplementary IF calculation for each channel every time the measurement is made. A major drawback is that the collection efficiency is reduced and the measurement cannot be completed within the required time.

さて本発明の説明に入る。第2図は本発明を実施した多
チャンネルA/D変換回路の構成側図で、CPU4を除
く部分がA/D変換部である。第2図においてアナログ
信号入力端子A、 B、・・・・Y、zにはそれぞれの
入力信号が印加されるが、第2図の回路では較正と測定
の両動作が行われる。
Now, the present invention will be explained. FIG. 2 is a side view of the configuration of a multi-channel A/D conversion circuit embodying the present invention, and the portion excluding the CPU 4 is the A/D conversion section. In FIG. 2, respective input signals are applied to the analog signal input terminals A, B, . . . Y, z, and the circuit of FIG. 2 performs both calibration and measurement operations.

第1に較正動作を説明する。まずコンピュータ4より較
正用信号11が送り出されると、入力増幅器lAは入力
信号が零の状態になる。次にリレー2AがCPU4から
のリレー開閉信号によって閉じ、LAの出力は加算増幅
兼利得可変増幅器(AMP )5に接続される。増幅器
5の出力はA/D変換器3に与えられてディジタル信号
となりCPU4に入力する。この時の増幅器5の出力信
号は入力信号が零であるから本来は零となるべきである
が、前記のオフセット誤差やリレーの熱起電力誤差など
が加算され、ある値をもっことになる。
First, the calibration operation will be explained. First, when the calibration signal 11 is sent out from the computer 4, the input amplifier IA enters a state where the input signal is zero. Next, relay 2A is closed by a relay open/close signal from CPU 4, and the output of LA is connected to summing amplifier/variable gain amplifier (AMP) 5. The output of the amplifier 5 is applied to the A/D converter 3 to become a digital signal and input to the CPU 4. The output signal of the amplifier 5 at this time should originally be zero since the input signal is zero, but it becomes a certain value due to the addition of the offset error and the thermoelectromotive force error of the relay.

CPU4はこの誤差出力をメモリ(RAMII’の記憶
素子の1個に書き込む。その記憶゛内容はディジタル・
アナログ(D/A )変換器8によってアナログ信号に
変換されAMP5に出力信号が零となる方向にオフセッ
ト補門信号14として帰還される。次にCPU4より較
正用信号11が人力増幅器IA−12に送り出され、入
力増幅器IAは人力信号がフルスケール(full 5
cale)の状態になり、その出力はディジタル信号と
なってCPU4に入力する。この値は増幅率の変動によ
る誤差を含んでいるので、CPU4はその誤差に相当す
る信号をRAM6の記憶素子の次の1個に書込む。
The CPU 4 writes this error output into one of the storage elements of the memory (RAMII').The contents of the memory are digital.
The signal is converted into an analog signal by an analog (D/A) converter 8 and fed back to the AMP 5 as an offset supplementary signal 14 in a direction where the output signal becomes zero. Next, the calibration signal 11 is sent from the CPU 4 to the human power amplifier IA-12, and the input amplifier IA receives the human power signal at full scale (full scale).
cale) state, and its output becomes a digital signal and is input to the CPU 4. Since this value includes an error due to variation in the amplification factor, the CPU 4 writes a signal corresponding to the error into the next memory element of the RAM 6.

その内容はD/A変換器7によってアナログ信号となり
増幅度調整信号15としてAMP5に増幅度が規定の値
となるように帰還される。この後CPU4よりのリレー
開閉信号10の断によってリレー2人は開いて、これで
1つの回路の較正動作が終了する。
The content is turned into an analog signal by the D/A converter 7 and is fed back to the AMP 5 as an amplification degree adjustment signal 15 so that the amplification degree becomes a specified value. Thereafter, the two relays are opened due to disconnection of the relay opening/closing signal 10 from the CPU 4, and the calibration operation of one circuit is completed.

次に再びCPU4よりの較正用信号11の印加によって
入力増幅器IBは入力信号が零の状態となり、続いてリ
レー2Bがリレー開閉信号lOによって閉じ、あとは上
記と同様の過程で誤差補正破がRAM6の次の1個に記
憶されてオフセット誤差の補正が行われ、次に利得の補
正が行われる。
Next, by applying the calibration signal 11 from the CPU 4 again, the input amplifier IB becomes in a state where the input signal is zero, and then the relay 2B is closed by the relay opening/closing signal IO, and the error correction failure is performed in the RAM 6 in the same process as above. The offset error is corrected, and then the gain is corrected.

以下同様な手段が繰返されて全チャンネルの較正を終r
する。
Similar steps are repeated to complete the calibration of all channels.
do.

次に第2の測定動作を説明する。まずリレー2AがCP
U4よりのリレー開閉信号lOによって閉じ、チャンネ
ルAのアナログ信号が選択されAMP5に′入力する。
Next, the second measurement operation will be explained. First, relay 2A is CP
It is closed by the relay opening/closing signal lO from U4, and the analog signal of channel A is selected and input to AMP5.

それと同時にメモリRAM6に対してCPU4からアド
レス信号12が送られチャンネルAに対応した記憶素子
が選択され、記憶されている誤差補正情報5がD/A変
換器7および8によりアナログ信号であるオフセット補
正信号および増幅度調整信号となりAMP5に送られる
。従って入力したアナログ信号はAMP5で誤差の補正
が行われ、A/D変換器8には誤差な含まない信号が入
力され、ディジタル信号化された出力1icpu4に入
力される。こ\でリレー2AがCPU4よりのリレー開
閉信号IOによって開き、チャンネルAについての測定
を終了する。次にリレー開閉信号lOによってリレー2
Bが閉じ上記同様に誤差を補正された信号がCPU4に
入力され、上記のような動作を繰返すことにより全チャ
ンネルの信号がCPU4に入力される。
At the same time, an address signal 12 is sent from the CPU 4 to the memory RAM 6 to select the storage element corresponding to channel A, and the stored error correction information 5 is sent to the D/A converters 7 and 8 for offset correction, which is an analog signal. This becomes a signal and an amplification degree adjustment signal and is sent to the AMP5. Therefore, the input analog signal is corrected for errors in the AMP 5, and a signal containing no errors is input to the A/D converter 8, which is then input to the digital signal output 1icpu4. At this point, the relay 2A is opened by the relay opening/closing signal IO from the CPU 4, and the measurement for channel A is completed. Next, relay 2 is activated by relay open/close signal lO.
When B is closed, the error-corrected signal is input to the CPU 4 in the same manner as above, and by repeating the above operation, the signals of all channels are input to the CPU 4.

実際の測定に当っては最初各チャンネルの較正動作を行
い、次にチャンネル毎の測定動作を行うが、交互に行う
のではなく連続した測定動作に適切な頻度で較正動作を
挿入することにより、周囲温度や時間の経過による誤差
を低い範囲に抑止することが可能である。
During actual measurement, a calibration operation is first performed for each channel, and then a measurement operation is performed for each channel, but by inserting the calibration operation at an appropriate frequency into continuous measurement operations instead of performing them alternately, It is possible to suppress errors due to ambient temperature or the passage of time to a low range.

上記のような本発明方法の特長は、精度の高いことを要
求される測定に従来は人手による調整を行い長時間を必
要としたのに対し、調整がCPU4からの命令によって
自動的に行われるため極めて短時間で測定できること、
従来の方法のように各チャンネルに補正回路を付加する
のではなく、全チャンネルに対して1個の共通部分(二
補正機能を集約するので、回路が単純で部品個数の増加
が少なく、従っ5て故障率や価格の増加が少ないこと、
CPU4に対しては補正ずみの信号が入力するのでCP
U4は補正演算を行う必要がなく、従って効率良くデー
タ収集を行うことが可能なことである。これらの特徴は
従来方法の難点を除去し、実用上極めて大きな効果を生
ずるものである。
The above-mentioned feature of the method of the present invention is that the adjustment is automatically performed by commands from the CPU 4, whereas in the past, manual adjustment was required for measurements that required high precision, which required a long time. Therefore, it can be measured in an extremely short time.
Instead of adding a correction circuit to each channel as in the conventional method, one common part (two correction functions are consolidated) for all channels, so the circuit is simple and the number of parts does not increase. low failure rate and price increase,
Since the corrected signal is input to CPU4, the CPU
U4 is that there is no need to perform correction calculations, and therefore data can be collected efficiently. These features eliminate the difficulties of conventional methods and produce extremely large practical effects.

なお第2図に示した例は、増幅度調整信号を加算増幅器
兼利得可変増幅器(AMP ’)5に帰還する方法であ
るが、他の実施例として増幅度調整信号をA/D変換器
3の基準電圧端子に帰還させることによりA/D変換器
の利得を制御する方法がある。後にの方法においても前
者と全く同じ効果が得られることは明らかである。
The example shown in FIG. 2 is a method in which the amplification adjustment signal is fed back to the summing amplifier/variable gain amplifier (AMP') 5, but in another embodiment, the amplification adjustment signal is fed back to the A/D converter 3. There is a method of controlling the gain of the A/D converter by feeding back the voltage to the reference voltage terminal of the A/D converter. It is clear that the latter method can achieve exactly the same effect as the former.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来使用されている多チャンネル用A/D変換
回路の構成例図、第2図は本発明による多チャンネル用
A/D変換回路の構成例図である。 A−Z・・・・アナログ信号入力、 IA −12・・・・入力増幅器、 2A〜22−・・リレー、 8・・・・A/D変換器、
4 am am =r 7ピユータ(CPU)、5・・
・・加算増幅器兼利得可変増幅器(AMP)、60−・
メモリ素子群(RAM)、 ?、8・・・・D/A変換器、 IO・・・・リレー開閉信号、 11−・・・較正用信号、 12・・・−アドレス信号
、18・・・・多チャンネル用A/D変換回路、■4−
・・・オフセット補正信号、 15・・・・増幅度調整信号。 代理人 大垣 学 外1名
FIG. 1 is a diagram showing a configuration example of a conventional multi-channel A/D conversion circuit, and FIG. 2 is a configuration example diagram of a multi-channel A/D conversion circuit according to the present invention. A-Z...Analog signal input, IA-12...Input amplifier, 2A~22-...Relay, 8...A/D converter,
4 am am = r 7 computers (CPU), 5...
・Summing amplifier and variable gain amplifier (AMP), 60-・
Memory element group (RAM), ? , 8...D/A converter, IO...Relay open/close signal, 11--Calibration signal, 12--Address signal, 18--Multi-channel A/D conversion Circuit, ■4-
...Offset correction signal, 15...Amplification degree adjustment signal. Representative: Ogaki, 1 person from outside the university

Claims (3)

【特許請求の範囲】[Claims] (1)多チヤンネルアナログ入力をチャンネル毎に増幅
する入力増幅器群と、コンピュータよりの開閉信号によ
って開閉し入力増幅器群の出力をチャンネル順に加算増
幅兼利得可変増幅器に切替送入するチャンネル開閉器群
と、1個の加算増幅兼利得可変増幅器と、加算増幅兼利
得増幅器よりのアナログ信号入力をディジタル信号に変
換して外部のコンピュータに送出するA/D変換器と、
コンピュータよりの誤差補正情報をコンピュータよりの
アドレス信号によって指定のアドレスに記憶するRAM
メモリと、RAMメモリより出力されるオフセクト補正
信号をアナログ信号化する第1のD/A変換器と、RA
Mメモリより出力される増幅度調整信号をアナログ信号
化する第2のD / A変換器とを具備し、コンピュー
タより入力するチャンネル開閉信号と入力増幅器の入力
信号を零およびフルスケールの状態とする較正用信号お
よびメモリアドレス信号とにより各チャンネル毎の測定
動作と数回の測定動作前に挿入した較正動作を行い、そ
の出力をコンピュータに送出することを特徴とする多チ
ヤンネルアナログ・ディジタル変換回路。
(1) A group of input amplifiers that amplify multi-channel analog input for each channel, and a group of channel switches that open and close according to switching signals from the computer and switch the output of the input amplifier group to the summing amplification/variable gain amplifier in channel order. , one addition amplifier and variable gain amplifier, and an A/D converter that converts the analog signal input from the addition amplifier and gain amplifier into a digital signal and sends it to an external computer;
A RAM that stores error correction information from the computer at a specified address using an address signal from the computer.
a memory, a first D/A converter that converts the offset correction signal output from the RAM memory into an analog signal, and an RA.
Equipped with a second D/A converter that converts the amplification adjustment signal output from the M memory into an analog signal, and sets the channel open/close signal input from the computer and the input signal of the input amplifier to zero and full scale states. A multi-channel analog-to-digital conversion circuit characterized by performing a measurement operation for each channel and a calibration operation inserted before several measurement operations using a calibration signal and a memory address signal, and sending the output to a computer.
(2)アナログ化されたオフセット補正信号と、増幅度
調整信号とを加算増幅兼利得可変増幅器に与えることを
特徴とする特許請求の範囲第1項記載の多チヤンネルア
ナログ・ディジタル変換回路。
(2) The multi-channel analog-to-digital conversion circuit according to claim 1, characterized in that the analog offset correction signal and the amplification degree adjustment signal are applied to a summing amplification/variable gain amplifier.
(3)アナログ化されたオフセット補正信号を、加算増
幅兼利得可変増幅器の補正に、また増幅度調整信号をA
/D変換器の基準電圧の調整にそれぞれ与えることを特
徴とする特許請求の範囲第1項記載の多チヤンネルアナ
ログ・ディジタル変換回路。
(3) Use the analogized offset correction signal to correct the addition amplification/variable gain amplifier, and use the amplification adjustment signal to
2. The multi-channel analog-to-digital conversion circuit according to claim 1, wherein the multi-channel analog-to-digital conversion circuit is provided for adjusting the reference voltage of the /D converter.
JP11784181A 1981-07-29 1981-07-29 Multi-channel analog-to-digital conversion circuit Expired JPS5952459B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11784181A JPS5952459B2 (en) 1981-07-29 1981-07-29 Multi-channel analog-to-digital conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11784181A JPS5952459B2 (en) 1981-07-29 1981-07-29 Multi-channel analog-to-digital conversion circuit

Publications (2)

Publication Number Publication Date
JPS5819945A true JPS5819945A (en) 1983-02-05
JPS5952459B2 JPS5952459B2 (en) 1984-12-19

Family

ID=14721584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11784181A Expired JPS5952459B2 (en) 1981-07-29 1981-07-29 Multi-channel analog-to-digital conversion circuit

Country Status (1)

Country Link
JP (1) JPS5952459B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60175139A (en) * 1984-02-22 1985-09-09 Toshiba Corp Data collecting device
JPS6354543A (en) * 1986-08-25 1988-03-08 Minoru Hosoya Livestock shelter ventilating device
JPS63123935A (en) * 1986-11-10 1988-05-27 Toshiba Corp Ventilation fan
JPS63196121A (en) * 1987-02-09 1988-08-15 Nec Corp Coder and decoder

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60175139A (en) * 1984-02-22 1985-09-09 Toshiba Corp Data collecting device
JPS6354543A (en) * 1986-08-25 1988-03-08 Minoru Hosoya Livestock shelter ventilating device
JPS63123935A (en) * 1986-11-10 1988-05-27 Toshiba Corp Ventilation fan
JPS63196121A (en) * 1987-02-09 1988-08-15 Nec Corp Coder and decoder

Also Published As

Publication number Publication date
JPS5952459B2 (en) 1984-12-19

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