CN218587165U

CN218587165U - ADC correction circuit applied to wide-range current detection

Info

Publication number: CN218587165U
Application number: CN202222454489.2U
Authority: CN
Inventors: 魏宝晶
Original assignee: Epoch Technology Imecas Co ltd
Current assignee: Epoch Technology Imecas Co ltd
Priority date: 2022-09-16
Filing date: 2022-09-16
Publication date: 2023-03-07
Anticipated expiration: 2032-09-16

Abstract

The utility model relates to a ADC detects technical field, specifically discloses an ADC correction circuit who is applied to wide range current detection, including chopper switch, short-circuit switch, PGA, ADC, PGA controller, PGA multiplier, chopper controller, correction multiplier, correction adder and gain error correction module; the PGA controller is used for controlling the short-circuit switch to realize the zero setting of the PGA and controlling the gain amplification of the PGA; the PGA multiplier is used for removing PGA and amplifying the gain realized by the voltage signal to be detected; the chopping controller is used for outputting the offset error correction coefficient to the correction adder; the correction multiplier and the correction adder are used for correcting the gain error and the offset error of the original voltage quantization data after the PGA is zeroed so as to output corrected voltage quantization data. The utility model discloses can realize the measurement of wide range electric current to and the correction of maladjustment error and gain error among the current measurement process.

Description

ADC correction circuit applied to wide-range current detection

Technical Field

The utility model relates to a ADC detects technical field, and more specifically relates to an ADC correction circuit who is applied to wide range current detection.

Background

The sensing world is an important role of an Analog to Digital Converter (ADC), and a Digital system usually uses the ADC to convert external Analog signals into processable Digital signals, and then processes the data through a powerful data processing function of a Digital circuit, so as to implement a desired function. The accuracy of the ADC has a large impact on the performance of the digital system, with the higher the conversion accuracy, the better the system performance.

The ADC is a high-precision data conversion device, is susceptible to the influence of external environment in the actual use process, and often cannot reach the precision calibrated by the ADC. The loss of accuracy has a large impact on the performance of the overall system, and therefore, error correction of the ADC results is required.

The static indicators of ADC design, i.e. the error types, can be roughly classified into the following four categories: offset error (Offset error), gain error (Gain error), differential nonlinearity (Differential nonlinearity), and Integral nonlinearity (Integral nonlinearity). The offset error and the gain error are the main aspects of the external environment influence, and the differential nonlinearity and the integral nonlinearity errors are often dependent on the structure and the process of the ADC. Moreover, the correction principle of the offset error and the gain error is simpler, the required resources are less, and the method is suitable for chip-level correction; differential non-linear and integral non-linear errors are related to an ADC structure, so that correction is not easy, polynomial approximation, a table look-up method and the like are needed, the area cost is high, universality is not realized, and the method is not suitable for chip-level correction.

The battery pack of the electric automobile is formed by connecting hundreds of batteries in series and parallel, the charging and discharging current range is wide, and the accurate measurement of the wide-range current is an important aspect of monitoring the battery state of the Battery Management System (BMS) of the electric automobile. The current detection ADC measures current indirectly by measuring voltage on the shunt resistor, and because the current input range is large, the shunt resistor value is selected to be small and fixed after selection, the voltage to be detected needs to be processed, so that the voltage to be detected is in a range suitable for ADC processing, and wide-range current can be measured accurately.

The utility model discloses mainly to wide range current detection ADC, study the correction of the maladjustment that leads to by external environment and gain error.

Disclosure of Invention

In order to solve the not enough of existence among the prior art, the utility model provides a be applied to wide range current detection's ADC correction circuit can be based on gain error and the maladjustment error in multiplication and the addition operation correction ADC sampling channel, and the effect is showing, simple structure, easily realization.

As a first aspect of the present invention, an ADC calibration circuit for wide-range current detection is provided, which includes a chopping switch, a short-circuit switch, a PGA, an ADC, a PGA controller, a PGA multiplier, a chopping controller, a correction multiplier, a correction adder, and a gain error correction module;

a first input end of the chopping switch is used for inputting a voltage signal to be detected, a second input end of the chopping switch is connected with a first output end of the chopping controller, an output end of the chopping switch is connected with a first input end of the PGA, and the chopping switch is used for controlling the direction of the voltage signal to be detected;

the switch control end of the short-circuit switch is connected with the first output end of the PGA controller, the short-circuit switch is respectively connected with two ends of the output signal of the chopping switch, and the short-circuit switch is used for short-circuiting the input signal of the PGA;

the second input end of the PGA is connected with the second output end of the PGA controller, the output end of the PGA is connected with the input end of the ADC, and the PGA is used for realizing gain amplification of the voltage signal to be detected;

the input end of the PGA controller is connected with the output end of the correction adder, the third output end of the PGA controller is connected with the first input end of the PGA multiplier, and the PGA controller is used for controlling the short-circuit switch to realize zero setting of the PGA and control gain amplification of the PGA;

the second input end of the PGA multiplier is connected with the quantized data output end of the ADC, the output end of the PGA multiplier is respectively connected with the first input end of the correction multiplier and the input end of the chopping controller, and the PGA multiplier is used for removing gain amplification of the PGA on the voltage signal to be detected;

the second output end of the chopping controller is connected with the first input end of the correction adder, and the chopping controller is used for outputting an offset error correction coefficient to the correction adder;

the first input end of the correction multiplier is used for inputting original voltage quantization data of the ADC; the second input end of the correction multiplier is connected with the gain error correction module and used for acquiring a gain error correction coefficient output by the gain error correction module; the output end of the correction multiplier is connected with the second input end of the correction adder;

the correction multiplier and the correction adder are used for correcting the gain error and the offset error of the original voltage quantized data after the PGA is zeroed, and the output end of the correction adder outputs the corrected voltage quantized data.

Further, the PGA includes a transconductance amplifier and an operational amplifier, the PGA controller includes a PGA digital-to-analog converter and a PGA gain controller, an input end of the PGA digital-to-analog converter is connected to an output end of the correction adder, an output end of the PGA digital-to-analog converter is connected to the transconductance amplifier, and an output end of the PGA gain controller is connected to first input ends of the PGA and the PGA multiplier, respectively;

the transconductance amplifier and the operational amplifier form a closed-loop PGA structure, and the variable gain of the PGA is realized by changing the transconductance of the transconductance amplifier through the PGA gain controller;

before use, the PGA controller controls the short-circuit switch to be closed, so that the PGA input is 0, at this time, the PGA input is only offset error voltage, an offset error quantization value measured by the ADC is output to the PGA digital-to-analog converter through the correction adder, the PGA digital-to-analog converter converts the offset error quantization value into an analog offset voltage value, and the transconductance amplifier subtracts the fed-back analog offset voltage value from an input end of the transconductance amplifier to zero the PGA;

after the PGA is zeroed, the PGA controller controls the short-circuit switch to be switched off, the ADC correction circuit starts to work normally, and the correction multiplier and the correction adder correct gain errors and offset errors in an ADC sampling channel according to the obtained gain error correction coefficient gain _ coeff and the offset error correction coefficient off _ coeff.

Further, after the PGA is zeroed, the PGA controller controls the short-circuit switch to be turned off, the ADC correction circuit starts to operate normally, the chopper switch alternately transmits the voltage signal to be detected to the PGA, the zeroed PGA is used for amplifying the voltage signal to be detected and then transmitting the amplified voltage signal to the ADC for sampling, the ADC outputs amplified voltage quantization data to the PGA multiplier, the PGA multiplier is used for removing PGA gain from the amplified voltage quantization data to output original voltage quantization data src _ data, and then the correction multiplier and the correction adder correct the original voltage quantization data src _ data according to the obtained gain error correction coefficient gain _ coeff and the obtained offset error correction coefficient off _ coeff.

Further, the chopping controller is configured to obtain the original voltage quantization data src _ data output by the PGA multiplier, and assuming that the original voltage quantization data src _ data output by the ADC at the current sampling is V2, and the original voltage quantization data src _ data output by the ADC at the last sampling is V1, the chopping controller obtains the offset error correction coefficient off _ coeff by calculating a difference between the current original voltage quantization data V2 and the previous original voltage quantization data V1.

Further, the gain error correction module comprises a memory, a selector, an interpolator, a coefficient multiplier, and a coefficient adder;

a first output end of the memory is respectively connected with an input end of the interpolator and a selection signal input end of the selector, a second output end of the memory is connected with a first data input end of the selector, a third output end of the memory is connected with a second data input end of the selector, a fourth output end of the memory is connected with a first input end of the coefficient adder, and the memory is used for storing a temperature coefficient and a current external environment temperature value; wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;

the output end of the selector is connected with the first input end of the coefficient multiplier, and the selector is used for selecting the high-temperature coefficient or the low-temperature coefficient according to the current external environment temperature value;

the output end of the interpolator is connected with the second input end of the coefficient multiplier, the interpolator is used for obtaining a temperature proportional coefficient according to the current external environment temperature value, the output end of the coefficient multiplier is connected with the second input end of the coefficient adder, a fixed value 1 is input to the third input end of the coefficient adder, the output end of the coefficient adder is connected with the second input end of the correction multiplier, and the coefficient adder is used for calculating the gain error correction coefficient.

Further, the calculation formula of the gain error correction coefficient gain _ coeff is as follows (1):

gain-coeff＝1+gain-room+K(T)×gain-hot/cold(1)

the gain error correction coefficient gain _ coeff is calculated by the coefficient adder, wherein the gain _ room is a room temperature coefficient, the K (T) is a temperature proportionality coefficient, the gain _ hot is a high temperature coefficient, the gain _ cold is a low temperature coefficient.

Further, the calculation formula of the corrected voltage quantization data cali _ data is as follows (2):

cali-data＝(src-data×gain-coeff)+off-coeff(2)

the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, the off _ coeff is an offset error correction coefficient, and the corrected voltage quantization data cali _ data is calculated by the correction adder.

Further, the temperature proportionality coefficient K (T) is a decimal within 1, wherein,

the temperature proportionality coefficient K (T) is larger when the current external environment temperature value T is closer to the set high-temperature coefficient gain _ hot or the low-temperature coefficient gain _ cold;

and when the current external environment temperature value T is the set room temperature coefficient gain _ room, the temperature proportionality coefficient K (T) is 0.

Further, the PGA gain controller controls the gain of the PGA, and outputs the reciprocal of a gain coefficient to the PGA multiplier as a multiplication coefficient to cancel the gain realized by the PGA and restore the true measurement value of the voltage signal to be detected.

Further, the voltage signal to be detected at the first input end of the chopping switch is a differential signal, and the chopping controller is used for controlling the chopping switch to alternately output the differential signal.

The utility model provides a be applied to wide range current detection's ADC correction circuit has following advantage: gain error correction coefficients are obtained through temperature-related gain coefficients in the interpolator and the memory, and offset errors are corrected through a PGA zero setting and chopping mechanism; the circuit ensures that the offset error of a signal before PGA input is very small by PGA zero setting, is suitable for the condition of larger offset voltage and improves the dynamic range of the circuit; the circuit eliminates residual offset voltage left after zero setting through a chopping mechanism, and is suitable for the condition of small offset proportion; the chopping mechanism obtains the offset error correction coefficient, and then the gain error and the offset error in the ADC sampling channel are corrected according to multiplication and addition operation, so that the effect is remarkable, the structure is simple, and the realization is easy.

Drawings

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.

Fig. 1 is a block diagram of the ADC correction circuit applied to wide-range current detection provided by the present invention.

Detailed Description

To further illustrate the technical means and effects of the present invention adopted to achieve the objectives of the present invention, the following detailed description will be given to the specific embodiments, structures, features and effects of the ADC calibration circuit for wide-range current detection according to the present invention with reference to the accompanying drawings and preferred embodiments. It is to be understood that the embodiments described are only some of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged under appropriate circumstances for purposes of describing the embodiments of the invention herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In the explanation of the present invention, it should be noted that the terms "mounted," "connected," and "connected" are to be interpreted broadly unless otherwise specified. For example, the connection may be a fixed connection, a connection through a special interface, or an indirect connection via an intermediate medium. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

In the present embodiment, an ADC correction circuit for wide-range current detection is provided, as shown in fig. 1, the ADC correction circuit 10 for wide-range current detection includes a chopper switch 20, a short-circuit switch 30, a PGA40, an ADC50, a PGA controller 60, a PGA multiplier 70, a chopper controller 80, a corrective multiplier 90, a corrective adder 100, and a gain error correction module;

a first input end of the chopping switch 20 is configured to input a voltage signal to be detected, a second input end of the chopping switch 20 is connected to a first output end of the chopping controller 80, an output end of the chopping switch 20 is connected to a first input end of the PGA40, and the chopping switch 20 is configured to control a direction of the voltage signal to be detected;

the switch control end of the short-circuit switch 30 is connected with the first output end of the PGA controller 60, the short-circuit switches 30 are respectively connected with both ends of the output signal of the chopping switch 20, and the short-circuit switch 30 is used for short-circuiting the input signal of the PGA 40;

a second input end of the PGA40 is connected to a second output end of the PGA controller 60, an output end of the PGA40 is connected to an input end of the ADC50, and the PGA40 is configured to implement gain amplification of the voltage signal to be detected;

the input terminal of the PGA controller 60 is connected to the output terminal of the correction adder 100, the third output terminal of the PGA controller 60 is connected to the first input terminal of the PGA multiplier 70, and the PGA controller 60 is configured to control the shorting switch 30 to zero the PGA40 and control the gain amplification of the PGA 40;

the second input terminal of the PGA multiplier 70 is connected to the quantized data output terminal of the ADC50, the output terminals of the PGA multiplier 70 are respectively connected to the first input terminal of the correction multiplier 90 and the input terminal of the chopping controller 80, and the PGA multiplier 70 is configured to remove the gain amplification of the voltage signal to be detected by the PGA 40;

a second output terminal of the chopping controller 80 is connected to the first input terminal of the correction adder 100, and the chopping controller 80 is configured to output an offset error correction coefficient to the correction adder 100;

a first input terminal of the correction multiplier 90 is used for inputting raw voltage quantization data src _ data of the ADC; a second input end of the correction multiplier 90 is connected to the gain error correction module, and is configured to obtain a gain error correction coefficient output by the gain error correction module; an output of the correction multiplier 90 is connected to a second input of the correction adder 100;

the correction multiplier 90 and the correction adder 100 are configured to correct a gain error and an offset error of the original voltage quantization data after the PGA40 is zeroed, and an output end of the correction adder 100 outputs corrected voltage quantization data cali _ data.

Preferably, the PGA40 includes a transconductance amplifier 401 and an operational amplifier 402, the PGA controller 60 includes a PGA digital-to-analog converter 601 and a PGA gain controller 602, an input terminal of the PGA digital-to-analog converter 601 is connected to an output terminal of the correction adder 100, an output terminal of the PGA digital-to-analog converter 601 is connected to the transconductance amplifier 401, and output terminals of the PGA gain controller 602 are respectively connected to first input terminals of the PGA40 and the PGA multiplier 70;

the transconductance amplifier 401 and the operational amplifier 402 form a closed-loop PGA structure, and the variable gain of the PGA40 is realized by changing the transconductance of the transconductance amplifier 401 through the PGA gain controller 602;

before use, the PGA controller 60 controls the short-circuit switch 30 to close, so that the input of the PGA40 is 0, that is, the input of the PGA40 is only an offset error voltage in the case of input short circuit, the offset error quantized value measured by the ADC50 is output to the PGA dac 601 through the correction adder 100, and is converted into an analog offset voltage value through the PGA dac 601, and the transconductance amplifier 401 subtracts the fed-back analog offset voltage value from the input end of the transconductance amplifier 401, so as to implement zero adjustment of the PGA 40;

after the PGA40 is zeroed, the PGA controller 60 controls the short-circuit switch 30 to be turned off, the ADC correction circuit starts to operate normally, and the correction multiplier 90 and the correction adder 100 correct the gain error and the offset error in the ADC sampling channel according to the obtained gain error correction coefficient gain _ coeff and the offset error correction coefficient off _ coeff.

In an embodiment of the present invention, the PGA40 is a Programmable Gain Amplifier (Programmable Gain Amplifier), the OTA is a Transconductance Amplifier (Transconductance Amplifier), and the OPA is an Operational Amplifier (Operational Amplifier).

Preferably, after the PGA40 is zeroed, the PGA controller 60 controls the short-circuit switch 30 to be turned off, the ADC correction circuit starts to operate normally, the chopper switch 20 alternately transmits the voltage signal to be detected to the PGA40, the zeroed PGA40 is configured to amplify the voltage signal to be detected and transmit the amplified voltage signal to the ADC50 for sampling, the ADC50 outputs amplified voltage quantization data to the PGA multiplier 70, the PGA multiplier 70 is configured to remove a PGA gain from the amplified voltage quantization data to output original voltage quantization data src _ data, and then the correction multiplier 90 and the correction adder 100 correct the original voltage quantization data src _ data according to the obtained gain error correction coefficient gain _ coeff and the offset error correction coefficient off _ coeff.

Preferably, the chopping controller 80 is configured to obtain the original voltage quantization data src _ data output by the PGA multiplier 70, and assuming that the original voltage quantization data src _ data currently sampled and output by the ADC50 is V2, and the original voltage quantization data src _ data sampled and output last time is V1, the chopping controller 80 obtains the offset error correction coefficient off _ coeff by calculating a difference between the current original voltage quantization data V2 and the last original voltage quantization data V1.

Preferably, the gain error correction module includes a memory 110, a selector 120, an interpolator 130, a coefficient multiplier 140, and a coefficient adder 150;

a first output end of the memory 110 is respectively connected to an input end of the interpolator 130 and a selection signal input end of the selector 120, a second output end of the memory 110 is connected to a first data input end of the selector 120, a third output end of the memory 110 is connected to a second data input end of the selector 120, a fourth output end of the memory 110 is connected to a first input end of the coefficient adder 150, and the memory 110 is used for storing a temperature coefficient and a current ambient temperature value; wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;

the output end of the selector 120 is connected to the first input end of the coefficient multiplier 140, and the selector 120 is configured to select the high temperature coefficient or the low temperature coefficient according to the current external environment temperature value;

the output end of the interpolator 130 is connected to the second input end of the coefficient multiplier 140, the interpolator 130 is configured to obtain a temperature scaling coefficient according to the current external environment temperature value, the output end of the coefficient multiplier 140 is connected to the second input end of the coefficient adder 150, the third input end of the coefficient adder 150 inputs a fixed value 1, the output end of the coefficient adder 150 is connected to the second input end of the correction multiplier 90, and the coefficient adder 150 is configured to calculate the gain error correction coefficient.

Preferably, the gain error correction coefficient gain _ coeff is calculated according to the following formula (1):

gain-coeff＝1+gain-room+K(T)×gain-hot/cold(1)

wherein, the gain _ room is a room temperature coefficient, K (T) is a temperature proportionality coefficient, the gain _ hot is a high temperature coefficient, the gain _ cold is a low temperature coefficient, and the gain error correction coefficient gain _ coeff is calculated by the coefficient adder 150.

Preferably, the calculation formula of the corrected voltage quantization data cali _ data is as follows (2):

cali-data＝(src-data×gain-coeff)+off-coeff(2)

the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, the off _ coeff is an offset error correction coefficient, and the corrected voltage quantization data cali _ data is calculated by the correction adder 100.

Specifically, the selector 120 is a data selector.

Specifically, the temperature coefficient in the memory 110 is related to the ADC temperature, and is obtained by actual testing of the ADC; and the current external environment temperature value in the memory is a temperature sensor output value or a temperature value written by the MCU.

The utility model provides a be applied to wide range current detection's ADC correction circuit, PGA40 through after the zeroing is with voltage amplification to the within range that is fit for the ADC to measure the electric current of wide range accurately.

To the current detection ADC, the utility model provides a maladjustment error correction has two kinds of modes: zeroing and chopping. The zeroing is generally used for the larger condition of the offset voltage, the dynamic range of the circuit is improved, the utility model discloses a short-circuit switch 30 and PGA controller 60 realize the zeroing of PGA 40. After the PGA40 is zeroed, a gain error correction coefficient gain _ coeff is obtained through a gain coefficient related to the temperature in the interpolator 130 and the memory 110, see formula (1), an offset error correction coefficient off _ coeff is obtained through a chopping mechanism, then a gain error and an offset error in an ADC sampling channel are corrected according to multiplication and addition operations, the calculation formula is see formula (2), and cali _ data is the final corrected result and is output. The utility model discloses the correction effect is showing, simple structure, easily realizes.

It should be noted that, the interval of PGA zeroing is set reasonably according to the degree of change of the external environment of the system used, and PGA zeroing may be performed at the beginning of power-on operation of the circuit or at the beginning of switching the measurement channel. PGA zero adjustment can not eliminate all offset errors, chopping is used for eliminating residual offset voltage left after zero adjustment, and the method is suitable for the condition of small offset proportion. The utility model provides an ADC correction circuit obtains gain error correction coefficient through the temperature-related gain coefficient in interpolator and memory, see formula (1); and obtaining an offset error correction coefficient through a chopping mechanism, and then correcting a gain error and an offset error in an ADC (analog to digital converter) sampling channel according to multiplication and addition operations, wherein a calculation formula is shown in a formula (2). The utility model discloses the correction effect is showing, simple structure, easily realizes.

Preferably, the temperature proportionality coefficient K (T) is a decimal number within 1, wherein the temperature proportionality coefficient K (T) is larger as the current external environment temperature value T is closer to the set high temperature coefficient gain _ hot or the low temperature coefficient gain _ cold; and when the current external environment temperature value T is the set room temperature coefficient gain _ room, the temperature proportionality coefficient K (T) is 0.

Preferably, the PGA gain controller 602 controls the gain of the PGA40, and outputs the reciprocal of the gain coefficient to the PGA multiplier 70 as a multiplication coefficient, so as to eliminate the gain realized by the PGA40 and restore the true measurement value of the voltage signal to be detected.

Preferably, the voltage signal to be detected at the first input end of the chopper switch 20 is a differential signal, the chopper controller 80 is configured to control the chopper switch 20 to alternately output the differential signal, the chopper switch 20 alternately transmits the inverted voltages Vin and Vin to the input of the ADC50, the ADC50 outputs original voltage quantized data src _ data, and if the src _ data output by the ADC after two sampling operations are V1 and V2, respectively, V1= + Vin + offset and V2= -Vin + offset; generally, data src _ data sampled and output by an ADC has deviations due to the external environment and the influence of its own circuit, so a correction circuit is used to correct the deviations to obtain corrected data cali _ data.

Preferably, the chopping controller 80 is a control core of the ADC correction circuit applied to the wide-range current detection, controls a sampling channel and a chopping switch, and obtains an offset error correction coefficient off _ coeff according to ADC quantization data (V1 and V2)); the chopping controller 80 obtains the offset error coefficient off _ coeff = (V1 + V2)/2 by calculating the difference between the current sample (V2) and the last sample (V1).

It should be noted that the chopping switch 20 is a switch that cooperates with the chopping controller 80 to implement the chopping function, and functions to exchange the direction of input, assuming that the input is + vin and-vin from top to bottom, and the switch control signal is 0, and directly outputs it; if the value is 1, the output is exchanged, and-vin and + vin are output.

Preferably, the operands of the correction multiplier 90 and the correction adder 100 are fixed-point numbers.

Preferably, the operands of the coefficient adder 150 and the coefficient multiplier 140 are fixed-point numbers.

Preferably, the interpolator 130 obtains the temperature scaling factor according to the current ambient temperature value by using a linear interpolation method.

The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiments, and although the present invention has been disclosed with the preferred embodiments, it is not limited to the present invention, and any skilled person in the art can make some modifications or equivalent embodiments without departing from the scope of the present invention, but all the technical matters of the present invention are within the scope of the present invention.

Claims

1. An ADC correction circuit applied to wide-range current detection is characterized in that the ADC correction circuit (10) applied to wide-range current detection comprises a chopping switch (20), a short-circuit switch (30), a PGA (40), an ADC (50), a PGA controller (60), a PGA multiplier (70), a chopping controller (80), a correction multiplier (90), a correction adder (100) and a gain error correction module;

a first input end of the chopping switch (20) is used for inputting a voltage signal to be detected, a second input end of the chopping switch (20) is connected with a first output end of the chopping controller (80), an output end of the chopping switch (20) is connected with a first input end of the PGA (40), and the chopping switch (20) is used for controlling the direction of the voltage signal to be detected;

the switch control end of the short-circuit switch (30) is connected with the first output end of the PGA controller (60), the short-circuit switches (30) are respectively connected with two ends of the output signal of the chopping switch (20), and the short-circuit switch (30) is used for short-circuiting the input signal of the PGA (40);

a second input end of the PGA (40) is connected with a second output end of the PGA controller (60), an output end of the PGA (40) is connected with an input end of the ADC (50), and the PGA (40) is used for realizing gain amplification of the voltage signal to be detected;

the input end of the PGA controller (60) is connected with the output end of the correction adder (100), the third output end of the PGA controller (60) is connected with the first input end of the PGA multiplier (70), and the PGA controller (60) is used for controlling the short-circuit switch (30) to realize the zero setting of the PGA (40) and controlling the gain amplification of the PGA (40);

the second input end of the PGA multiplier (70) is connected with the quantized data output end of the ADC (50), the output end of the PGA multiplier (70) is respectively connected with the first input end of the correction multiplier (90) and the input end of the chopping controller (80), and the PGA multiplier (70) is used for removing the gain amplification of the PGA (40) on the voltage signal to be detected;

a second output terminal of the chopping controller (80) is connected to a first input terminal of the correction adder (100), and the chopping controller (80) is configured to output an offset error correction coefficient to the correction adder (100);

a first input terminal of the correction multiplier (90) is used for inputting the original voltage quantization data of the ADC; a second input end of the correction multiplier (90) is connected with the gain error correction module and is used for acquiring a gain error correction coefficient output by the gain error correction module; an output of the correction multiplier (90) is connected to a second input of the correction adder (100);

the correction multiplier (90) and the correction adder (100) are used for correcting gain errors and offset errors of the original voltage quantized data after the PGA (40) is zeroed, and the output end of the correction adder (100) outputs corrected voltage quantized data.

2. The ADC correction circuit applied to wide-range current detection according to claim 1, wherein the PGA (40) comprises a transconductance amplifier (401) and an operational amplifier (402), the PGA controller (60) comprises a PGA digital-to-analog converter (601) and a PGA gain controller (602), an input terminal of the PGA digital-to-analog converter (601) is connected to an output terminal of the correction adder (100), an output terminal of the PGA digital-to-analog converter (601) is connected to the transconductance amplifier (401), and an output terminal of the PGA gain controller (602) is connected to first input terminals of the PGA (40) and the PGA multiplier (70), respectively;

the transconductance amplifier (401) and the operational amplifier (402) form a closed-loop PGA structure, and the variable gain of the PGA (40) is achieved by changing the transconductance of the transconductance amplifier (401) through the PGA gain controller (602);

before use, the PGA controller (60) controls the short-circuit switch (30) to close, so that the input of the PGA (40) is 0, at this time, the input of the PGA (40) is only offset error voltage, an offset error quantization value measured by the ADC (50) is output to the PGA digital-to-analog converter (601) through the correction adder (100) and converted into an analog offset voltage value through the PGA digital-to-analog converter (601), and the transconductance amplifier (401) subtracts the fed-back analog offset voltage value from the input end of the transconductance amplifier to zero the PGA (40);

after the zero setting of the PGA (40) is finished, the PGA controller (60) controls the short-circuit switch (30) to be switched off, the ADC correction circuit starts to work normally, and the correction multiplier (90) and the correction adder (100) correct the gain error and the offset error in the ADC sampling channel according to the obtained gain error correction coefficient gain _ coeff and the offset error correction coefficient off _ coeff.

3. The ADC correction circuit applied to wide-range current detection according to claim 2, wherein after the PGA (40) is zeroed, the PGA controller (60) controls the short-circuit switch (30) to be turned off, the ADC correction circuit starts to operate normally, the chopper switch (20) alternately transmits the voltage signal to be detected to the PGA (40), the zeroed PGA (40) is used to amplify the voltage signal to be detected and then transmit the amplified voltage signal to the ADC (50) for sampling, the ADC (50) outputs the amplified voltage quantization data to the PGA multiplier (70), the PGA multiplier (70) is used to remove PGA gain from the amplified voltage quantization data to output original voltage quantization data src _ data, and then the PGA multiplier (90) and the correction circuit (100) correct the original voltage quantization data src _ data according to the obtained gain error correction coefficient gain _ coeff and offset error correction coefficient _ coeff.

4. The ADC correction circuit applied to wide-range current detection of claim 3, wherein the chopping controller (80) is configured to obtain the original voltage quantization data src _ data output by the PGA multiplier (70), and assuming that the original voltage quantization data src _ data output by the ADC (50) at the current sampling time is V2 and the original voltage quantization data src _ data output by the last sampling time is V1, the chopping controller (80) obtains the offset error correction coefficient off _ coeff by calculating a difference between the current original voltage quantization data V2 and the last original voltage quantization data V1.

5. The ADC correction circuit applied to the wide-range current detection of claim 4, wherein the gain error correction module comprises a memory (110), a selector (120), an interpolator (130), a coefficient multiplier (140) and a coefficient adder (150);

a first output end of the memory (110) is respectively connected with an input end of the interpolator (130) and a selection signal input end of the selector (120), a second output end of the memory (110) is connected with a first data input end of the selector (120), a third output end of the memory (110) is connected with a second data input end of the selector (120), a fourth output end of the memory (110) is connected with a first input end of the coefficient adder (150), and the memory (110) is used for storing a temperature coefficient and a current external environment temperature value; wherein the temperature coefficient comprises a room temperature coefficient, a high temperature coefficient and a low temperature coefficient;

the output end of the selector (120) is connected with the first input end of the coefficient multiplier (140), and the selector (120) is used for selecting the high-temperature coefficient or the low-temperature coefficient according to the current external environment temperature value;

the output end of the interpolator (130) is connected with the second input end of the coefficient multiplier (140), the interpolator (130) is used for obtaining a temperature proportional coefficient according to the current external environment temperature value, the output end of the coefficient multiplier (140) is connected with the second input end of the coefficient adder (150), the third input end of the coefficient adder (150) inputs a fixed value 1, the output end of the coefficient adder (150) is connected with the second input end of the correction multiplier (90), and the coefficient adder (150) is used for calculating the gain error correction coefficient.

6. The ADC correction circuit applied to wide-range current detection in claim 5, wherein the gain error correction coefficient gain _ coeff is calculated according to the following formula (1):

gain-coeff＝1+gain-room+K(T)×gain-hot/cold(1)

the gain error correction coefficient gain _ coeff is calculated by the coefficient adder (150), wherein the gain _ room is a room temperature coefficient, the K (T) is a temperature proportionality coefficient, the gain _ hot is a high temperature coefficient, and the gain _ cold is a low temperature coefficient.

7. The ADC correction circuit applied to wide-range current detection according to claim 6, wherein the calculation formula of the corrected voltage quantization data cali _ data is as follows (2):

cali-data＝(src-data×gain-coeff)+off-coeff(2)

the src _ data is original voltage quantization data of the ADC, the gain _ coeff is the gain error correction coefficient, the off _ coeff is an offset error correction coefficient, and the corrected voltage quantization data cali _ data is obtained through calculation by the correction adder (100).

8. The ADC correction circuit of claim 6 wherein the temperature scaling factor K (T) is a fractional number within 1, wherein,

9. The ADC calibration circuit applied to wide-range current detection according to claim 3, wherein the PGA gain controller (602) controls the gain of the PGA (40), and outputs the reciprocal of the gain coefficient to the PGA multiplier (70) as a multiplication coefficient to eliminate the gain realized by the PGA (40) and recover the real measured value of the voltage signal to be detected.

10. The ADC correction circuit applied to wide-range current detection according to claim 1, wherein the voltage signal to be detected at the first input terminal of the chopping switch (20) is a differential signal, and the chopping controller (80) is configured to control the chopping switch (20) to alternately output the differential signal.