JPS58197906A - Amplifier circuit for switching gain - Google Patents

Amplifier circuit for switching gain

Info

Publication number
JPS58197906A
JPS58197906A JP8188582A JP8188582A JPS58197906A JP S58197906 A JPS58197906 A JP S58197906A JP 8188582 A JP8188582 A JP 8188582A JP 8188582 A JP8188582 A JP 8188582A JP S58197906 A JPS58197906 A JP S58197906A
Authority
JP
Japan
Prior art keywords
differential amplifier
switching
amplifier
gain
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8188582A
Other languages
Japanese (ja)
Inventor
Mitsuru Murakami
満 村上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8188582A priority Critical patent/JPS58197906A/en
Publication of JPS58197906A publication Critical patent/JPS58197906A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated

Landscapes

  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To keep an operating point constant and to prevent waveform distortion and output variation by connecting each amplifier with common current souce and load through a switch when selecting and using amplifiers with different gain in case of necessity. CONSTITUTION:Differential amplifiers 11, 12, 13 having different gain are connected to a constant current source 24 through switching transistors (TRs) 18, 19, 20. A VTR requires low gain in a burst signal amplification stage at reproducing and 6dB higher gain than that of reproducing at recording. Consequently, the VTR turns on the TR 20 to acutate the differntial amplifier 13 having low gain at reproducing and turns on the TR 19 to actuate the differential amplifier 12 having high gain at recording. Since the constant current source is used in common, the operating point on the output side is fixed.

Description

【発明の詳細な説明】 この発明は利得切換え増幅回路に関し、特に、磁気記録
再生装置において、記録、#11100利得切換えおよ
び色信号、バースト信号に対する利得切換えに適した増
幅器に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a gain switching amplifier circuit, and more particularly to an amplifier suitable for recording, #11100 gain switching, and gain switching for color signals and burst signals in a magnetic recording/reproducing device.

NTSC方式におけるVH8方式の磁気記録再生装置で
は、記録時にカラーバースト信号を2倍にして記録し、
逆に再生時にそのバースト信号を1、−’ 2倍にして
再生している。このため従来の記録、再生共用可能な色
信号処理回路の入力端では、記録時と再生時および色信
号時とバースト信号時の信号レベルの違いを一致させる
ため、種々の利得の興なる増幅回路が必要であった。し
かし、この場合種々の利得の興なる各増幅回路は、たと
えば個別の定電流源が接続されており、その出力1流電
圧レベルが変動するという問題があった。
In the VH8 format magnetic recording and reproducing device in the NTSC format, the color burst signal is doubled and recorded.
Conversely, during reproduction, the burst signal is multiplied by 1, -'2 and reproduced. For this reason, at the input end of a conventional color signal processing circuit that can be used for both recording and reproduction, amplification circuits with various gains are used to match the differences in signal levels during recording and reproduction, and between color signals and burst signals. was necessary. However, in this case, each amplifier circuit with various gains is connected to, for example, an individual constant current source, and there is a problem in that the output voltage level of the single current source fluctuates.

それゆえに、この発明の主たる目的は前記欠点を解消し
た利得切換え増幅回路を提供することである。
Therefore, the main object of the present invention is to provide a gain switching amplifier circuit which eliminates the above-mentioned drawbacks.

この発明は、簡単に言うならば、入力信号に応じて、電
源により付勢される共通の負荷から共通の定電流源へ電
流を流して、負荷電圧を出力として取出す増幅器tあっ
て、共通の負荷と共通の定電流源の圀に、共通の負荷に
共通的に接続される3つの差動増幅器と、信号に応じて
その3つの増幅器のうち1つを選択してオンするスイッ
チング[i、1.、□え、い、□。え□□、あ77、 
 !さらに詳しく言えば、スイッチング回路を構成する
切換えスイッチング素子の入力電極を予め異なった直流
電圧でプルアップしておき、高い電圧にプルアップされ
た1〜ランジスタから順にオンしていく切換え方式の利
得切換え増幅回路である。
To put it simply, this invention includes an amplifier t which flows a current from a common load energized by a power supply to a common constant current source in response to an input signal and extracts the load voltage as an output. Three differential amplifiers commonly connected to the common load are connected to a constant current source common to the load, and a switching device [i, 1. , □Eh, I, □. E□□、A77、
! More specifically, gain switching is a switching method in which the input electrodes of the switching elements that make up the switching circuit are pulled up in advance with different DC voltages, and the transistors 1 to 1 are turned on in order, starting with the transistors that have been pulled up to a higher voltage. It is an amplifier circuit.

この発明のその他の目的と特徴は以下の図面を参照して
行なう詳細な説明から一層明らかとなろう。
Other objects and features of the invention will become more apparent from the detailed description given below with reference to the drawings.

図はこの発明の一実施例である磁気記録再生装置の色信
号処理回路における利得切換え増幅回路の回路図である
。図を参照してまずこの回路の構成を説明する。
The figure is a circuit diagram of a gain switching amplification circuit in a color signal processing circuit of a magnetic recording/reproducing apparatus which is an embodiment of the present invention. First, the configuration of this circuit will be explained with reference to the drawing.

差動増幅器11,12.13は同一定格の1対のトラン
ジスタと抵抗14.15または16で構成されている。
The differential amplifiers 11, 12, 13 are composed of a pair of transistors of the same rating and a resistor 14, 15 or 16.

そして、差動増幅器の出力端子である1対のトランジス
タのコレクタ端子はそれぞれ共通的に共通の負荷抵抗1
0または共通のり一層25を介して電源1により付勢さ
れている。この共通の負荷抵抗10.共通のリード25
が共通負荷を構成しており、出力端子7にこの負荷抵抗
10とリード25の差の電圧が出力される。
The collector terminals of the pair of transistors, which are the output terminals of the differential amplifier, are connected to a common load resistance 1.
0 or energized by the power supply 1 via the common glue layer 25. This common load resistance 10. common lead 25
constitutes a common load, and the voltage difference between this load resistor 10 and the lead 25 is output to the output terminal 7.

差動増幅器11.12のトランジスタベースには記録信
号入力端子2から記録信号が入力し、差動増幅器13の
トランジスタベース端子には再生信号入力端子iから再
生信号が入力する。そしてこれらの出力は、当然のこと
ながら、出力端子7に出力される。
A recording signal is input from the recording signal input terminal 2 to the transistor bases of the differential amplifiers 11 and 12, and a reproduction signal is input from the reproduction signal input terminal i to the transistor base terminal of the differential amplifier 13. These outputs are naturally output to the output terminal 7.

差動増幅回路11.12.13Ltスイッチング回路に
接続されるが、それは次のような構成になっている。ま
ず、差動増幅器11.12.13はNPNトランジスタ
18,19.20のそれぞれのコレクタに接続され、そ
れら各トランジスタのエミッタは共通の定電流1124
に接続されている。
Differential amplifier circuits 11, 12, and 13 are connected to the Lt switching circuit, which has the following configuration. First, the differential amplifiers 11, 12, 13 are connected to the respective collectors of NPN transistors 18, 19, 20, and the emitters of each of these transistors are connected to a common constant current 1124.
It is connected to the.

前記各トランジスタ1B、19.20のそれぞれのベー
ス端子は、端子4,5.3からそれぞれ異なる直流電圧
によってプルアップされている。この場合の直流電圧は
、端子4〉端子5〉端子3、の順に印加電圧の大きさが
定められている。そしてさらに、トランジスタ18のベ
ース端子は色信号、バースト信号利得切換え制御信号に
よってオンまたはオフするエミッタ接地NPNトランジ
スタ22に接続されており、トランジスタ20のベース
端子は記録、再生切換え制御信号によってオンまたはオ
フするエミッタ接地N P N +・ランジスタ23に
接続され=(いる。
The respective base terminals of the transistors 1B, 19.20 are pulled up by different DC voltages from the terminals 4, 5.3. In this case, the magnitude of the DC voltage applied is determined in the order of terminal 4>terminal 5>terminal 3. Further, the base terminal of the transistor 18 is connected to a common emitter NPN transistor 22 which is turned on or off by a color signal or burst signal gain switching control signal, and the base terminal of the transistor 20 is turned on or off by a recording or reproduction switching control signal. The emitter is connected to the grounded N P N + transistor 23.

また、前述のように、記録信号入力端一72に記録信号
が加えられ、再1信号入力端子8に再生信号が加えられ
、出力端子7から回路出力が得られる。Din抵抗10
の共通な差動lN611!11.12゜13はそれぞれ
相対的に利得が興なり、差動!1幅器]2は差動増幅W
ITより6dB利得が高い関係にある。また差動増幅B
13の利得は再生に最も適する利得に選ばれる。
Further, as described above, a recording signal is applied to the recording signal input terminal 72, a reproduction signal is applied to the second signal input terminal 8, and a circuit output is obtained from the output terminal 7. Din resistance 10
The common differential lN611!11.12°13 has a relative gain, and the differential! 1 width amplifier] 2 is differential amplification W
The relationship is that the gain is 6 dB higher than that of IT. Also, differential amplification B
A gain of 13 is selected as the gain most suitable for reproduction.

次に、この回路の動作を説明する。再生時には、記録、
再生切換え制御端子9がローレベル(0゜7〜′以下)
となり、この場合色信号、バースト信号利得切換え制御
−子6の状態の如何にかかわらず、トランジスタ20が
オンし、トランジスタ18.19はオフして定電流源2
4は差動増幅器13に接続され、差動増幅器13が動作
する。
Next, the operation of this circuit will be explained. During playback, recording,
Regeneration switching control terminal 9 is at low level (below 0°7~')
In this case, regardless of the state of the color signal and burst signal gain switching control element 6, the transistor 20 is turned on, and the transistors 18 and 19 are turned off, so that the constant current source 2
4 is connected to the differential amplifier 13, and the differential amplifier 13 operates.

次に、記録時には、記録、再生切換え制御信号入力端子
9に接続されている記録中であることを示す信号がハイ
レベル(0,7V以上)となるため、トランジスタ23
がオンしトランジスタ2゜のベース電圧がほぼOvにな
る。そうすると、トランジスタ20はオフし、ついで^
い直流電圧のかかつているトランジスタ18がオンする
。そして、定電流源24は差動増幅器11に接続されこ
れが動作する。このとき、色信号、バースト信号利得切
換え制御信号入力端子6に入力される色信号、バースト
信号利得切換え制御信号は、バースト信号区間以外の区
間を表わすローレベルである。
Next, during recording, the signal connected to the recording/playback switching control signal input terminal 9 indicating that recording is in progress becomes high level (0.7 V or more), so the transistor 23
turns on, and the base voltage of transistor 2° becomes approximately Ov. Then, the transistor 20 turns off, and then ^
The transistor 18 to which a high DC voltage is applied is turned on. The constant current source 24 is connected to the differential amplifier 11 and operates. At this time, the chrominance signal and the burst signal gain switching control signal input to the chrominance signal and burst signal gain switching control signal input terminal 6 are at a low level representing a section other than the burst signal section.

そして、バースト信号区間にはこの端子6に入力される
色信号、バースト信号利得切換え制御信号はバースト区
間を表わすハイレベルになるためトランジスタ22がオ
ン、トランジスタ18のベース電位がほぼOvになって
、トランジスタ18はオフする。よって最後のトランジ
スタ19がオンすることとなる。すなわちこれは、定電
流I[24が差動増幅器11よりも6dB利得の高い差
動増幅器12に接続されたことを意味する。
During the burst signal period, the color signal input to this terminal 6 and the burst signal gain switching control signal are at a high level representing the burst period, so the transistor 22 is turned on and the base potential of the transistor 18 becomes approximately Ov. Transistor 18 is turned off. Therefore, the last transistor 19 is turned on. That is, this means that the constant current I[24 is connected to the differential amplifier 12 whose gain is 6 dB higher than that of the differential amplifier 11.

以上のように、この発明によれば、3つの差動増幅器の
出力端子にhI統する負荷を共通にし、共通端子に接L
llる定電流源を単一定′4流澱としてこれを切換えて
、fkl!録、再生の切換えおよtJ’ffi信号とパ
ース!−信号の利得切換えを行なっているため、信号切
換え時、1なわち各差動増幅器の切換え時ににおいで、
出力は号の直流動作点が変動しないという効it有(る
。これはプなわら、この回路の次に接@する増幅器の動
作点を常に一定にすることができ動作点変動による波形
歪、出力変動をも防ぐことができることを意味する。
As described above, according to the present invention, the output terminals of the three differential amplifiers have a common load connected to the hI, and the common terminal is connected to the load L.
Switching the constant current source to a single constant current source, fkl! Recording/playback switching and tJ'ffi signal and parsing! -Since the signal gain is switched, there is an odor when switching the signal, that is, when switching each differential amplifier.
It has the advantage that the DC operating point of the output signal does not fluctuate.This also means that the operating point of the amplifier connected next to this circuit can always be kept constant, which eliminates waveform distortion due to operating point fluctuations. This means that output fluctuations can also be prevented.

【図面の簡単な説明】[Brief explanation of the drawing]

図はこの発明の一実施例である磁気記録再生装習の色信
号処理回路における利得切換え増幅n路の回路図である
、 図において、2は記録信号人カニ4?!、3,4゜5は
直流電圧入力端子、6は色信号、バースト48号利得切
換え制御11fi号入力端子、7 it出出端端子8は
再生信号人力瑞子、9は配録、再生切換え制御信り入力
端子、11.12.13は利得の異なる差動増幅器、1
8.19.20.22.23はNPNトランジスタ、2
4は定電流源、10は共通の負荷抵抗、25は共通のリ
ードを示す。
The figure is a circuit diagram of an n-path gain switching amplification circuit in a color signal processing circuit for magnetic recording and reproducing equipment, which is an embodiment of the present invention. ! , 3,4゜5 is a DC voltage input terminal, 6 is a color signal, burst No. 48 gain switching control 11fi No. input terminal, 7 it output terminal 8 is a reproduction signal human power Zuiko, 9 is a distribution, reproduction switching control signal 11.12.13 are differential amplifiers with different gains, 1
8.19.20.22.23 is NPN transistor, 2
4 is a constant current source, 10 is a common load resistance, and 25 is a common lead.

Claims (6)

【特許請求の範囲】[Claims] (1) 入力信号に応じて、電源により付勢される共通
の負荷から共通の定電流源へ電流を流して、負荷電圧を
出力として取出す増幅器であって、共通の負荷と、 その共通の負荷に共通的に接続される相対的に利得の興
なる第1.第2および第3の差動増幅器と、 前記差動増′幅器に接続されその差動増幅器の中から入
力信号に応答して1つを選択的に有効化するスイッチン
グ回路と、そのスイッチング回路に接続される共通の単
一定電smmとを備えていることを特徴とする利得切換
え増幅回路。
(1) An amplifier that flows current from a common load energized by a power supply to a common constant current source in response to an input signal and extracts the load voltage as an output, and includes a common load and the common load. The first . second and third differential amplifiers; a switching circuit connected to the differential amplifier and selectively enabling one of the differential amplifiers in response to an input signal; and the switching circuit. and a common single constant current SMM connected to the gain switching amplifier circuit.
(2) 前記スイッチング回路は、 前記各差動増幅器に直列的に接続され、入力電極が予め
異なった直流電圧でプルアップされた差動増幅器用スイ
ッチング素子と、 前記スイッチング素子を入力信号に応じて切換える信号
選択用スイッチング素子とを備えたことを特徴とする特
許請求の範囲第1項記載の利得切換え増幅回路。
(2) The switching circuit includes: a differential amplifier switching element connected in series to each of the differential amplifiers, and whose input electrodes are pulled up with different DC voltages in advance; 2. The gain switching amplifier circuit according to claim 1, further comprising a switching element for selecting a signal to be switched.
(3) 前記スイッチング回路は、 記録信号に応答して前記第1.第2の差動増幅器を選択
的に有効化する第1.第2の差動増幅器選択用スイッチ
ング手段と、 再生信号に応答して前記第3の差動増幅器を選択的に有
効化する第3の差動増幅゛器選択用スイッチング県子と
を備えたことを特徴とする特許請求の範囲wi項記載の
利得切換え増幅回路。
(3) The switching circuit is configured to switch the first switching circuit in response to the recording signal. The first differential amplifier selectively enables the second differential amplifier. A switching device for selecting a second differential amplifier; and a switching predetermined switch for selecting a third differential amplifier that selectively enables the third differential amplifier in response to a reproduction signal. A gain switching amplifier circuit according to claim wi, characterized in that:
(4) 前記1111.第2の差動増幅器選択用スイッ
チング手段は、 色信号に応答して前記第1の差動増幅器を選択的に有効
化する第1の差動増幅器選択用スイッチング素子と、 バースト信号に応答して前記第2の差動増幅器を選択的
に有効化するM2の差動増幅器選択用スイッチング素子
とを備えたことを特徴とする特許請求の範囲第3項記載
の利得切換え増幅回路。
(4) 1111 above. The second differential amplifier selection switching means includes: a first differential amplifier selection switching element that selectively enables the first differential amplifier in response to a color signal; and a first differential amplifier selection switching element that selectively enables the first differential amplifier in response to a chrominance signal; 4. The gain switching amplifier circuit according to claim 3, further comprising an M2 differential amplifier selection switching element that selectively enables the second differential amplifier.
(5) 前記第1.第2の差動増幅器は、第1の差動増
幅器が相対的に低利得であり、第2の差動増幅器が相対
的に^利得であることを特徴とする特許請求の範囲M’
l記載の利得切換え増幅回路。
(5) Item 1 above. Claim M' wherein the second differential amplifier is characterized in that the first differential amplifier has a relatively low gain and the second differential amplifier has a relatively high gain.
The gain switching amplifier circuit described in l.
(6) 前記第1.第2の差動増幅器は、さらに、色信
号、バースト信号に応答して、前記第1゜第2の差動増
幅器用スイッチング素子をスイッチングする信号選択用
スイッチング素子を備えたことを特徴とする特許請求の
範囲路4項記載の利得切換え増幅回路。
(6) Item 1 above. The second differential amplifier further includes a signal selection switching element that switches the first and second differential amplifier switching elements in response to a color signal and a burst signal. A gain switching amplifier circuit according to claim 4.
JP8188582A 1982-05-13 1982-05-13 Amplifier circuit for switching gain Pending JPS58197906A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8188582A JPS58197906A (en) 1982-05-13 1982-05-13 Amplifier circuit for switching gain

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8188582A JPS58197906A (en) 1982-05-13 1982-05-13 Amplifier circuit for switching gain

Publications (1)

Publication Number Publication Date
JPS58197906A true JPS58197906A (en) 1983-11-17

Family

ID=13758899

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8188582A Pending JPS58197906A (en) 1982-05-13 1982-05-13 Amplifier circuit for switching gain

Country Status (1)

Country Link
JP (1) JPS58197906A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4950040A (en) * 1988-04-22 1990-08-21 Asea Brown Boveri Aktiengesellschaft Measuring range selection switch
EP1049249A1 (en) * 1999-04-30 2000-11-02 Lucent Technologies Inc. Variable gain amplifiers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4950040A (en) * 1988-04-22 1990-08-21 Asea Brown Boveri Aktiengesellschaft Measuring range selection switch
EP1049249A1 (en) * 1999-04-30 2000-11-02 Lucent Technologies Inc. Variable gain amplifiers

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