JPS58197845A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS58197845A JPS58197845A JP8001382A JP8001382A JPS58197845A JP S58197845 A JPS58197845 A JP S58197845A JP 8001382 A JP8001382 A JP 8001382A JP 8001382 A JP8001382 A JP 8001382A JP S58197845 A JPS58197845 A JP S58197845A
- Authority
- JP
- Japan
- Prior art keywords
- films
- substrate
- film
- wiring
- foundation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
[発明の属する技術分野]
この発明は、エレクトロマイグレーシ嘗ンに強く、ヒロ
ックの発生が無い、特に高い信頼性を有するM配線層の
形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a method for forming an M wiring layer that is resistant to electromigration and has no hillocks and has particularly high reliability.
[従来技術とその問題点]
Mは価格の安さ、膜形成の容易さ、優れ九加工性などに
よって、現在、半導体素子の配線金属として多用されて
いる。上記に示した多くの利点を有するものの、Mは配
線金属として未だ鱗決すべ―問題点を有している041
に簗積変の向上によって、2μ以下の微細な配線が必要
となって来た。[Prior art and its problems] M is currently widely used as a wiring metal for semiconductor devices because of its low price, ease of film formation, and excellent processability. Although it has many of the advantages listed above, M still has significant problems as a wiring metal.041
With the improvement of wire thickness, finer wiring of 2μ or less has become necessary.
微細な配線の実現の為には、まず、形成し九膜Eに、微
細なレジストパターン全形成する必要がある。次いで、
レジスト寸法通りの7Jロ丁ができることである0、又
、形成した微細配線が、微細化により一〇必然的に高く
なる電流帯間に対して強いことFなhち、エレクトロマ
イグレーシ曹ンに高い耐性を有する必要があるっさらに
は、多層配線において、層間絶縁不良を引自起こすヒロ
ックの発生を抑えることも重要である0
ヒ紀し九M配線における欠点を改良するには、ヒロック
の発生がしにくく、工っ、結晶粒が均一にそろっ九模を
形成すれば良い。その解決策として1ltl)方向にそ
ろったM膜は、エレクトロマイブレーン曹/に強いこと
が示されている。(J−KHoward and R−
J −R+osi、IBM ’I’ech 、 Rep
22 、601(March 1968 ) 、M、J
、Attardo and R,Rosenberg
。In order to realize fine wiring, it is first necessary to completely form a fine resist pattern on the nine films E formed. Then,
It is possible to form a 7J cut according to the resist dimensions, and the formed fine wiring is resistant to the current band width, which inevitably increases due to miniaturization. In addition to the need to have resistance, it is also important to suppress the occurrence of hillocks that cause poor interlayer insulation in multilayer wiring. It is difficult to form the crystal grains evenly, so it is best to form a uniform pattern. As a solution to this problem, an M film aligned in the 1ltl) direction has been shown to be resistant to electromybrain. (J-K Howard and R-
J-R+osi, IBM 'I'ech, Rep
22, 601 (March 1968), M, J
, Attardo and R. Rosenberg
.
J、Appm、phy、、41(6) (1970)
2381 )、又、この様な膜はヒロックに対しても発
生が、しにくいことは明らかである。J, Appm, phy, 41(6) (1970)
2381), it is also clear that such a film is difficult to form on hillocks.
この(111)方向にそろったAj膜を形成するには蒸
着方法、基板温度、蒸着速度などを制御することによっ
て、ある程度まで可能であるが、未だ充分とは言えない
。従って、容易に(111)方向くそろっ九M膜を形成
できれば、充分く信頼性の高い配線かりによっても可能
となる。Although it is possible to form an Aj film aligned in the (111) direction to some extent by controlling the deposition method, substrate temperature, deposition rate, etc., it is still not sufficient. Therefore, if it is possible to easily form a 9M film in the (111) direction, it will also be possible with sufficiently reliable wiring.
[発明の目的]
この発明は上述した従来方法の欠截を改良したもので、
はぼ完全に(111)方向にそろったAJglを堆積す
ることができ、よって、高い信頼性を有する配線を実現
できる方法を提供することを目的きする。[Object of the invention] This invention improves the deficiencies of the conventional method described above.
It is an object of the present invention to provide a method that can deposit AJgl that is almost perfectly aligned in the (111) direction, thereby realizing highly reliable wiring.
〔発明の概要]
発明者は、蒸着源に対して基板を斜めにして模を形成し
た場合、(111)方向にそろったり膜が形成されるこ
とを見い出し友。[Summary of the Invention] The inventor discovered that when a pattern is formed with the substrate oblique to the evaporation source, a film is formed that aligns in the (111) direction.
第1図はその方法を示し死因で、図中で11はM蒸着源
、12は基板を示す。図に示す様に蒸着源11に対して
、基板12を斜めにして膜形成をする方法である。幕板
の法線と蒸着源とのなす角αが30゜を越えると、(1
11)方向にそろい易くなる。第2図はαがOOと45
0の場合に形成した膜のX41回折の結果である。(1
11)方向に強くそろり九−が形成されることを示して
いる。FIG. 1 shows the method and causes of death. In the figure, numeral 11 indicates an M evaporation source and 12 indicates a substrate. As shown in the figure, this is a method of forming a film with the substrate 12 tilted with respect to the evaporation source 11. When the angle α between the normal to the curtain plate and the evaporation source exceeds 30°, (1
11) It becomes easier to align in the direction. In Figure 2, α is OO and 45
These are the results of X41 diffraction of a film formed when (1
11) It is shown that a strong 9- is formed in the direction.
この様な現象は、膜の形成方法、例えば電子ビーム、i
s、スパッタ法に依らない。又、膜の種類純A−7!幌
、8i又はCuを添加したM合金膜などKもよらない。This phenomenon can be caused by film formation methods such as electron beam, i
s, regardless of sputtering method. Also, the type of membrane is pure A-7! K does not depend on hood, 8i or M alloy film added with Cu.
しかしながら、この基板を斜めして膜を形成する方法は
、基板全体にa[11[が均一な膜を形成することが困
峻である。However, with this method of forming a film on a diagonal substrate, it is difficult to form a film with uniform a[11[ over the entire substrate.
本発明は、先づ、基板を斜めにして数百^程度の薄い膜
厚の方位のそろった膜を形成しておき、次いで通常の方
法で、方位のそろった膜を核として、そろった方位を受
は継いだ膜厚の均一な膜を形成する方法である。In the present invention, a substrate is first tilted to form a film with a uniform orientation and a thin film thickness of about several hundred^, and then a film with a uniform orientation is formed using a normal method as a core. This is a method to form a film with a uniform thickness.
[発明の効果]
本発明に依れば、(10)方向にそろったM膜が〒
均一に形成される為、ヒロックの発生が弗常に少なく、
エレクトロマイグレーシ曹ンに強い配線が形成される。[Effects of the Invention] According to the present invention, since the M film aligned in the (10) direction is uniformly formed, the occurrence of hillocks is greatly reduced.
A strong wiring is formed in the electromigration layer.
[発明の実施例]
基板を斜めにすることに依り、(111)方向にそろっ
たAn !l[、Q1形成される。しかしながら、基板
が斜めであると、膜厚が不均一となり、配線の加エトの
問題へとなる。本発明による方法では、先づ基板を30
0以ト傾けて、数百A徨変の方位のそろった斜め膜を形
成しておく。次いで、A ’R、’)方法によ抄uI!
11のそろったAI膜を一所望の膜厚友は形成する。こ
の時、下地がすでに方位がそろっている為、この上に形
成される膜は、成長時に下地の方位を受は継いで成長し
易くなる。従って、最終的に形成された膜は(111)
方向に充分そろった膜となる。この為、ヒロックの発生
の少ない、又エレクトロマイグレーシ曹ンにも強いM配
線が実現で−る。[Embodiment of the Invention] By making the substrate oblique, An aligned in the (111) direction! l[, Q1 is formed. However, if the substrate is tilted, the film thickness will be non-uniform, leading to problems with wiring. In the method according to the invention, the substrate is first
The film is tilted more than 0 to form a diagonal film with a uniform orientation of several hundred amperes. Then, use the A'R,') method to extract the information!
11 AI films with a desired thickness are formed. At this time, since the orientation of the base is already aligned, the film formed thereon will easily grow by inheriting the orientation of the base during growth. Therefore, the final film formed is (111)
This results in a film that is well aligned in the direction. For this reason, an M wiring that is resistant to electromigration and has fewer hillocks can be realized.
尚、斜め基板K11lを形成するKは、蒸着、スパッタ
などの形成方法の如何によらない。又、純M。Note that K forming the oblique substrate K11l does not depend on the formation method such as vapor deposition or sputtering. Also, pure M.
84、Cuなどの不純物を添加し九M合金膜に対しても
有効であり、Ajの種aKも依らない。It is also effective for a 9M alloy film to which impurities such as 84 and Cu are added, and it does not depend on the species aK of Aj.
第1図は基板を糾めにして膜を形成する方法を−r<
した図で、11はM蒸発源、12は基板を示す。又第2
図(a)(b)は、夫々斜めにした膜とそうでない膜の
X線回折の結果の特性図である0
代理人 弁1士 則 近 唐 佑
(他1名)
罰墜11* 皺坤叶
q づFigure 1 shows the method of forming a film by compressing a substrate.
In the figure, 11 indicates an M evaporation source, and 12 indicates a substrate. Also second
Figures (a) and (b) are characteristic diagrams of the X-ray diffraction results for a membrane that is tilted and a membrane that is not, respectively. Kanae
Claims (1)
ける工程において、あらかじめ半導体基板を金属蒸着源
に対して斜めにして薄い配線金属層を形成しておくこと
を特徴とする半導体装置の製造方法。Manufacture of a semiconductor device characterized by forming a thin wiring metal layer by tilting the semiconductor substrate with respect to a metal vapor deposition source in advance in the step of providing a metal film serving as wiring on a semiconductor substrate on which elements are formed. Method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8001382A JPS58197845A (en) | 1982-05-14 | 1982-05-14 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8001382A JPS58197845A (en) | 1982-05-14 | 1982-05-14 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58197845A true JPS58197845A (en) | 1983-11-17 |
Family
ID=13706429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8001382A Pending JPS58197845A (en) | 1982-05-14 | 1982-05-14 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58197845A (en) |
-
1982
- 1982-05-14 JP JP8001382A patent/JPS58197845A/en active Pending
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