JPH03262127A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03262127A JPH03262127A JP5993490A JP5993490A JPH03262127A JP H03262127 A JPH03262127 A JP H03262127A JP 5993490 A JP5993490 A JP 5993490A JP 5993490 A JP5993490 A JP 5993490A JP H03262127 A JPH03262127 A JP H03262127A
- Authority
- JP
- Japan
- Prior art keywords
- film
- wiring
- crystal
- based alloy
- base alloy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 37
- 239000000956 alloy Substances 0.000 claims abstract description 37
- 239000013078 crystal Substances 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 12
- 238000002844 melting Methods 0.000 claims abstract description 11
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 17
- 230000008018 melting Effects 0.000 abstract description 8
- 238000004544 sputter deposition Methods 0.000 abstract description 7
- 239000000463 material Substances 0.000 abstract description 2
- 239000012299 nitrogen atmosphere Substances 0.000 abstract description 2
- 229910000838 Al alloy Inorganic materials 0.000 abstract 1
- 229910018594 Si-Cu Inorganic materials 0.000 abstract 1
- 229910008465 Si—Cu Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 46
- 238000013508 migration Methods 0.000 description 4
- 230000005012 migration Effects 0.000 description 4
- 239000010410 layer Substances 0.000 description 3
- 238000002441 X-ray diffraction Methods 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は半導体装置の製造方法に係り、特にＭ系合金
配線の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing an M-based alloy wiring.
（従来の技術）
従来、半導体装置において配線は、Ｍ系合金（例えばＡ
ｌ−５ｉ）をスパッタにより堆積させ、フォトリソエツ
チングによりパターニングして形成している。(Prior Art) Conventionally, wiring in semiconductor devices is made of M-based alloy (for example, A
1-5i) is deposited by sputtering and patterned by photolithography.
（発明が解決しようとする課題）
しかしながら、上記の方法で形成されるＭ系合金配線で
は、熱処理時にヒロックが多く生し、層間ショートが生
じたり、パッシベーション膜によるストレスや電流によ
りマイグレーションが生し、配線の信頼性が低下すると
いう問題点があった。(Problems to be Solved by the Invention) However, in the M-based alloy wiring formed by the above method, many hillocks occur during heat treatment, interlayer shorts occur, and migration occurs due to stress and current due to the passivation film. There was a problem in that the reliability of the wiring decreased.
これを抑制するためにＭ系合金中にＣｕやＴｉなどの不
純物を添加する方法もあるが、エンチングがしにくいな
どの問題点がある。In order to suppress this, there is a method of adding impurities such as Cu or Ti to the M-based alloy, but there are problems such as difficulty in etching.
一方、Ｍ系合金の結晶を一定方向に強く配向させると、
信頼性が向上することは良く知られた事実である。一定
方向に強く結晶配向した薄膜では、隣接結晶粒間の方位
差角が小さいので、粒界移動が抑制され、ヒロックの発
生やマイグレーションが抑制されるからである。On the other hand, if the crystals of the M-based alloy are strongly oriented in a certain direction,
It is a well-known fact that reliability is improved. This is because in a thin film whose crystals are strongly oriented in a certain direction, the misorientation angle between adjacent crystal grains is small, so grain boundary movement is suppressed, and the occurrence of hillocks and migration are suppressed.
しかしながら、従来のスパンタ法では、Ｍ系合金膜の結
晶を制御するのは困難であり、Ｍ系合金の結晶を一定方
向に強く配向させる有効な手段が未だ開発されていない
。However, with the conventional spunter method, it is difficult to control the crystals of the M-based alloy film, and an effective means for strongly orienting the crystals of the M-based alloy in a certain direction has not yet been developed.
この発明は上記の点に鑑みなされたもので、配線として
のＭ系合金膜を容易に一定の方向に結晶配向させて信頼
性の高いＭ系合金配線を容易に得ることができる半導体
装置の製造方法を捉供することを目的とする。The present invention has been made in view of the above points, and it is possible to manufacture a semiconductor device in which highly reliable M-based alloy wiring can be easily obtained by easily crystallizing an M-based alloy film as a wiring in a certain direction. The purpose is to provide information on how to do this.
（課題を解決するための手段）
この発明は半導体装置の製造方法、特にＭ系合金配線の
製造方法において、まず半導体基板上に、Ｍ系合金配線
の下地として、Ａｌと類似の結晶構造をもつ高融点金属
膜を一定の方向に強く結晶配向させて形成し、その上に
配線材料としてのＭ系合金膜を形成するものである。(Means for Solving the Problems) The present invention provides a method for manufacturing a semiconductor device, particularly a method for manufacturing an M-based alloy wiring, in which a substrate having a crystal structure similar to that of Al is first formed on a semiconductor substrate as a base for the M-based alloy wiring. A high-melting point metal film is formed with strong crystal orientation in a certain direction, and an M-based alloy film is formed thereon as a wiring material.
（作 用）
ＡＩと類似の結晶構造をもつ高融点金属膜を一定の方向
に強く結晶配向させて下地として形成しておくと、その
上にだ系合金膜を形成した際、該Ｍ系合金膜も前記高融
点金属膜と同一方向に強く結晶配向して形成される。し
たがって、このＭ系合金膜をパターニングすれば、容易
に信頼性の高いＭ系合金配線が得られる。なお、高融点
金属膜も同様にパターニングされ、配線の一部となる。(Function) If a high melting point metal film with a crystal structure similar to that of AI is formed as a base with strong crystal orientation in a certain direction, when a Da-based alloy film is formed on top of it, the M-based alloy The film is also formed with crystals strongly oriented in the same direction as the high melting point metal film. Therefore, by patterning this M-based alloy film, a highly reliable M-based alloy wiring can be easily obtained. Note that the high melting point metal film is also patterned in the same way and becomes part of the wiring.
なお、高融点金属膜は、スパッタ法や電子ビーム蒸着法
などにおいて基板温度、基板バイアスを制御することに
より、容易に一定の方向に強く結晶配向さセることがで
きる。Note that the high melting point metal film can be easily crystallized strongly in a certain direction by controlling the substrate temperature and substrate bias in a sputtering method, an electron beam evaporation method, or the like.
また、ここで言う「Ａｌと類似の結晶構造」とは、面心
立法で格子定数がＡｌと数％以内の差であるということ
である。そのような高融点金属の一例としてはＴｉＮや
ＺｒＮなどが挙げられる。Furthermore, the term "crystal structure similar to Al" as used herein means that the lattice constant differs from Al by within a few percent in a face-centered cubic system. Examples of such high melting point metals include TiN and ZrN.
（実施例）
以下この発明の一実施例を図面を参照して説明する。第
１図はこの発明の一実施例を示す断面図である。この図
において、１１ば図示しない拡散層やトランジスタなど
が形成されたＩＣ基板である。このＩＣ基板１１上に絶
縁膜１２（例えばＣＶＤ法によるＢＰＳＧ膜）を６００
０人堆積させる。そして、その上に、＜２００＞方向で
強く結晶配向するようにＴｉ膜をスパッタ法（例えば全
圧６〜７ ｍＴｏｒｒ 、パワー１．５〜２．０ ｋＷ
、基板無加熱）により５００人堆積させ、これをＮ２中
でランプアニール（Ｎ２ ２５００ＳＣＣＭ、 ８０
０°Ｃ１３０秒）することにより、第２図の特性（ａ）
で示すように＜１１１＞に強く結晶配向したＴｉＮ膜１
３とする。しかる後、そのＴｉＮ膜１膜上３上系合金（
例えばＡＩ−５ｉ−Ｃｕ）膜１４をスパッタ法で７００
０人堆積させる。すると、このＭ光合金膜１４は、第３
図の特性（ａ）で示すように、前記ＴｉＮ膜１３と同一
の＜１１１＞方向に強く結晶配向したＭ系合金膜として
形成される。しかる後、このＭ光合金膜１４をパターニ
ングすることにより、Ｍ系合金配線を形成する。この時
、ＴｉＮ膜１３も同様にパターニングされ、配線の一部
となる。(Embodiment) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing an embodiment of the present invention. In this figure, reference numeral 11 indicates an IC substrate on which a diffusion layer, a transistor, etc. (not shown) are formed. On this IC substrate 11, an insulating film 12 (for example, a BPSG film made by CVD method) is formed with a thickness of 600 mm.
Deposit 0 people. Then, on top of that, a Ti film is sputtered so that the crystals are strongly oriented in the <200> direction (for example, the total pressure is 6 to 7 mTorr, the power is 1.5 to 2.0 kW).
, no heating of the substrate), and then lamp annealed in N2 (N2 2500SCCM, 80
0°C for 130 seconds), the characteristic (a) in Figure 2 is obtained.
TiN film 1 with strong <111> crystal orientation as shown in
Set it to 3. After that, a 3-substrate alloy (
For example, the AI-5i-Cu) film 14 is sputtered to a thickness of 700 cm.
Deposit 0 people. Then, this M photoalloy film 14
As shown in characteristic (a) in the figure, it is formed as an M-based alloy film with crystal orientation strongly in the same <111> direction as the TiN film 13. Thereafter, by patterning this M optical alloy film 14, an M-based alloy wiring is formed. At this time, the TiN film 13 is similarly patterned and becomes part of the wiring.
第２図の特性（ｂ）、 （ｃ１，（ｄ）は、反応性スパ
ッタ法で窒素雰囲気中でスパッタして直接ＴｉＮ膜を形
成する方法（上述実施例とは異なる）において、基板バ
イアスを０Ｖ（ｂ）、−１７０Ｖ（ｃ）、−６００Ｖ（
ｄ）に変えてＴｉＮ膜を形成した時の該ＴｉＮ膜の結晶
配向強度を示し、第３図の特性（ｂ）、 （ｃ）、 （
ｄ）は、その夫々のＴｉＮ膜」二にｊＶ−５ｉ−Ｃｕ合
金をスパッタにより堆積させた場合のＭの結晶相のＸ線
回折パターンである。この特性（ｂ） 、 （ｃ） 、
（ｄ）ならびに前述実施例の特性（ａ）から明らかな
ように、下地ＴｉＮ膜が＜１１１＞だと上層Ｍも＜１１
１＞に配向しており、ＴｉＮ膜が＜２００＞だとＭにも
＜２００＞のピークが現われている。また、下地ＴｉＮ
膜の結晶配向が強いと、上層Ｍ合金の結晶配向も強くな
っている。したがって、−例として上述実施例のように
下地ＴｉＮ膜１３を＜１ ｒ １＞に強く結晶配向して
形成しておけば、その上のＭ光合金膜Ｉ４も＜１１１＞
方向に強く結晶配向して形成されることになり、そのＭ
光合金膜１４をパターニングすれば、ヒロックの減少や
マイグレーション耐性の向上した信頼性の高いＭ系合金
配線を容易に形成できる。Characteristics (b), (c1, and (d) in Figure 2) are obtained using a reactive sputtering method in which a TiN film is directly formed by sputtering in a nitrogen atmosphere (different from the above embodiment), with a substrate bias of 0 V. (b), -170V (c), -600V (
The crystal orientation strength of the TiN film is shown when a TiN film is formed instead of (d), and the characteristics (b), (c), (
d) is an X-ray diffraction pattern of the M crystal phase when a jV-5i-Cu alloy was deposited on each TiN film by sputtering. This characteristic (b), (c),
As is clear from (d) and the characteristic (a) of the above-mentioned embodiment, when the underlying TiN film is <111>, the upper layer M is also <11>.
1>, and if the TiN film is <200>, a <200> peak also appears in M. In addition, the base TiN
When the crystal orientation of the film is strong, the crystal orientation of the upper layer M alloy is also strong. Therefore, as an example, if the base TiN film 13 is formed with a strong crystal orientation of <1 r 1> as in the above embodiment, the M photoalloy film I4 thereon also has a crystal orientation of <111>.
It is formed with strong crystal orientation in the direction, and its M
By patterning the optical alloy film 14, highly reliable M-based alloy wiring with reduced hillocks and improved migration resistance can be easily formed.
なお、上記実施例では、Ａｌと頻僚の結晶構造をもつ高
融点金属膜としてＴｉＮ膜を形成したカベＺｒＮ膜など
を形成することもできる。In addition, in the above embodiment, it is also possible to form a wall ZrN film on which a TiN film is formed as a high melting point metal film having a polymorphic crystal structure with Al.
また、それら高融点金属膜は、スパッタ法や電子ビーム
蒸着法などで基板温度や基板バイアスを制御することに
より、容易に一定の方向に強く結晶配向させることがで
きる。その配向方向も実施例の＜１１１＞方向に限定さ
れるものではなく、例えば＜２００＞、＜２２０＞方向
でもよい。Furthermore, these high melting point metal films can be easily and strongly crystallized in a certain direction by controlling the substrate temperature and substrate bias using sputtering, electron beam evaporation, or the like. The orientation direction is not limited to the <111> direction of the embodiment, but may also be, for example, the <200> or <220> direction.
（発明の効果）
以上詳述したように、この発明の製造方法によれば、Ｍ
系合金配線の下地として、Ａｌと類似の結晶構造をもつ
高融点金属膜を一定の方向に強く結晶配向させて形成し
ておくことにより、その上にＭ系合金膜を形成すること
により、絶縁膜上のそれと比べて強く一定方向に結晶配
向したＭ系合金膜を形成することができ、そのＭ系合金
膜をパタニングすることにより、ヒロックの減少やマイ
グレーション耐性の向上した信頼性の高い、かつ微細化
に適したＭ系合金配線を形成することができる。(Effect of the invention) As detailed above, according to the manufacturing method of the present invention, M
By forming a high-melting point metal film with a crystal structure similar to Al as a base for the alloy wiring, and forming the M-based alloy film on top of it, the insulation can be improved. It is possible to form an M-based alloy film with stronger crystal orientation in a certain direction than that on a film, and by patterning the M-based alloy film, it is possible to create a highly reliable film with reduced hillocks and improved migration resistance. M-based alloy wiring suitable for miniaturization can be formed.
第１図はこの発明の半導体装置の製造方法の一実施例を
示す断面図、第２図はさまざまな方法で形成したＴｉＮ
膜のＴｉＮ結晶相のＸ線回折パターンを示す図、第３図
はＴｉＮ膜上に形成したＭ系合金膜のＭの結晶相のＸ線
回折パターンを示す特性図である。
１ ｌ ・・・ ■
金膜。
Ｃ基板、
３ ・・・ＴｉＮ
膜、
１４ ・・
Ａ１系合FIG. 1 is a cross-sectional view showing an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIG.
FIG. 3 is a characteristic diagram showing the X-ray diffraction pattern of the M crystal phase of the M-based alloy film formed on the TiN film. 1 l... ■ Gold film. C substrate, 3...TiN film, 14...A1 system compound
Claims (1)
ｌと類似の結晶構造をもつ高融点金属膜を一定の方向に
強く結晶配向させて形成し、 （ｂ）その上にＭ系合金膜を形成し、 （ｃ）これらの膜をパターニングすることにより配線を
形成したことを特徴とする半導体装置の製造方法。[Claims] (a) On a semiconductor substrate, as a base for M-based alloy wiring, A
By forming a high-melting point metal film with a crystal structure similar to l with strong crystal orientation in a certain direction, (b) forming an M-based alloy film thereon, and (c) patterning these films. A method for manufacturing a semiconductor device, characterized in that wiring is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5993490A JPH03262127A (en) | 1990-03-13 | 1990-03-13 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5993490A JPH03262127A (en) | 1990-03-13 | 1990-03-13 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03262127A true JPH03262127A (en) | 1991-11-21 |
Family
ID=13127460
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5993490A Pending JPH03262127A (en) | 1990-03-13 | 1990-03-13 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03262127A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2714527A1 (en) * | 1993-12-28 | 1995-06-30 | Fujitsu Ltd | Method of manufacturing semiconductor devices with aluminum wiring. |
| JPH07326612A (en) * | 1994-05-26 | 1995-12-12 | Lg Semicon Co Ltd | Wiring formation method for semiconductor element |
| US5703403A (en) * | 1993-11-08 | 1997-12-30 | Nippondenso Co., Ltd. | Electrode for semiconductor device and method for producing the same |
| US6066891A (en) * | 1994-04-28 | 2000-05-23 | Nippondenso Co., Ltd | Electrode for semiconductor device including an alloy wiring layer for reducing defects in an aluminum layer and method for manufacturing the same |
| US6650017B1 (en) | 1999-08-20 | 2003-11-18 | Denso Corporation | Electrical wiring of semiconductor device enabling increase in electromigration (EM) lifetime |
-
1990
- 1990-03-13 JP JP5993490A patent/JPH03262127A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5703403A (en) * | 1993-11-08 | 1997-12-30 | Nippondenso Co., Ltd. | Electrode for semiconductor device and method for producing the same |
| FR2714527A1 (en) * | 1993-12-28 | 1995-06-30 | Fujitsu Ltd | Method of manufacturing semiconductor devices with aluminum wiring. |
| US6066891A (en) * | 1994-04-28 | 2000-05-23 | Nippondenso Co., Ltd | Electrode for semiconductor device including an alloy wiring layer for reducing defects in an aluminum layer and method for manufacturing the same |
| US6348735B1 (en) | 1994-04-28 | 2002-02-19 | Nippondenso Co., Lt. | Electrode for semiconductor device and method for manufacturing same |
| DE19515564B4 (en) * | 1994-04-28 | 2008-07-03 | Denso Corp., Kariya | Electrode for a semiconductor device and method of making the same |
| JPH07326612A (en) * | 1994-05-26 | 1995-12-12 | Lg Semicon Co Ltd | Wiring formation method for semiconductor element |
| US6650017B1 (en) | 1999-08-20 | 2003-11-18 | Denso Corporation | Electrical wiring of semiconductor device enabling increase in electromigration (EM) lifetime |
| US6908857B2 (en) | 1999-08-20 | 2005-06-21 | Denso Corporation | Method of manufacturing semiconductor device |
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