JPS58197769A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To obtain a large-sized and high quality indicating or image pickup mechanism for the titled device by a method wherein a connection electrode, to be connected to the driving circuit for picture element electrode, is provided on the side face of the substrate having a systematically arranged picture element. CONSTITUTION:All regions excluding the pad part 3a on the end face 1a of a substrate and the input-output electrode part 5 of the active element on a driving circuit 4, are covered by a resist mask and Al is vapor-deposited thereon. Said mask is removed and a pad 3a is formed. As the picture element alone is left on the upper part of the substrate 1 and there exists no connection electrode between chips, the distance between the picture element electrode group and the substrate end face can be made to one half or smaller of the pitch of the picture electrode, thereby enabling to obtain a large picture of prescribed size for graphic indication, by connecting the pad parts 3a each other. Beautiful picture is constructed in simple constitution because of the upper surface of the substrate of IC chip is all photo emitting region and the wiring between chips is needless.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a semiconductor integrated circuit device (hereinafter referred to as a TC device), and more specifically, it relates to a semiconductor integrated circuit device (hereinafter referred to as a TC device), and more specifically, to The present invention relates to a new display or imaging device that is larger in size by improving the interconnection structure of a plurality of IC chips in which drive circuits are integrally integrated.

Background of the Technology In recent years, solid-state display devices and solid-state imaging devices have been researched and developed in which display elements or light-receiving elements and drive circuits for these elements are integrally integrated on the surface of a semiconductor substrate.

Such a drive circuit is integrated, for example, with display elements or light receiving elements arranged in a matrix on a silicon substrate. However, in such a configuration, the scale of one display screen or imaging screen is limited by the size of the silicon substrate on which the display element or the light receiving element and the drive circuit are integrated, and it is extremely difficult to increase the size of the screen. Furthermore, if a large number of drive circuits are integrated on the surface of a single substrate, defects such as electrode short-circuiting or disconnection are likely to occur, resulting in a significant reduction in manufacturing yield.

Therefore, in order to eliminate the above-mentioned disadvantages, patent application No. 55-2/584
No. 4 (Japanese Unexamined Patent Publication No. 56-122089) and others proposes the concept of combining a required number of RC chimps each having a small unit of pixels, such as 20×20 dots, to increase the size of the two display or imaging screen.

When adopting such a configuration method, it is necessary to interconnect a large number of IC chips.

(C) Prior Art and Problems In general, connections between IC chips are made by providing pads on the top surface of the chips and using wire bonding, face-down bonding, or the like. In this case, the conventional example is that the connection pads are provided around the matrix region of the pixel electrode that defines the arrangement of display or light-receiving elements.

However, in the case of graph ink displays and imaging devices,
When a plurality of IC chips as described above are combined, the arrangement pitch of pixel electrodes must be the same even between adjacent chips. If we look at this for each IC chip, as shown in FIG.
, the distance q between the pixel electrode 2a arranged in the most peripheral part and the edge 1a of the substrate l is 1/2p.
The following conditions must be met.

However, the size of the pad for inter-chip connection is approximately 80 to 100 microns for wire bonding, and approximately 50 microns for face-down bonding, and as the pitch p of the pixel electrodes becomes smaller, , it becomes extremely difficult to satisfy the above conditions.

+d) Purpose of the Invention The present invention has been made in view of the above-mentioned points.
When interconnecting C-chips, we provide a new connection pad structure that ensures the same pixel electrode array pitch at the chip-to-chip connection section as within the chip, thereby achieving large-scale, high-quality display or imaging functions. This is what I am trying to do.

te+ Structure of the Invention The object of the present invention described above is to provide a structure having a plurality of pixel electrodes regularly arranged on a common substrate and integrally integrating a driving circuit for the pixel electrodes. This can be easily achieved by providing connection electrodes for the drive circuit on the side surface of the substrate.

Embodiments of the Invention Examples of the present invention will now be described with reference to the drawings. FIG. 2 is a perspective view conceptually showing an embodiment of the IC chip according to the present invention.

A drive circuit (not shown) integrated to selectively drive the pixel electrode 2 and pads 3a of external connection electrodes of an address circuit are provided on the end surface 1a of the semiconductor substrate 1.

Next, a method for forming the pad 3a will be briefly described with reference to a cross-sectional view of a portion of the IC chip shown in FIG.

The formation portion of the pad 3a on the end surface 1a of the substrate and the drive circuit 4
The parts other than the input/output electrodes 5 of the active element of
When the photoresist film is covered with II and aluminum is evaporated in the direction shown by the arrow in the evaporation tank, and then the photoresist film is removed, a paten 3a as shown in FIG. 1 is formed. Note that the light emitting layer is omitted in FIG. 3.

Only one pixel electrode exists on the upper surface of the substrate 1, and no electrode 3 for connection between the chip and the knob exists, so that the upper surface of the substrate 1 of the chip is occupied only by the light emitting region.

In addition, the distance q between the outermost row of pixel electrode groups 2a shown in FIG. 1 and the substrate end surface 1a can be made equal to or less than A of the pitch p of the pixel electrodes.

Therefore, based on this invention, the Ic chips each have connecting electrodes 3 disposed on the end surface 1a of the substrate 1.

By connecting them together using a method such as ultrashort wave welding, it is possible to obtain a large screen for displaying graphics of a predetermined size.

FIG. 4 is a perspective view conceptually showing an example in which four IC chips are combined based on the present invention.

(10 Effects of the Invention As is clear from the above description, the IC device according to the present invention includes a plurality of IC chips in which display elements or light receiving elements and their driving circuits are integrally integrated on the surface of a semiconductor substrate. Since the WaS electrodes can be connected to each other by connection electrodes disposed on the end face of the chip while keeping the arrangement pitch the same, a large-area graphic display device or imaging device can be easily obtained.

Furthermore, based on the present invention, the entire top surface of the IC chip substrate is a light-emitting area, and there is no need for any wiring to connect the chips, so the overall screen configuration is extremely simple and a beautiful screen can be obtained. .

[Brief explanation of drawings]

Fig. 1 is a plan view conceptually showing the electrode arrangement of a conventional IC chip, Fig. 2 is a perspective view of an IC chip based on the present invention, and Fig. 3 is a sectional view conceptually showing the vicinity of the connection electrodes. , 4th
The figure is a perspective view conceptually showing a method of constructing a large screen by combining four IC chisops according to the present invention. 1 is an IC chip board, la is an end surface of the IC chip board 1, 2 is a pixel electrode, 2a is a pixel electrode in the outermost row, 3 is a connection electrode pad, 4 is a drive circuit section, and 5 is an IC chip input/output electrode. are shown respectively.

Claims (1)

[Claims] In a configuration in which a plurality of pixel electrodes are regularly arranged on a common substrate and a driving circuit for the pixel electrodes is integrally integrated, a connection to the driving circuit is provided on an end surface of the substrate. 1. A semiconductor integrated circuit device, characterized in that a semiconductor integrated circuit device is provided with an electrode.