TWI783875B - Display panel - Google Patents

Abstract

A display panel includes a pixel array substrate, A first circuit flexible boards corresponding to a first display area and (M-A)/N second circuit flexible boards corresponding to any one of N second display areas. The pixel array substrate includes a plurality of pixels, a plurality of data lines and a plurality of scan lines. The pixels are disposed in the first display area and the N second display areas, and form R1 pixel columns arranged in a first direction and R2 pixel rows arranged in a second direction. The data lines are electrically connected to the R1 pixel columns. The scan lines are electrically connected to the R2 pixel rows. M is a non-integer multiple of N, and A and (M-A)/N are positive integers. The data lines are electrically connected to the A first circuit flexible boards and (M-A) second circuit flexible boards. The scan lines are electrically independent from the A first circuit flexible boards.

Description

display panel

The present invention relates to a display technology, and in particular to a display panel.

In order to achieve an ultra-narrow bezel or no bezel design, a technology is proposed that reconfigures the existing gate signal traces that enter the display area from the left and right sides to enter the display area on the same side as the source signal traces. Therefore, the circuit flexible board used in this type of display panel has both source signal and gate signal transmission capabilities. In addition, most of the display panels using this technology adopt a gate multi-drive (such as three-drive or four-drive) circuit design. For example, the scanning lines extending in the horizontal direction and crossing the display area can be received by multiple areas of the display area. Gate drive signal.

As large-size displays are more and more widely used, the demand for using different pixel resolutions is also increasing. In the case of limited specifications of circuit flexible boards (such as the number of transmission channels) and large-sized display panels that must satisfy arbitrary pixel resolutions, the display panel with the above-mentioned multi-drive architecture is prone to the problem that the number of circuit flexible boards cannot be evenly divided. In this situation, the types of circuit flexible boards joined by a single panel increase, and the circuit layout of the corresponding peripheral wiring is also more difficult.

The present invention provides a display panel with lower production cost. The repeatability of circuit design in different display areas and corresponding peripheral areas is better, and the selection of the joint circuit flexible board is also more flexible.

The display panel of the present invention has a pixel resolution of R1×R2, and includes a pixel array substrate and M circuit flexible boards. The pixel array substrate has a first display area and N second display areas, and includes a plurality of pixels, a plurality of data lines and a plurality of scanning lines. These pixels are arranged in the first display area and the N second display areas, and are arranged in R1 pixel rows and R2 pixel columns. These pixel rows are arranged along the first direction. These pixel columns are arranged along the second direction. The first direction and the second direction intersect each other. The data lines are arranged in the first display area and the N second display areas along the first direction, and extend in the second direction. These data lines are electrically connected to R1 pixel rows respectively. The scanning lines are arranged in the first display area and the N second display areas along the second direction, and extend in the first direction. These scan lines are respectively electrically connected to the R2 pixel columns. M circuit flexible boards are electrically bonded to the pixel array substrate, and include A first circuit flexible boards corresponding to the first display area and (M-A)/N second circuit flexible boards corresponding to each second display area . M is a non-integer multiple of N, and M and N are positive integers greater than 1. A and (M-A)/N are positive integers. These data lines are electrically connected to A first circuit flexible boards and (M-A) second circuit flexible boards corresponding to the N second display areas. The scanning lines are electrically connected to (M-A) second circuit flexible boards, and are electrically independent from the A first circuit flexible boards.

Based on the above, in the display panel according to an embodiment of the present invention, its display area can be divided into a first display area and a plurality of second display areas. These second display areas all have the same driving circuit design, and the driving circuit designs in the first display area and the second display area are different. Accordingly, in addition to meeting the circuit design requirements of large-size or arbitrary pixel resolution display panels based on manufacturing cost considerations, it can also increase the selection flexibility of the display panel for circuit flexible boards.

As used herein, "about," "approximately," "essentially," or "essentially" includes the stated value and averages within acceptable deviations from the particular value as determined by one of ordinary skill in the art, taking into account the The measurement in question and the specific amount of error associated with the measurement (ie, the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or for example within ±30%, ±20%, ±15%, ±10%, ±5%. Furthermore, "about", "approximately", "essentially" or "substantially" used herein can choose a more acceptable deviation range or standard deviation according to the nature of measurement, cutting or other properties, and can be Not one standard deviation applies to all properties.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to physical and/or electrical connection. Furthermore, "electrically connected" may mean that other elements exist between two elements.

Additionally, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element as shown in the figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "below" can encompass both an orientation of "below" and "upper," depending on the particular orientation of the drawing. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "above" or "below" can encompass both an orientation of above and below.

Exemplary embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations in the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region shown or described as flat, may, typically, have rough and/or non-linear features. Additionally, acute corners shown may be rounded. Thus, the regions shown in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and descriptions to refer to the same or like parts.

FIG. 1 is a schematic front view of a display panel according to a first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a part of the display panel in FIG. 1 . FIG. 3 is a partially enlarged schematic view of the display panel of FIG. 1 . FIG. 4 is a schematic front view of a display panel according to a second embodiment of the present invention.

Referring to FIG. 1 , the display panel 10 includes a pixel array substrate 100 and M circuit boards. The pixel array substrate 100 has a display area DA and a peripheral area PA outside the display area. The M circuit flexible boards can be respectively electrically connected to the peripheral area PA of the pixel array substrate 100 on the sky side (ie, the upper side in FIG. 1 ).

In detail, the display area DA can be divided into a first display area DA1 and N second display areas. In this embodiment, the number N of the second display areas is, for example, three, which are respectively the second display area DA2-1, the second display area DA2-2 and the second display area DA2-3. The first display area DA1 and the second display areas may be arranged along a direction D1.

In these display areas, the substrate 101 of the pixel array substrate 100 is provided with a plurality of data lines DL, a plurality of scanning lines SL and a plurality of pixels PX. The data lines DL are arranged along the direction D1 and extend in the direction D2. These scan lines SL are arranged along the direction D2 and extend in the direction D1. The direction D1 intersects (eg, may be perpendicular to) the direction D2. That is, the data lines DL intersect the scan lines SL.

These pixels PX can be arranged into R1 pixel rows PXC (such as pixel row PXC(1)~pixel row PXC(R1)) and R2 pixel columns PXR (such as pixel row PXR(1)~pixel row PXR) in different directions. Su column PXR (R2)). More specifically, R1 pixel rows PXC are arranged along the direction D1, and R2 pixel columns PXR are arranged along the direction D2. The R1 pixel rows PXC are respectively electrically connected to the aforementioned plurality of data lines DL. The R2 pixel columns PXR are respectively electrically connected to the aforementioned plurality of scan lines SL. That is, the display panel 10 of this embodiment has a pixel resolution of R1×R2, where R1 and R2 are the pixel resolutions of the display panel 10 in the horizontal direction and the vertical direction, respectively.

In this embodiment, the aforementioned M flexible circuit boards may include A first flexible circuit boards COF1 (for example, the first flexible circuit board COF1(1)~the first flexible circuit board COF1( A)) and B second flexible circuit boards COF2 (for example, COF2(1)~COF2(B)). In particular, the quantity B of the second circuit flexible board COF2 corresponding to each second display area can satisfy the following relational expression: B=(M-A)/N, wherein M is a non-integer multiple of N, and both M and N is a positive integer greater than 1, and both A and (M-A)/N are positive integers.

Specifically, the aforementioned plurality of data lines DL may include a plurality of first data lines DL1 disposed in the first display area DA1 and a plurality of second data lines DL2 disposed in each of the second display areas. The first data lines DL1 are electrically connected to the aforementioned A first flexible circuit boards COF1 , and the second data lines DL2 are electrically connected to the aforementioned B second flexible circuit boards COF2 . In this embodiment, the number of first data lines DL1 in the first display area DA1 is smaller than the number of second data lines DL2 in each second display area. That is to say, the number of pixel rows PXC arranged in the first display area DA1 is smaller than the number of pixel rows PXC arranged in each second display area, for example: the number of pixel rows PXC in each second display area is i, Wherein i is a positive integer greater than 1 and less than R1/3.

For example, in this embodiment, pixel rows PXC(1)~PXC(i) are arranged in the second display area DA2-1, and pixel rows PXC(i+1) are arranged in the second display area DA2-2. ~PXC(2i), the third display area DA2-3 is provided with pixel rows PXC(2i+1)~PXC(3i), and the first display area DA1 is provided with pixel rows PXC(3i+1)~PXC( R1), but not limited thereto.

In particular, the aforementioned plurality of scanning lines SL are electrically connected to (M-A) second circuit flexible boards COF2 corresponding to the N second display areas, but are electrically independent (or electrically insulated) from the corresponding first display areas. A first circuit flexible board COF1 set in area DA1. In detail, in this embodiment, the pixel array substrate 100 may also be provided with a plurality of connection wires CW parallel to the data lines DL, and these connection wires CW are used to electrically connect the plurality of scan lines SL and ( M-A) A second circuit flexible board COF2. That is to say, the gate drive signal of this embodiment is transmitted vertically from the upper side (or sky side) of the display area DA into the second display area via the connecting wire CW, and then transmitted horizontally through the horizontally extending scanning line SL, but not This is the limit. in other embodiments. The gate driving signal can also enter the display area DA from the lower side (or ground side) of the display area DA.

For example, these connecting wires CW can be respectively arranged in the N second display areas and not in the first display area DA1 , but it is not limited thereto. In this embodiment, the number of connecting wires CW arranged in each second display area may be equal to the number of scanning lines SL, and these scanning lines SL may be respectively arranged in each of the N second display areas. The plurality of connecting wires CW in the display area are electrically connected with (M-A)/N second circuit flexible boards COF2 corresponding to the same second display area. That is to say, the same scanning line SL can receive the gate driving signal from the corresponding second circuit flexible board COF2 through the three connection wires CW respectively located in the three second display areas. That is to say, the display panel 10 is a gate multi-drive architecture (such as the three-drive architecture in this embodiment).

Please refer to FIG. 2 at the same time. Furthermore, the connecting wires CW and the scanning lines SL of the pixel array substrate 100 may be formed on different conductive film layers, and an insulating layer 110 may be provided between the two conductive film layers. For example, the connection wire CW and the data line DL can optionally be the same film layer and covered by a flat layer 120 , but not limited thereto. The connection wires CW are disposed on the insulating layer 110 covering the plurality of scan lines SL, and are electrically connected to the corresponding scan lines SL through the through holes TH of the insulating layer 110 . It should be understood that the pixel array substrate 100 may also be provided with a display medium layer (not shown) and corresponding driving electrodes (not shown), where the display medium layer is, for example, an organic light-emitting diode with self-luminous properties. The present invention is not limited to the bulk element layer, the micro light-emitting diode element layer, the submillimeter light-emitting diode element layer, or the liquid crystal layer with dimming capability.

Referring to FIG. 3 , the circuit flexible board may include a flexible substrate SB, a transmission line (such as a channel CH1 or a channel CH2 ) and a bonding pin LP disposed on the flexible substrate SB. For example, the circuit flexible board can also be provided with a driver chip (not shown), and the driver chip can be electrically connected to the transmission line by flip-chip bonding technology, and the circuit flexible board can be a Chip On Film package (Chip On Film, COF) structure. However, the present invention is not limited thereto. The driver chip can also be electrically connected to the transmission line by using Tape Automated Bonding (TAB) technology, and the circuit board can also be a Tape Carrier Package (TCP) structure. It should be noted that the present invention does not limit the flexible circuit board to include a driver chip. According to other embodiments, the flexible circuit board may also be a flexible circuit board without a driver chip.

In this embodiment, the number of channels CH1 of the first flexible circuit board COF1 set corresponding to the first display area DA1 may be different from the number of channels CH2 of the second flexible circuit board COF2 set corresponding to the second display area, but this does not mean that limit. For example, in order to provide the gate driving signal to the scan line SL through the connecting wire CW, the second circuit flexible board COF2 is additionally provided with a channel CH2 for transmitting the gate driving signal and a corresponding channel CH2 compared with the first circuit flexible board COF1. Corresponding bonding pin LP. Therefore, in this embodiment, the number of channels CH2 of the second flexible circuit board COF2 may be greater than the number of channels CH1 of the first flexible circuit board COF1 .

In order to bond the first flexible circuit board COF1 and the second flexible circuit board COF2 , a plurality of bonding pads BP are provided in the peripheral area PA of the pixel array substrate 100 close to the upper side (or upper side) of the substrate 101 . For example, a plurality of bonding pins LP (lead pins) of each circuit board can be bonded to the same number of bonding pads BP by using a thermal pressing process or other known and suitable bonding processes.

In particular, the number M of the circuit boards depends on the pixel resolution R1 of the display panel 10 in the horizontal direction and the number of channels of the selected circuit boards. In order to meet the structure of gate signal multi-driver (such as the three-driver in this embodiment), when the number M of circuit flexible boards is a non-integer multiple of the number N of the second display area, through the drive in the first display area DA1 The circuit design is different from the driving circuit design in the second display area, and the number of second display areas that can be divided into the display area DA is maximized as much as possible. In addition to reducing the diversity of the contact exposure mask used in the manufacturing process, The selection flexibility of the display panel 10 for the circuit board can also be increased.

On the other hand, in this embodiment, the first display area DA1 can be selectively disposed on one side of the second display areas, such as the left side of FIG. 1 , but not limited thereto. In another embodiment, as shown in FIG. 4, the first display area DA1 of the display panel 10A can also be set between any two adjacent ones of the N second display areas, for example, in the second display area DA2- 2 and the second display area DA2-3, but not limited thereto.

Some other embodiments will be listed below to describe the present disclosure in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted.

FIG. 5 is a schematic front view of a display panel according to a third embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of a part of the display panel in FIG. 5 . FIG. 7 is a partially enlarged schematic view of the display panel of FIG. 5 . Referring to FIG. 5 , the difference between the display panel 10B of this embodiment and the display panel 10 of FIG. 1 is that: the pixel array substrate 100A of the display panel 10B further includes a plurality of connecting wires CW″ disposed in the first display area DA1 . Similar to the arrangement of the connecting wires CW in the second display area, the connecting wires CW″ are also arranged parallel to the data line DL1, and are electrically connected to the first circuit flexible board COF1″ corresponding to the first display area DA1.

It should be noted that the connecting wire CW" in the first display area DA1 is not electrically connected to any scanning line SL, as shown in Fig. 6. That is to say, the first circuit flexible board corresponding to the first display area DA1 COF1 ″ is electrically independent from any scan line SL of the display panel 10B. The gate driving signal of the display panel 10B is still transmitted to the scan line SL through the connecting wire CW disposed in the second display area.

Please refer to FIG. 7, since the first display area DA1 is provided with the connection wire CW" not electrically connected to the scan line SL, the design of the multiple bonding pads BP provided in the peripheral area PA and corresponding to the first display area DA1 can be the same. A plurality of bonding pads BP arranged corresponding to the second display area. Therefore, the circuit design of the first flexible circuit board COF1 "and the second flexible circuit board COF2 can be optionally the same, for example: the channel of the first flexible circuit board COF1 " The number of CH1 can be the same as the number of channels CH2 of the second circuit flexible board COF2. Accordingly, the complexity of the manufacturing process and the diversity of the circuit flexible board can be further reduced.

FIG. 8 is a schematic front view of a display panel according to a fourth embodiment of the present invention. Please refer to FIG. 8 , the difference between the display panel 20 of this embodiment and the display panel 10 of FIG. 1 lies in that the structure of gate driving is different. Specifically, the pixel array substrate 100B of the display panel 20 may further include N (for example, three) gate drive circuits GC disposed in the peripheral area PA, and these gate drive circuits GC correspond to the N second display areas respectively. set up. Each gate driving circuit GC is electrically connected to a plurality of scan lines SL via a plurality of connection wires CW disposed in the corresponding second display area.

In other words, the second flexible circuit board COF2" of this embodiment may not be provided with a channel for transmitting gate drive signals as shown in Figure 3. Therefore, the first flexible circuit board COF1 and the second flexible circuit board COF2 of this embodiment "The same design specification can be used.

However, the present invention is not limited thereto. In another not-shown embodiment, the display panel can also adopt a design principle similar to that in FIG. The connection wire electrically connected to the dummy gate driving circuit but not electrically connected to any scanning line.

To sum up, in the display panel according to an embodiment of the present invention, its display area can be divided into a first display area and a plurality of second display areas. These second display areas all have the same driving circuit design, and the driving circuit designs in the first display area and the second display area are different. Accordingly, in addition to meeting the circuit design requirements of large-size or arbitrary pixel resolution display panels based on manufacturing cost considerations, it can also increase the selection flexibility of the display panel for circuit flexible boards.

10, 10A, 10B, 20: display panel 100, 100A, 100B: pixel array substrate 101: Substrate 110: insulating layer 120: flat layer BP: Bonding Pad CH1, CH2: channel COF1, COF1(1), COF1(A), COF1”, COF1”(1), COF1”(A): the first circuit soft board COF2, COF2(1), COF2(B), COF2”(1), COF2”(B): the second circuit soft board CW, CW”: connecting wire DA: display area DA1: the first display area DA2-1, DA2-2, DA2-3: Second display area D1, D2: direction DL, DL1, DL2: data line LP: Bonding pin PA: Peripheral Area PX: pixel PXC, PXC(1), PXC(i), PXC(i+1), PXC(2i), PXC(2i+1), PXC(3i), PXC(3i+1), PXC(R1), PXC( R1-i), PXC(R1-i+1): pixel row PXR, PXR(1), PXR(2), PXR(3), PXR(R2): pixel columns SB: flexible substrate SL: scan line TH: through hole

FIG. 1 is a schematic front view of a display panel according to a first embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a part of the display panel in FIG. 1 . FIG. 3 is a partially enlarged schematic view of the display panel of FIG. 1 . FIG. 4 is a schematic front view of a display panel according to a second embodiment of the present invention. FIG. 5 is a schematic front view of a display panel according to a third embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of a part of the display panel in FIG. 5 . FIG. 7 is a partially enlarged schematic view of the display panel of FIG. 5 . FIG. 8 is a schematic front view of a display panel according to a fourth embodiment of the present invention.

10: Display panel

100:Pixel array substrate

101: Substrate

COF1, COF1(1), COF1(A): the first circuit soft board

COF2, COF2(1), COF2(B): Second circuit soft board

CW: connecting wire

DA: display area

DA1: the first display area

DA2-1, DA2-2, DA2-3: Second display area

D1, D2: direction

DL, DL1, DL2: data line

PA: Peripheral Area

PX: pixel

PXC, PXC(1), PXC(i), PXC(i+1), PXC(2i), PXC(2i+1), PXC(3i), PXC(3i+1), PXC(R1): pixel row

PXR, PXR(1), PXR(2), PXR(3), PXR(R2): pixel columns

SL: scan line

TH: through hole

Claims (10)

A display panel has a pixel resolution of R1×R2, and includes: A pixel array substrate has a first display area and N second display areas, and includes: A plurality of pixels, arranged in the first display area and the N second display areas, and arranged in R1 pixel rows and R2 pixel columns, the R1 pixel rows are arranged along a first direction, the R2 pixel columns are arranged along a second direction, and the first direction intersects with the second direction; A plurality of data lines, arranged in the first display area and the N second display areas along the first direction, and extending in the second direction, the data lines are respectively electrically connected to the R1 pixel rows ;as well as A plurality of scanning lines arranged in the first display area and the N second display areas along the second direction and extending in the first direction, the scanning lines are respectively electrically connected to the R2 pixels columns; and M circuit flexible boards are electrically bonded to the pixel array substrate, and include A first circuit flexible boards corresponding to the first display area and (M-A)/N corresponding to each of the N second display areas A second circuit soft board, M is a non-integer multiple of N, M and N are positive integers greater than 1, A and (M-A)/N are positive integers, wherein the data lines are electrically connected to the A first circuit The flexible boards and (M-A) second circuit flexible boards corresponding to the N second display areas, the scanning lines are electrically independent from the A first circuit flexible boards. The display panel as claimed in claim 1, wherein the scan lines are electrically connected to the (M-A) second circuit flexible boards. The display panel according to claim 1, wherein the first display area and the N second display areas are arranged along the first direction, and the first display area is located on one side of the N second display areas. The display panel according to claim 1, wherein the first display area and the N second display areas are arranged along the first direction, and the first display area is located in any two phases of the N second display areas between neighbors. The display panel as described in claim item 1, further comprising: A plurality of connecting wires are arranged parallel to the data lines, wherein the scanning lines are respectively electrically connected to the (M-A) second circuit flexible boards through at least part of the connecting wires. The display panel according to claim 5, wherein the connecting wires include a plurality of first connecting wires arranged in the first display area and a plurality of second connecting wires arranged in the N second display areas, The first connecting wires are electrically connected to the A first circuit flexible boards, and are electrically independent from the scanning lines, and the scanning lines are respectively connected to the (M-A) second circuit flexible boards via the second connecting wires. The board is electrically connected. The display panel as described in claim 5, wherein the connecting wires are arranged in the N second display areas, and the scanning lines respectively pass through some of the connecting wires arranged in each of the N second display areas. The connecting wire is electrically connected with the (M-A)/N second circuit soft boards corresponding to each of the N second display areas. The display panel as claimed in item 1, wherein the data lines include a plurality of first data lines arranged in the first display area and a plurality of second data lines arranged in each of the N second display areas , the first data lines are electrically connected to the A first circuit flexible boards, and the second data lines are electrically connected to the (M-A)/N second circuit flexible boards, and the number of the first data lines is less than The quantity of the second data lines. The display panel as described in claim item 1, further comprising: N gate driving circuits are arranged on the pixel array substrate, wherein each of the N second display areas is provided with a plurality of connecting wires parallel to the data lines, and each of the N gate driving circuits passes through a The connecting wires in the second display area are electrically connected to the scanning lines. The display panel according to claim 1, wherein the number of channels of each of the A first flexible circuit boards is different from the number of channels of each of the (M-A)/N second flexible circuit boards.

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