JPS58196697A - Voltage holding device - Google Patents

Voltage holding device

Info

Publication number
JPS58196697A
JPS58196697A JP57079330A JP7933082A JPS58196697A JP S58196697 A JPS58196697 A JP S58196697A JP 57079330 A JP57079330 A JP 57079330A JP 7933082 A JP7933082 A JP 7933082A JP S58196697 A JPS58196697 A JP S58196697A
Authority
JP
Japan
Prior art keywords
capacitor
voltage
terminal
potential
amplifying means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57079330A
Other languages
Japanese (ja)
Inventor
Eiji Minami
南 「てる」二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57079330A priority Critical patent/JPS58196697A/en
Publication of JPS58196697A publication Critical patent/JPS58196697A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02Sample-and-hold arrangements
    • G11C27/024Sample-and-hold arrangements using a capacitive memory element
    • G11C27/026Sample-and-hold arrangements using a capacitive memory element associated with an amplifier

Landscapes

  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To hold the voltage stably and for a long period of time, by detecting the potential of a capacitor and then feeding it back to a terminal at the other side of the capacitor after inversion and amplification. CONSTITUTION:The DV voltage V1 is applied to a terminal at one side of a capacitor 3, and then the potential of said terminal receives the voltage or current amplification through an amplifying means 4 and is amplified inversely by an amplifying means 7. Thus the potential -V1 is applied to a terminal at the other side of the capacitor 3. Therefore the capacitor 3 is charged up to potentials V1 and -V1.

Description

【発明の詳細な説明】 本発明は電圧保持装置に関するもので、その目的とする
ところは簡単な構成で長時間にわたって安定に電圧をホ
ールドできる装置を提供することにある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage holding device, and an object thereof is to provide a device that has a simple configuration and can stably hold a voltage for a long period of time.

電圧保持装置とは信号あるいは情報に対応した電圧を保
持する働きを有し、計測器や音響装置ならびに制御装置
に多く用いられている。そして、保持している電圧レベ
ルで上記装置を制御したり表示用電源などに利用されて
いる。
A voltage holding device has the function of holding a voltage corresponding to a signal or information, and is often used in measuring instruments, audio equipment, and control devices. The maintained voltage level is used to control the above-mentioned devices or as a display power source.

従来の電圧保持装置の一例を第1図に示す。この装置の
欠点は長時間にわたって電圧を保持できないことである
。その理由を説明する前に装置の構成・動作を簡単に述
べる。直流信号または交流信号を発生する軸信号源1の
出力はダイオード2を介してコンデ/す3に直流電圧と
して供給され、コンデンサ3はその電圧を保持する。電
界効果型半導体素子もしくは        −芒ヤ鞍
電界効果型半導体を内蔵した集積回路よりなる第1の増
幅手段4は高い入力インピーダンスを有し、前記コンデ
ンサ3の電圧を電圧または電流増幅して出力端子5へ出
力する。
An example of a conventional voltage holding device is shown in FIG. The disadvantage of this device is that it cannot hold voltage for long periods of time. Before explaining the reason, the configuration and operation of the device will be briefly described. The output of an axial signal source 1 that generates a DC signal or an AC signal is supplied as a DC voltage to a capacitor 3 via a diode 2, and the capacitor 3 holds the voltage. The first amplification means 4, which is made of a field effect semiconductor element or an integrated circuit incorporating a field effect semiconductor, has a high input impedance, and amplifies the voltage or current of the capacitor 3 and outputs it to the output terminal 5. Output to.

そして他の装置(図示せず)を制御したり他の装置でそ
のレベルを表示したりする。定電流回路6は第1の増幅
手段4を電界効果型半導体素子で構成した場合にそれに
流す電流番設定するものであるが、第1の増幅手段4を
電界効果型半導体を内蔵した集積回路で構成した場合に
は無くてもよい。
It then controls another device (not shown) or displays its level on another device. The constant current circuit 6 is used to set the number of current to be passed through the first amplifying means 4 when it is constituted by a field-effect semiconductor element. If configured, it may be omitted.

この従来の装置では、ダイオード2の逆方向のもれ電流
、コツプ/す3の自己放電ならびに第1の増幅手段4の
もれ電流が存在し、それぞれの値がわずかであっても長
時間経過すると(例えば30分から1時間位)、コンデ
ンサ3の電圧レベルが低下し、それにともなって出力端
子6の電位もドリフトラ生ずる。そして、周囲温度が変
化すると前記もれ電流はその影響を受け、出力端子6の
ドリフトはさらに大きくなるという欠点があった。
In this conventional device, there is a leakage current in the reverse direction of the diode 2, a self-discharge of the tip/strap 3, and a leakage current of the first amplification means 4, and even if each value is small, a long period of time has elapsed. Then (for example, after about 30 minutes to one hour), the voltage level of the capacitor 3 decreases, and the potential of the output terminal 6 also drifts. When the ambient temperature changes, the leakage current is affected by the change, and the drift of the output terminal 6 becomes even larger.

本発明は上記従来の欠点を改善したものであり、その−
実施例全第2図に示す。第1図に示した従来例と重複す
る構成要素の説明は省略し、異なる点について述べる。
The present invention improves the above-mentioned conventional drawbacks, and -
The entire example is shown in FIG. Explanation of the components that overlap with those of the conventional example shown in FIG. 1 will be omitted, and only the differences will be described.

第2の増幅手段7は抵抗701および702、演算増幅
器703からなり、抵抗701と抵抗702との比によ
って利得を設定する。端子704は基準電圧を供給する
端子である。
The second amplifying means 7 includes resistors 701 and 702 and an operational amplifier 703, and the gain is set by the ratio of the resistors 701 and 702. Terminal 704 is a terminal that supplies a reference voltage.

そして、演算増幅器703の出力はコンデンサ3の他方
の端子または電極に接続する。
The output of the operational amplifier 703 is then connected to the other terminal or electrode of the capacitor 3.

第1の増幅手段4の出力は第2の増幅手段7でその極性
が反転されてコンデンサ3の他方の端子に供給されるの
で、ダイオード2、コンデンサ3ならびに第1の増幅手
段4にもれ電流が存在しても第2の増幅手段7が出力端
子5のドリフトラ補正するので長時間のピークホールド
動作が得られる。その理解を容易にするために第3図に
電圧変化の様子を示す。
The output of the first amplifying means 4 is reversed in polarity by the second amplifying means 7 and is supplied to the other terminal of the capacitor 3, so that a leakage current flows through the diode 2, the capacitor 3, and the first amplifying means 4. Even if , the second amplifying means 7 corrects the drift error of the output terminal 5, so that a long-time peak hold operation can be obtained. To facilitate understanding, FIG. 3 shows how the voltage changes.

い1、コンデンサ3に第3図(A)に示すような直流電
圧V、を一方の端子(例えば陽極)に印加すると、コン
デンサ3の一方の端子の電位は第3図(B)のようにな
りその電位は第1の増幅手段4で電圧もしくは電流増幅
され、第2の増幅手段7でさらに反転増幅されてコンデ
ンサ3の他方の端子(例えば陰極)に供給される。すな
わち第3図(C)のような−v1の電位がコンデンサ3
の他方の端子に供給される。その結果コンデンサ   
13は■、と−v1の電位に充電されていることになる
。なお、コンデンサ3の充電は瞬時に行なわれる。この
状態で時刻 t、にて信号源1の電圧を減少するか零に
すると、ダイオード2、コンデンサ3および第1の増幅
手段4のもれ電流によってコンデンサ3の一方の電位が
第3図(B)のように減少しようとする。ところが第2
の増幅手段7が出力端子6の出力を反転増幅しコンデン
サ3の他力の端子へ供給するため、その電位は第3図(
C)のようにマイナス電位が零に向って上昇する。そし
てその値はコンデンサ3の一方の端子の電位変化の対象
になる。その結果、総合としてのコンデンサ3の一力の
端子の電位は第3図(D)に示すように長時間にわたっ
てvlの値に保たれ、出力端子6の電圧も変化しなくな
る。また、第2の増幅手段7でコンデンサ3の他方の端
子へ帰還をかけていることから周囲温度の影響も受けず
長時間にわたって安定に電圧を保持(ホールド)するこ
とが可能となる。
1. When a DC voltage V as shown in Fig. 3 (A) is applied to one terminal (for example, the anode) of the capacitor 3, the potential of one terminal of the capacitor 3 becomes as shown in Fig. 3 (B). The potential is voltage or current amplified by the first amplifying means 4, further inverted and amplified by the second amplifying means 7, and then supplied to the other terminal (for example, the cathode) of the capacitor 3. In other words, the potential of -v1 as shown in Fig. 3(C) is the capacitor 3.
is supplied to the other terminal of The resulting capacitor
13 is charged to a potential of -v1. Note that charging of the capacitor 3 is instantaneous. In this state, when the voltage of the signal source 1 is decreased or made zero at time t, the potential of one side of the capacitor 3 decreases due to the leakage current of the diode 2, the capacitor 3, and the first amplifying means 4 as shown in FIG. ). However, the second
Since the amplifying means 7 inverts and amplifies the output of the output terminal 6 and supplies it to the other terminal of the capacitor 3, its potential is as shown in FIG.
As shown in C), the negative potential increases toward zero. This value is subject to potential changes at one terminal of the capacitor 3. As a result, the potential of the single terminal of the capacitor 3 as a whole is maintained at the value vl for a long time as shown in FIG. 3(D), and the voltage of the output terminal 6 also does not change. Further, since the second amplifying means 7 applies feedback to the other terminal of the capacitor 3, it is possible to stably hold the voltage for a long time without being affected by the ambient temperature.

なお、第2図の装置は本発明の一実施例であり、信号源
1の出力が直流の場合には夕゛イオード2を電子スイッ
チ(図示せず)に置き換えてもよい。
The device shown in FIG. 2 is an embodiment of the present invention, and when the output of the signal source 1 is DC, the diode 2 may be replaced with an electronic switch (not shown).

また、第2の増幅手段7は抵抗701ならびに702の
一部に応答特性を設定するインピーグンス素子を用いて
コンデンサ3の充電時間あるいは充電応答を変えること
ができる。
Further, the second amplifying means 7 can change the charging time or charging response of the capacitor 3 by using impedance elements that set response characteristics in part of the resistors 701 and 702.

さらに、演算増幅器703の出力を直接的にコンデンサ
3の他方の端子に接続しているが、インビーダンス素子
や他の回路(いずれも図示せず)を介して間接的に接続
してもよい。
Further, although the output of the operational amplifier 703 is directly connected to the other terminal of the capacitor 3, it may be connected indirectly via an impedance element or other circuit (none of which is shown). .

以上説明したように本発明の装置によれば、コンデンサ
の電位を第1の増幅手段で検出し、第2の増幅手段で反
転増幅して上記コンデンサの他方の端子へ帰還をかける
ようにしたことがら、コンデンサや第1の増幅手段にも
れ電流が存在しても安定に電圧を長時間保持でき、また
周囲温度の影響も受けないというすぐれた効果を有する
As explained above, according to the device of the present invention, the potential of the capacitor is detected by the first amplifying means, inverted amplified by the second amplifying means, and fed back to the other terminal of the capacitor. However, even if there is a leakage current in the capacitor or the first amplifying means, the voltage can be stably maintained for a long time, and it has excellent effects in that it is not affected by the ambient temperature.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例を示す回路図、第2図は本発明の一実施
例を示す回路図、第3図は同動作説明図である。 1・・・・・・信号源、3・・・・・・コンデンサ、4
・・・・・・第1の増幅手段、7・・・・・−第2の増
幅手段。
FIG. 1 is a circuit diagram showing a conventional example, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is an explanatory diagram of the same operation. 1... Signal source, 3... Capacitor, 4
.....first amplification means, 7.....-second amplification means.

Claims (1)

【特許請求の範囲】[Claims] 直流電圧を保持するためのコンデンサと、このコンデン
サの電圧を検出するために電界効果型半導体素子もしく
は電界効果型半導体を内蔵した集積回路より構成された
第1の増幅手段と、前記第1の増幅手段の出力を反転増
幅して前記コンデンサの他方の端子へ直接あるいは間接
的に帰還をかける第2の増幅手段を有することを特徴と
する電圧保持装置。
a first amplification means comprising a capacitor for holding a DC voltage, a field effect semiconductor element or an integrated circuit incorporating a field effect semiconductor for detecting the voltage of the capacitor; and the first amplification means. A voltage holding device comprising second amplifying means for inverting and amplifying the output of the means and feeding it back directly or indirectly to the other terminal of the capacitor.
JP57079330A 1982-05-11 1982-05-11 Voltage holding device Pending JPS58196697A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57079330A JPS58196697A (en) 1982-05-11 1982-05-11 Voltage holding device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57079330A JPS58196697A (en) 1982-05-11 1982-05-11 Voltage holding device

Publications (1)

Publication Number Publication Date
JPS58196697A true JPS58196697A (en) 1983-11-16

Family

ID=13686870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57079330A Pending JPS58196697A (en) 1982-05-11 1982-05-11 Voltage holding device

Country Status (1)

Country Link
JP (1) JPS58196697A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4925346U (en) * 1972-06-02 1974-03-04
JPS52104670A (en) * 1976-02-27 1977-09-02 Hokushin Electric Works Output operation apparatus for analogue hold circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4925346U (en) * 1972-06-02 1974-03-04
JPS52104670A (en) * 1976-02-27 1977-09-02 Hokushin Electric Works Output operation apparatus for analogue hold circuit

Similar Documents

Publication Publication Date Title
US6384684B1 (en) Amplifier
JPH0420238B2 (en)
JPS6144360B2 (en)
US4396890A (en) Variable gain amplifier
US4081696A (en) Current squaring circuit
JPS6313509A (en) Current mirror circuit
JPS58196697A (en) Voltage holding device
US3602832A (en) Low zero-offset transducer apparatus
JPH09145750A (en) Constant-current circuit for digital multimeter
US3295060A (en) Peak-to-peak a. c. signal measuring system using two complementary transistors having capacitor output means and a common input to derive proportional positive and negative peak voltages
JP2998805B2 (en) Integrator circuit
JP4132157B2 (en) Amplifier circuit including input current compensator
JPS6313203B2 (en)
JP2000155139A (en) Current detecting device
JP4705724B2 (en) Auto zero correction circuit
SU1168971A1 (en) Multiplying device
JPS5942902B2 (en) square circuit
SU1226344A1 (en) Adjustable electron load
JPH043125B2 (en)
SU134290A1 (en) Self-stabilizing video amplifier voltage and power
SU313281A1 (en)
SU1734027A1 (en) Device for voltage measuring
SU1007035A1 (en) Balanced measuring dc bridge
JP2514235Y2 (en) Amplifier circuit
JPS6234283B2 (en)