JPS5819179B2 - Data transmission method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a data transmission system using a shortened cyclic code.

Generally, error detection (correction) codes are used to transmit important data that cannot be affected by errors.

A well-known error detection code is a cyclic code.

A shortened cyclic code is a cyclic code in which some of the information bits are omitted.By the way, when using the above cyclic code or shortened cyclic code, if word synchronization is lost, error detection will be difficult. There is a high probability that it will slip through.

In particular, there is a high probability that a small number of bits of deviation, which often occur, will be missed.

If it is easy to slip through, incorrect data will be accepted as correct, which is undesirable.

The present invention has been made in view of these problems, and an object of the present invention is to provide a data transmission system using a shortened cyclic code that can reduce the probability of slippage due to synchronization deviation of fractional bits to zero. do.

The present invention involves inserting one bit of 1'' or a multiple-bit code with °'1'' at both ends as a spacer between each word of a shortened cyclic code created from information data and transmitting the code. The main content.

First, we will explain the probability of slippage in the conventional case using a shortened cyclic code, and then, for comparison with this case, we will discuss an example of the present invention in which p between words is used as a spacer.
We will discuss the probability of slippage when this 1-bit N 1 +1 is inserted.

(1,1 In the conventional case, the probability-reduced cyclic code is a cyclic code with code length n + number of information bits + number of check bits n - k, and k of information.

After setting the bit to 0′” and calculating the check bit,
ko bits are dropped and the number of information bits is set to 1 code length n.

A cyclic code with a code length of n1 information bits is established on an operation modulo Xn+1, but a shortened cyclic code is not.

Regarding these properties of shortened cyclic codes, etc., see, for example, "Basic Computer Course: Code Theory" by Miyayo et al.
It is detailed on pages 198 to 200 of Shokodo Publishing, 1980.

For example, if the primitive polynomial of degree (n-k) is G(X), then X''=G(X)・Q(X)+R(X)...
・・・・・・・・・・・・(1), the order i of R(X) is n −k−1≧i≧1, and RCX)=X′+b
j-1X ''-1+-+bo-(2) In this case, this shortened cyclic code is based on an operation modulo Xn+R(3).

As shown in Figure 1A, the n-bit code (a −1゜a −2
, . . . , a, , ao) are code words (codes without errors).

At this time, this sign)I(X)='a -t Xn-1+a'L2X''-
2+------+ a ] X + a o ・・
It is expressed as (3).

(1) When the word synchronization shifts to the right by l bits: 1 Now, let's consider the case where the word synchronization shifts by l bits to the right, as shown in Figure 1.

The code at this time is a.

is followed by adjacent words a' to a', so
The new word caused by the above shift is S1(XJ=”n-1-lX').

+... aoXl-+-a', 7. Xl-1+
Song-+a'r1-1. ．． ．． ．． <4) On the other hand, Xn-='R
(X), so XIH (X) = aXn 1+7+ 8xn-2+1
'l −−11 +・・・・・・+a1X1+e+aoXe=an −1
-lXn'-+-"-1-aX'+(an-1Xl
-1-4-=+an-l')(X'+, b, -1X1-
1+b)...(5)t.

Since H(X) is a codeword, it is divisible by G(X).

Therefore, 'X1)((3) is also divisible by G(X) and is a code word.

Therefore, the difference Di(X) between the above X1H(X) and 51(X)
is divided by G(X).

If it breaks, 51(X) also becomes a codeword, and in this case, 51(
X) will pass through error detection.

That is, to find the probability that 5l(x) passes through error detection, DI(X)=X n(x)=S1(X)==(a,
, Xl-t'-r +...'+an,)(
1)+a'IX"+a'1X'-2n
n- +・・・+a/ ・・・・・・・・・・・・・・・
(6) It is sufficient to find the case where −13 is divisible by G(X).

By the way, the order of DI(X) is 13 + i + 1
Then, the order of G(X) is nk.

Therefore, if the order of Dl(X) is smaller than the order of e(x), that is, e+i+1<one in n-'p l < n
− to −i + 1, and the order of Dl(to) is G(X
), that is, 13 > n −k −
Divided into the case of i + 1.

(A), iJ < n −k −i +1 (7,) In this case, since the degree of (X) is lower than the degree of G(X), since Dl is divisible by G(X), is Dl(X)20 ・・・・・・・・・・・・・・・・・・
... Must be (7).

Here, if i≦nk −i + 1 (i.e. i
(if n− is +172), and i > n −k −1
-1-].

(2) Case of i<n-k-i+1 In this case, there are cases where the number l of outlier bits is smaller than the order of R(X), that is, there are cases where bii and cases where d>i.

■, 11 < i (jD, Dl(X) (7) (l+ i -4-1
,) The number of coefficients in the following equation is (l+i), so in order to satisfy the condition of equation (7) above, (6)
21 bits of information an from the expression.

It is sufficient if a' to a' are all to a n -4t n' and n1 is zero.

The probability of occurrence of each information bit CT'11011 is 0.5
So, if there is no correlation between each bit or between adjacent words, then an −1=” n −2”””−an −1!・−
a/n, , = a/, .

The probability of occurrence, that is, the probability of slipping through is probability Pe 21 becomes Pe22.

■ In the case of l>i In this case, the condition for setting the coefficient of the 4th order or higher term in equation (6) D1(x) to O is a ns ” a n2−”””a °=0,
This probability is 2.

Also, the condition for setting the coefficients of terms below order cl-=1) to 0 is a-=f ・ (a 3 J n I 1. n 1-21"
n”l) ・・・・・・・・・・・・・・・(8)(
However, n-1≧j≧nLA).

Equation (8) expresses that a' is a function of an-1-1 to an-l, and a' that satisfies equation (8) depending on the values of an-j-1 to ao,,'l.・is determined.

The probability that all a'j satisfy equation (8) is 2-4.

Therefore, in the case of 12>i, the probability Pe of a pass that satisfies equation (7) is Pe=2−(l+i).

■ If i > n −k −i +1 In this case, #
<n k i+1(i, so in order for equation (7) to hold true in equation (6), an -1=an-2=...
...an 1=al -...a/ "an-ln-1n-1 must be ○.

Therefore, slipping 21 The deviation probability P e = 2.

(B) When l≧n −k −i + 1 In this case, l −)−i−1≧n −k, and the order of Dl(X) is greater than or equal to the order of G(X).

■ When i≦n-k −i + 1 In this case, l≧n −k −i +1 ') nk+1
Since (nk+1)/2=(+1 to n-)/2, it becomes 2l)n-k.

In this case, the equation with a remainder of two when dividing D1CX) by G(X) is (
n-to-'1) becomes the following.

All (n-k) coefficients of this remainder equation are The condition for passing through is that it becomes 0.

All (n-k) equations are expressed by linear equations an-1 to an-x"n-1 to a, (3), and among these 21 functions, you can freely choose 213-n\, and the other n- are constrained by the value of 21-n+.

Therefore, the probability that the remainder becomes 0 is constrained by n −
The probability of k, : functions taking that value is Pe-2-(nk).

■ In the case of i>n-k -1-1-1 In this case, there are cases where 2l<n-k.

In this case, it is sufficient to find the probability that the remainder when Dl(x) is divided by Goo is 0.

The remainder is of order (n-+1), and the (n-k) coefficients are an n- to an-1. It becomes a linear equation of a'n- ~a', and the number of 21 variables is smaller than the number of equations in which (n-k) = i - 11 coefficients are all set to O, so the solution is one set. Below, the solution is an-1-an-2=””””°-an -l-a'
-1-=-= a', z = 0 The probability that this occurs, that is, the slip-through, becomes probability Pe=2-21.

In this case, -i+1(n-k)/2(n-k-(+1 to n-)/2+
1-(n-k)/2 = 1/2, so n k-i-1-1<(n-k)/2+1/2, and considering that nk-i+1 is an integer, the range of l is The area smaller than (n-k)/2 is the same as or wider than the area smaller than nk-i+1.

21) When n-, the probability of slipping through is Pe22 (nk), as in the case of (B) [Yes].

(2) When the word synchronization shifts to the left by β' bits By the way, above we have described the case where the word synchronization shifts by l bits to the right.
Next, if there is a β′ bit shift to the left (think about this).

The words created by this shift are 82 words as in equation (4): a'1l-1Xn-1+...+d6Xn-4
′+a'
HX: an-iX + aI + all-1 /l jin!X0 +...+a10X
0-l'+a g 1X +...+ aOX
'・・・・・・・・・(11) If we convert the negative order term in equation (11) into a positive order using X ” = R(X), we get D2(x)2Cn-1Xn -100n-1X0-2+・
・・・+C1X+Co・・・・・・・・・・・・(12) These coefficients are a”l/ 1 + a″Z 2 t
"..." raO,a l/21. a/, 2t
”・+aQ is expressed as a function.

Therefore, the remainder E(
(
......(13)', and this coefficient is also a"1l-1~a".

+al/1~a, is a function.

E(X)=O becomes the condition for slipping through, so en- is -1-2eo20...(14)l's (n-k
) simultaneous equations for 21' variables can be solved.

(A) When l'< (n - k ) / 2 In this case, the number of variables is smaller than the number of equations, so there is one solution or less, and the solution of l is (1
1) From the formula, a//eL1=a//eL, =...=a″0=
apl Otsu.

=al/, 2=・・・・・・== a o−= O is the condition, and the probability of slippage is Pe=2−2′ 0 (B) l′〉(n −k )/2 (7) Case
2 In this case, the number of variables is greater than the number of equations, so even if 213' - (n - k ) variables are freely changed, (n - k) other variables are determined by this. The number of variables subject to constraints is (nk).

Therefore, the probability of 2-slip is Pe=2-(n-k).

By the way, a l' bit shift to the left means n -11 bits to the right.
Since this is the same as a bit shift, l' can be replaced with n-l (I (after all, the above (1), (2)
In the case of , the slippage is probability.

To summarize, in the case of i x (+1 to n-)/2, when 11 <i; P e = 2 '''i<A'
When <n-k-i+1;8"pe = 2 (
i+ 1) When -i+i'J'≦(n+k)/2 for n-; Pe=
When 2-(n-k) (n+k)/2<A'<n; pe=2-2(n A) Yi > (+1 to n-)/2 and 13<
When (n-k)/2; Pe=2"(n-k)/
When 2≦A'(n+k)/2; Pe=2 (n k
) (n+k)/2<#<n;Pe=2''(n-l) In this way, if there is a shift of a small number of bits, for example, the period shifts by 1 bit to the right or left (z=1tn-1), , the probability Pe of slippage is 1/4 in both cases, which often poses a problem in terms of system configuration.

CI) In the case of one embodiment of the present invention (inserting 1 bit 1'' between words), the slippage is a probability.

In this case, the correct result will be as shown in Figure 2A.

(1) If the word synchronization shifts to the right by l bits as shown in Figure 2, the new word created in this case is T1(x)=an-1-lXn+...+aoXl×X
1-1+a'n-1Xl-2+1. .

+a'ni+1 ・・・・・・・・・・・・・・・・・・
...(15) Calculating the difference between the above equations (5) and (15), Vt (X)= X H(x) T 1G'Q=
(a IX' 1+...+a n-1) (x i+b t t X
'+...+bo)Xl-1+a'-1Xl-2
＋・・・・・・a′ni+1 ・・・・・・・・・・・・
(16) Therefore, in order for T1(3) to pass through error detection, the condition is that Vl(X) is divisible by G(X).

As in the case of the mark above, it is divided into cases of 11 < n -k -i+1 and cases of 11 > n -k -i + 1.

(A) When Il<n- and -i+1 In this case, the order of Vl(x) is lower than the order of G(X), so in order for Vl(X) to be divisible by G(X), Vl (X) must be O.

Here, we further consider the case of i n−k −i + 1 and i)
It is divided into the case of n −k −1-1-1.

■ When i < n −k −i + 1 In this case, the number of shifted bits l is smaller than the order of R(X) (l≦
There are two cases: i) and large (d>i) cases.

■ In the case of l≦i, in this case, Vl(x)ノ(l+i+1) The condition for making the coefficients from the next to the first order O is a = a −−−−−−−an,! = Ofi
-I n-2- However, as is clear from equation (16), the (l-)th coefficient of vl(X) is 1, and V
1ρ0\0.

Therefore, the probability Pe of slippage becomes P e = O.

■ When A > i In this case, the condition for setting the coefficient of the fourth or higher order term of ■1(X) in equation (16) to 0 is ・20a, = a−2−−°°”−a , n.

, and this probability is 21.

Also, the coefficients of terms below order (A-1) are set to 0. The conditions are It is.

In equation (18), the probability of satisfying an-i71+1-0 is 2-1.

Also, the other equations in equation (18) are (1-1) simultaneous equations, and no matter what value ζ the values of an-i-2 to an-4 are, it (therefore, these equations are satisfied) Since there exist values of a'-1 to a'1 "n-11+, +.", this probability becomes 2.

Therefore, the slippage when l>i is The probability is the probability of these simultaneous occurrences. Pe:2-(1+l).

■ In the case of i) n-k -i +1 In this case, i) n-k -i±LM becomes (16
), in order for equation (17) to hold true, the coefficient of each order of X must be O. -1.

However, since the coefficient of X is 1 and cannot be set to O, the probability of slippage becomes P e = 0.

(B) When 7≦n −k−7+1 In this case, A+i−1≧n −k, and ′V1(X)
The order of is greater than or equal to the order of G(Xi).

■ When i≦n −k −i +1 In this case, ■ The expression of the remainder when dividing 1(X) by G(X) is O
It is a condition for slipping through.

The remainder formula is (n-=1) order, and the (n-k) coefficients are a.

It is a function of (21-1) variables from -1 to 'a' to a' an-7n-I n-7+1.

Since 21-1≧n-, the above CI)(1)03)■
For the same reason as in the case of , the probability of slipping through is Pe-1.

−(n 7k ) ■ i ) n −k −i +1 in case of +1 In this case, there is also a case of 2l−1(n−k(lkua)), in which case the number of variables is greater than the number of equations. If there is less than one set of solutions, l -.

The condition for a solution is that X is divisible by G(X), which is impossible, so when Pe=O0 21-1≧n-, (B) Similarly to (a), Pe-=
2 ”-k) (2) When the word synchronization shifts to the left by l' bits, the word caused by this shift is T2sen2a//lOtsu2X +...+aoX0
~l 1i -1 +Xn-1'+a Xn"1+"・+altn-1
...(19) The difference V2(X) between the above equations (10) and (19) is ■2 flashes =
a'mei2X0+...+a"oxn g'+tn-4' +X+all-1X-+... +aoX'...
20) The condition for slippage is that this equation (20) is divisible by G(X)'t.

If we express the remainder when 2(x) in equation (20) is divided by G(X) as in equation (13), then the coefficients en- and -eo are a multiplier L2-a.

, all-1 to ao (21'-1) variables.

Therefore en k , :0. --------, e
=0, satisfying the second condition of (n-k) of e□20 is the condition for slipping through o 21'1<n k
If (l'n- +1 <, ), the number of equations is greater than the number of variables, and the solution is one or less.

A condition for the solution n 4/ is that X is divisible by G(X), but this is impossible.

Therefore, Pe=O021'-1≧n-k(l'<:-m=
For the same reason as 0(2)(B), Pe=2 ''-k) By the way, since the word synchronization interval is n + 1, the above 11' = n -1-1 = 1.

Therefore, when one bit of 1'' is inserted between words, and the word synchronization is shifted by l bits to the right and l' bits to the left, the probability of slippage is as follows.

If i < (+1 to n-) /2 and IJ <
When i: Pe=0 1 <l<n k i +1;,.

-2(++1)n- to -i+1 times 7(n+ to -1)/
2+1.

When: Pe=2-(n') (-1 to n+)/2+1<J? When <n+1;Pe20i>(+1 to n-)/2, and 11< (n
- when +1)/2; Pe=0 (+1 to n-)
/ When 2<IJ≦n+−1)/2+1;
Pe-2-(0-k)(-1 to n+)/2+1<J'
When <n+1; P e = 0 It can be seen from the probability of these slips that the probability of slipping is O when the synchronization difference is a few bits.

Next, a specific example will be described.

Consider G(X)=X'+X2+1 as a primitive polynomial.

From this primitive polynomial, the code length is 31 and the number of information bits is 26.
The cyclic code of is obtained.

However, consider here a shortened cyclic code with a code length of 11, number of information bits of 6, and number of check bits of 5.

X〃=(X5+X2+1)(X6+X3+X+1)+X
2+X+1, and R(X)d2+X+1.

Therefore, since n=11, ni=6, and i=2,
When there is l-bit synchronization shift to the right, the probability Pe is
The table below shows a comparison between the conventional case and the case of inserting 1 bit "1" between words, which is an embodiment of the present invention.

More specifically, consider the case l-2.

The word made from 11 bits (a1□~a□)i is H(3)=a1oX10+a,X9a8X8+a7X7
+ a a X6+ ” + a 1'X + 0.

A1o to a5 are information bits, and a4 to ao are check bits.

When H(X) is divided by the above G(X) c, H(X)=
(X5+X2+1) (a1oX5+a, X4+a8X3
+(a7+a1o)X2+gu a6+a9)X+(a5
+a8+a1o)) + (a4+ a7+ ag + alo)X4+(
a3+a6+a8+a,)X3+(a2+a5+a7+
a8)X2+(a1±36+a,)X+(ao+a5+
a8+a1o) If H(X) is a code word, the remainder is O, so a2a+
a+a a3== a6 + aB + ag a2-a5+a7+a8 al-a6+a9 a (,= a 5+, a 8+ a 1(.

If the word synchronization shifts to the right by 2 bits, the new word T(X) created due to this shift is T(X) = a8X10+a7X9+...10a1
X3+a X2+ a'>n X+a/.

The remainder Q(X) when divided by T(3) nu G(X) is QCX) = (a 2±a5+ a7+ ag) X
'+ (a1+ a4+ a6+ 27)X3+ (a
o+ 23+a5+a6) X? +(a'ro+a++
a7) X+(a', +a3+a6+a8) Each coefficient in the above equation is a2+a5+a7+a8-(a5+a7+a8)+a5 from the condition that H(X) is a code word.
+a7+a820a1+a4+a6+a7-(a6+a9)+(a7ag
+ a, 0) + a6-1-37= a,.

ao+a3+a5+a6-(a5+a8+a1o)+
(a a + a s tena 9) + a s tena
e = a o + a,.

a'lo + a4+ a7=: a ;6 + (a
7+ ag + alo)+ a7= a'10 +8
g + alOa'g + ag + a6 + aB
= a'9+ (ae +aa +a,)+36+a8
−a′9+a.

The condition for slippage is that all the coefficients of Q(X) become 0, and for that purpose, the condition for a9 ni a1o-a is also 2a'1o20.

The occurrence right rate of each information bit 11111 OI+ is 0
．． 5, and assuming that there is no correlation between each bit or between each word, the probability that the above condition is satisfied is 2, and the probability of slippage is Pe22.

On the other hand, if 1" is inserted between words, the word T/(X) that is shifted by 2 bits becomes T' (X
) −= a a X '°10a 7X9+...=-+
a 1X3+aOX? The remainder Q(X) when T/(X) with +X+a'1;1 is divided by G(X) is Q'=(a2+a5+a7+a8)x4+(a1+
a4 + a6 + a7) X” + (ao +
83+ a 5 + a 6)X2+ (1+ a4+
a7)X+ (a'10+ a3+a6+ as)
1Each coefficient is a2+a5+a7+a8-O a1+a4+a6+a7 dial.

'a(,'+a3+a5+a62a9+a1゜1+
a +a -1+ag+a1. )2ag+a,.

24 7- a10+a3+a6+a8=a;.

+a9.

Kokote, a9+a1o and 6]It is impossible to make TT O at the same time, and Q'flash\O.Therefore, the probability of slippage becomes P e = O.

2. Next, FIG. 3 shows an example of the configuration of the transmitting side when a data transmission system according to an embodiment of the present invention is adopted in which a 1-bit bit is inserted between words.

In the figure, numeral 31 is an information source, which generates binary information data to be transmitted.

The information data output from this information source 31 is supplied to a shortened cyclic encoder 32, and subjected to shortened cyclic encoding.

33 is a clock circuit, and the three outputs of this circuit are an information source, a shortened cyclic encoder 32, and this sloped cyclic encoder 3.
2 is input to a 3-OR circuit 34 which passes the shortened cyclic code for each word output.

The clock circuit 33 supplies the information source 31 with continuous clock pulses as shown in FIG.
Non-return to zero (MRZ) occurring in 1
) format of bit information data 4 (for example, ' 100 ''...11 '' as shown in Figure 4) is
The signal is supplied to a shortened cyclic encoder 32.

This encoder 32 calculates and adds (n-k) bits of check bits from the bit information data to the above bit information data in synchronization with the output C of the RITATSUKU generator 33 to create an n-bit shortened cyclic code.

This shortened cyclic code is then converted to n as shown in Figure 4d.
Each word of bits is supplied to a core circuit 34 .

Since encoding circuits that create shortened cyclic codes are already well known, a detailed description of the shortened cyclic encoder 32 will be omitted here.

By the way, from the clock generator 33 to the shortened cyclic encoder 3
As shown in FIG. There is a gap of 1 bit between the codes.

At this temporal position, a signal as shown in e, which becomes the "°1" signal, is supplied from the clock generator 33 to the OR circuit 34.

Therefore, a 1-bit "1" signal is inserted as a spacer between each word of the shortened cyclic code from the OR circuit 34, and a signal as shown in FIG. 4f is output.

If necessary, such a series of signals is modulated by a modulation device (not shown) and then transmitted to the receiving side.

Since the word interval is constant at (n+1) bits, on the receiving side, after removing the bit at the insertion position of the spacer, error detection of n bits can be performed using the n-k check bits described above.

In this way, there is no need to check whether the spacer is 1'' on the receiving side.

However, if this test is performed, there is an advantage that the ability to detect synchronization errors (r) can be further improved.

In the above embodiment, 1 bit of °1 is inserted between words.
'' is inserted as a spacer.

However, the code inserted as a spacer is 1 bit ""
The value is not limited to V'l, and both ends may be 1'', for example, 101.

As explained above, according to the present invention, one bit is ``1'' between words of a shortened cyclic code, or both ends are 1''.
′ is inserted and transmitted, so even if word synchronization deviates by a few bits, the probability of error detection slipping can be reduced to zero.

Incidentally, in the present invention, the sign of °°1'' may correspond to the 71-level of the signal or the low level of the signal, and in short, it means the same signal as '1'' of the information data.

[Brief explanation of drawings]

Fig. 1 is a diagram for explaining the word synchronization deviation in the conventional case, Fig. 2 is a diagram for explaining the word synchronization deviation in the case of an embodiment of the present invention, and Fig. 3 is a diagram for explaining the deviation in word synchronization in the case of an embodiment of the present invention. FIG. 4 is a diagram illustrating an example of the configuration of the transmitting side when the example data transmission method is adopted, and FIG. 4 is an explanatory diagram of the operation of each part in FIG. 3. 31... Information source, 32... Shortened cyclic encoder, 33... Clock generator, 34...
...OR circuit.

Claims (1)

[Claims] 1. A means for creating a shortened cyclic code for each word from information data, and a 1-bit distance between the words of the shortened cyclic code created by this means. A data transmission method characterized by comprising means for inserting and transmitting a code of multiple bits.