JPS5819168B2 - automatic channel selection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic channel selection device that automatically performs channel selection operations.

In general, in television receivers, tuning is often done by rotating the channel heir, but especially when using continuously variable tuning like when selecting a UHF channel, the tuning operation is cumbersome and cumbersome. Ta.

Furthermore, in the case of a television receiver equipped with a Taichi-type or remote-control type tuning device, the tuning operation when changing channels is easy, but the preset tuning operation at the time of initial installation is still troublesome and requires inexperienced amateurs. It was difficult.

The present invention relates to an automatic tuning device designed in view of the above points, and is capable of automating preset tuning operations by sequentially and automatically storing the tuning voltage of each automatically tuned channel in memory. This provides an automatic channel selection device.

In particular, the present invention provides an automatic channel selection device that can perform search operations accurately and quickly.

The present invention will be described below according to embodiments shown in the drawings.

FIG. 1 is a block diagram showing an example of a television receiver having an automatic channel selection device of the present invention.
is the antenna, 2 is the tuner, 3 is the intermediate frequency circuit, 4 is A
The FT circuit, 5 is a video circuit, 6 is a synchronization circuit, 7 is a deflection circuit, and 8 is a picture tube, and these constitute a normal television receiver.

Here, a start/stop circuit 9, a tuning voltage generating circuit 10, a memory circuit 11, and a signal discriminating circuit 12 are added to these to form an automatic tuning device.

Now, when the search start finger /+ (automatic tuning command) is given to the start/stop circuit 9 during preset tuning,
A search start pulse is generated from the circuit 9 and supplied to the tuning voltage generation circuit 10.

. At this time, the tuning voltage generating circuit 10 generates a sweep voltage or a staircase voltage that gradually rises or falls, and this is passed through the memory circuit 11 to the tuner 2 as a tuning voltage.
tuning diode.

Therefore, at this time, the reception frequency at tuner 2 gradually changes.

It will be changed to

``In this way, when a television radio wave of a certain channel is received, a television video signal is derived from the intermediate frequency circuit 3, and in conjunction with this, a synchronization signal is derived from the synchronization separation circuit 6, and the start switch is started.

It is supplied to circuit 9.

On the other hand, the AFT detection output from the AFT circuit 4 is also supplied to the start/stop circuit 9.

First, when the AFT detection output voltage is derived from the AFT circuit 4 (at this point, it is not yet in an accurate receiving/receiving state), a gradually increasing sweep is generated by the tuning voltage generation circuit 10 in response to the AFT detection output voltage. The slope of the voltage (or staircase voltage) becomes warmer, in other words the rate of voltage change of the tuning voltage is reduced, resulting in a slower search operation.

Next, when the television radio wave is correctly received during this low-speed search operation, the AFT detection output voltage once becomes zero, and this moment is detected and the search start pulse from the start/stop circuit 9 is temporarily generated. However, in reality, the search operation goes too far and the AFT detection output voltage changes to the opposite polarity, so this is detected and the sweep wave (or staircase wave) generation operation of the tuning voltage generation circuit 10 is reversed. Conversely, the sweep voltage generated by the generating circuit 10 gradually drops, and at this time its slope becomes even gentler, so that the search operation is performed at an extremely low speed.

In this way, the next time the television radio wave is correctly received during the ultra-low speed backward search operation, the AFT detection output voltage becomes zero again.

By detecting this time, the generation of the search start pulse from the start/stop circuit 9 is stopped (a search stop pulse may be generated separately at this time), and along with this, the tuning voltage generation circuit 10 Then, the sweep wave (or staircase wave) generation operation is stopped, and from then on, this instantaneous voltage is held, and this is used as the tuning voltage in the memory circuit 1.
1 to the tuner.

Note that if the above backward search operation goes too far, the same operation is repeated again, and the generation of the search stop pulse is stopped at the point where the AFT detection output voltage becomes zero, and the tuning voltage at this time is supplied to the tuner 2. Ru.

On the other hand, at this time, the vertical synchronization signal derived from the synchronization separation circuit 6 is supplied to a signal discrimination circuit 12, where it is discriminated whether or not the signal is a regular television signal.

When it is determined that this is a regular signal, a memory command is derived from the signal discrimination circuit 12, and the command is supplied to the memory circuit 11, which causes the memory circuit 11 to receive a tuning voltage supplied from the tuning voltage generation circuit 10. is stored in memory.

However, when a pseudo synchronization signal is derived from the synchronization separation circuit 6, it is detected by the signal discrimination circuit 12, and the circuit 12 generates a re-search start pulse.

This pulse is supplied to the start/stop circuit 9, whereby the same operation as when the above-mentioned first search start command was given is repeated again.

In this way, the same operation is repeated until a regular television vertical synchronization signal is derived from the synchronization separation circuit 6, that is, until correct reception is performed by the tuner 2, and only when the reception state of a certain channel is accurately achieved is the signal discrimination circuit 12
A memory command is issued from the memory circuit 11, and the tuning voltage at this moment is stored in the memory circuit 11. From then on, this memory voltage is supplied from the memory circuit 11 to the tuner 2.

Once the preset tuning operation for a specific channel as described above is performed, if a tuning command is given to this memory circuit 11 by touch or remote control during normal channel selection, the memory circuit 11 will be The memory voltage is supplied to the tuner 2 as a tuning voltage, and this channel is selectively received.

Although only one memory circuit 11 is shown here, similar memo IJ circuits are actually provided for the number of preset stations, and the tuning voltage stored in each memo IJ circuit can be used for preset tuning operation. (Automatic channel selection operation) is performed sequentially by the same operations as described above.

As described above, according to the automatic tuning device of this embodiment, when a search start command is given during automatic tuning and a search start signal is supplied from the start/stop circuit 9, the tuning voltage generating circuit 10 generates a sweep wave (or Staircase wave) generation operation starts, and the tuning voltage obtained here is applied to memory circuit 1.
1 to the tuner 2, and the receiving frequency is gradually changed.

In this way, when an AFT detection output signal is obtained from the AFT circuit 4 when receiving television radio waves, the voltage change rate of the tuning voltage generated by the tuning voltage generation circuit 10 decreases when this is detected, and the voltage change rate is reduced at a low speed. A search operation is performed.

Thereafter, when the AFT detection output voltage changes to the opposite polarity during this low-speed search operation, this is detected and the sweep wave generation operation of the tuning voltage generation circuit 10 is reversed, and the voltage change rate of the tuning voltage is further reduced. The search operation is performed at extremely low speed.

After that, when the AFT detection output voltage becomes zero during this ultra-low speed search operation, this moment is detected and the generation of the search start signal from the start/stop circuit 9 is stopped.
Accordingly, the sweep wave generation operation of the tuning voltage generation circuit 10 is temporarily stopped, and thereafter the tuning voltage supplied to the tuner 2 is held constant for a certain period of time.

During this time, the signal discrimination circuit 12 discriminates whether the received signal is a regular television signal, and if it is confirmed to be a regular television signal, a memory command is supplied to the memory circuit 11, and at this time, the tuning voltage generation circuit 10
The resulting tuning voltage is stored in the memory circuit 11, and the automatic tuning operation for one station is completed.

On the other hand, when the signal discriminating circuit 12 determines that the signal is not a regular television signal, a re-search start signal is supplied to the start/stop circuit 9 and the above operation is repeated again.

In this way, the memory circuit 11 performs a memory operation, that is, 1
Every time the preset tuning operation for one station is completed, a search start command is again given to the start/stop circuit 9 as shown by the dotted line, and by the same operation as above, the tuning voltage of each station is sequentially stored in separate memory circuits. The preset channel selection operation is completed.

Here, a more specific embodiment of the start/stop circuit 9 and the tuning voltage generating circuit 10 used in the automatic tuning device is shown in FIG. 2, and will be described below.

Now, when a search start command or a re-search start pulse is supplied to the reset input terminal of the R-S flip-flop 13 via the OR gate 14, the flip-flop 13 is reset, and at this time, the output becomes °'H and the AND gate 15 and 29 will be opened.

At this time, the other R-S flip-flops 19 and 30 are also reset by the search start command or re-search start pulse, so the outputs of the flip-flops 19 and 30 are both "L 91" and the output is "Htt". , AND gate 20 is opened and AND gates 26 and 31 remain closed.

Therefore, at this time, for example, a 320 Hz rank pulse generated by the high speed clock pulse generator 16 is derived via the AND gate 20, the OR gate 21, and the AND gate 15, and this is applied to the up/down counter 22 of the tuning voltage generation circuit 10. Provided by count up input terminal.

Therefore, the count contents of the counter 22 are sequentially changed in the count-up direction at a relatively high speed, and this count contents are transferred to the D-A converter C (digital-to-analog converter) 2.
As a result, a gradually increasing DC voltage is derived from the converter 23, and this is supplied to the tuner 2 via the memory circuit 11 as a tuning voltage.

Therefore, the voltage change rate of the tuning voltage obtained from the converter 23 at this time is relatively high, and the search operation is performed at high speed in the direction of increasing the local oscillation voltage.

Now, enter the current television signal reception state, and
An AFT detection output signal is derived from the FT circuit 4, and a vertical synchronization signal is derived from the synchronization separation circuit 6.
When the negative output detector 24 detects the negative output of the AFT detection output signal, the output of the detector 24 becomes H'', the ant gate 25 is opened, and the vertical synchronizing signal is output to the AND gate 2.
5 to the set input terminal of the R-S flip-flop 19, and the flip-flop 19 is set.

As a result, the output of the flip-flop 19 becomes °“Hjl
, the output is L'', so the AND gate 20 is closed at the same time as the AND gate 26 is opened, and at this time, the output of, for example, 1
A slow clock pulse of 60 Hz is applied to the AND gate 26.
, an OR gate 21, and an AND gate 15 to the count-up input terminal of a counter 22, and the counter 22 performs a counting operation at a relatively low speed.

Therefore, the voltage change rate of the DC voltage, that is, the tuning voltage, obtained from the DA converter 23 is reduced to 1/2, and the search operation is thereafter performed at a low speed in the same direction, that is, in the direction in which the local oscillation becomes higher.

Thereafter, when the polarity of the AF'T detection output signal changes from negative to positive during this low-speed search operation, the AFT positive output detector 17
The output becomes H'', the AND gate 18 is opened, the vertical synchronizing signal is supplied to the set input terminal of the R-S flip-flop 30 via the AND gate 18, and the flip-flop 30 is set.

As a result, the output of the flip-flop 30 becomes Hu and the output becomes L''.

AND gate 31 is opened and AND gates 20 and 2 are opened.
6 are closed together.

Therefore, at this time, for example, a 20 Hz clock pulse generated by the ultra-low speed clock pulse generator 32 is supplied to the countdown/input terminal of the counter 22 via the AND gates 31 and 29, and the count contents of the counter 22 are reversed at an ultra-low speed. direction, that is, the countdown direction.

Therefore, a tuning voltage that gradually decreases is obtained from the converter 23, and the voltage change rate of the tuning voltage at this time is extremely low. It is done.

As a result of this extremely slow search operation in the opposite direction,
When the output of the AFT positive output detector 17 changes to fl L 91, the output of the inverter 33 changes to H11, and accordingly, the output of the AND gate 28 becomes H''.

Therefore, at this time, the flip-flop 13 is set and the output of the flip-flop 13 changes to L'', so that the AND gates 15 and 29 are both closed, and no clock pulse is supplied to the counter 22 thereafter.

Therefore, the count contents of the counter 22 will remain constant from now on.
The tuning voltage obtained from the DA converter 23 is also held constant, and the search operation is thus stopped at the local normal point.

Note that when a search start command or a research start pulse is generated again after that, the R-S flip-flops 13, 19, and 30 are reset, and the AND gate 1
5 and 20 are opened again, and at this time the clock pulses generated by the high speed clock pulse generator 16 are applied to the counter 2.
2, and a search operation is performed at high speed.

Note that in the above embodiment, three clock pulse generators 16, 27, and 32 are used: high speed, low speed, and ultra-low speed, but of course, these clock pulses can be generated by dividing the output of one clock pulse generator as appropriate. You may obtain .

According to the automatic channel selection device of the present invention, preset channel selection operations, which were previously troublesome, are all automatically performed, so that even an amateur can easily perform them. When detecting the detection output signal, the speed is reduced to low speed and the slope of the tuning voltage is changed to AFT.
Since the search operation is inverted according to the polarity of the detection output signal, the search operation can be performed accurately and quickly.

[Brief explanation of drawings]

Fig. 1 is a block diagram of a television receiver using the automatic tuning device of the present invention, and Fig. 2 is a block diagram of the specific configuration of a start/stop circuit and a tuning voltage generating circuit used in the device. be. 1...Antenna, 2...Tuner, 3
...Intermediate frequency circuit, 4...AFT circuit, 5...Video circuit, 6...Synchronization separation circuit, 7...Deflection circuit , 8... Receiving tube,
9...Start/stop circuit, 10...
... Tuning voltage generation circuit, 11 ... Memory circuit, 12 ... Signal discrimination circuit, 16 ... High speed clock pulse generator, 17 ... AFT positive Output detector, 22...Araftaran counter, 2
3...D-A converter, 24...A
FT negative output detector, 27...Low speed clock pulse generator, 32... Ultra low speed clock pulse generator.

Claims (1)

[Claims] 1. A start/stop circuit that detects a search start command for automatic channel selection operation and an incoming television signal and derives a search start signal and a search stop signal, respectively, and a tuning circuit whose operation is controlled by the search start signal and search stop signal. An automatic tuning device comprising a voltage generation circuit, a memory circuit for storing the tuning voltage obtained from the tuning voltage generation circuit at a desired time, and means for supplying the tuning voltage obtained from the memory circuit to a tuner, Further, the start/stop circuit outputs three types of clock pulses, high speed, low speed, and ultra-low speed, and has a rank pulse generating means, which detects the presence or absence and polarity of the AFT detection output signal, and detects the presence or absence and polarity of the AFT detection output signal, and detects the presence or absence and polarity of the AFT detection output signal. Switching the output of the pulse generating means from a high speed clock pulse to a low speed clock pulse, and switching the output from the clock pulse generating means from the low speed clock pulse to an extremely low speed clock pulse when the first polarity change of the AFT detection output signal is detected. the tuning voltage generating circuit includes switching control means, and means for stopping the generation of clock pulses from the clock pulse generating means when a second polarity change of the AFT detection output signal is detected; It includes an up/down counter that is driven based on clock pulses, and a D2A converter that converts the count contents of the counter to DA to obtain a tuning voltage. The rate of change in the tuning voltage generated by the generation circuit is reduced to perform a search operation at low speed, and then, when the first polarity change of the AFT detection output signal is detected, the slope of the change in the tuning voltage is reversed and the rate of change in the tuning voltage is further increased. An automatic channel selection device characterized by performing a search operation at an extremely low speed.