JPS5818648B2 - key reading device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a key reading device for an electronic device having a liquid crystal display device.

Recently, the development of LC (liquid crystal) has progressed, and electronic desktop calculators,
It is being put to practical use as a display element for electronic clocks and measuring instruments, and attempts are being made to drive it by combining it with chip LSIs (large-scale integrated circuits), but liquid crystals and LSIs
It is necessary to reduce the number of LSI pins (external lead-out terminals) connecting the two as much as possible.

Figures 1 and 2 show a key reading method in which the number of pins is reduced in a conventional calculator LSI that drives one fluorescent display tube, where 1 is the fluorescent display tube, 2 is its segment electrode,
3 is a grid electrode, 4 is a filament, 5 is a filament power supply, 6 is a keyboard section, and T is an LS with a logic circuit.
It is I.

This reduces the number of pins by sharing the digit signal that drives the grid electrode 3 by 1 for key reading, and when the key marked ■ is operated, the digit signal D1 is input to the key 1 manually, and inside the LSI 7. By detecting this signal D1, it is determined that the key (2) has been operated.

However, when using a liquid crystal as a display element, due to the lifespan and switching characteristics of the liquid crystal, it is necessary to drive it with a signal that is AC lit and has a longer cycle than a fluorescent display tube, and the long cycle of this signal is a key factor. Since the touch time tends to be short compared to the touch time, the conventional key reading method for fluorescent display tubes cannot be applied, and it is necessary to create a dedicated key reading signal separate from the liquid crystal drive signal.

Figures 3 and 4 show a method for reading the keys of a calculator using a conventional liquid crystal display device, in which the duty is 1.
/4 is an 8-digit display using the 1/3 equalization method.

This is to supply digit selection signals LCD 1 to LCD 4 and segment drive signals S a 1 to 5 I) 2 from LSllll to each display unit 12 in a time-division manner, and selectively display liquid crystal segments a to g+p. However, in this case,
The above liquid crystal 1 drive signals LCD1 to LCD4, Sa1 to S
For example, the amplitude of p2 ±Va, ±vb is ± due to the liquid crystal characteristics.
12 (9), ±6 (v), which is very high.

In addition, LSll must be operated at low voltage to take advantage of the low power consumption characteristics of liquid crystals, so complementary MO
In that case, the power supply voltage of LS111 (V
DD) is as low as -6.

Further, the period of the liquid crystal driving digit signal LCD1 etc. is very long as illustrated in FIG.

For example, if the fundamental frequency of a calculator is 50kHz, T1-
2011S, T4 of digit signal = 1280
20 ps = 25.6 ms.

As mentioned above, if the amplitude of the liquid crystal drive signal LCD1 etc. is
The amplitude of the signal LC is high compared to the logic part of
D1 etc. cannot be used directly as a key reading signal.

Therefore, the timing signals D1 to Dn of the amplitude VDD used inside the LS11 are used as key read signals to the LSI.
Externally, and for that purpose, only one human power is needed to read the key.
~Km terminals will need to be provided, but if, for example, 25 keys are required, n=5. With m=5, 10 lines are externally led out for key reading in addition to those for driving the liquid crystal 1.

You will need a pin.

Therefore, in the case of 8-digit display using the duty 1/4 method described above, there are 4 pins for digit selection signals and 16 pins for segment drive.
There will be 10 for reading books and keys, so 30 will be needed first, and if you add the power supply terminal, oscillation terminal, etc., LSI 1
1.

The number of pins becomes extremely large.

The present invention was made in view of the above-mentioned circumstances, and instead of providing a large number of dedicated terminals for key reading of LCD drive LSIs, one or two dedicated terminals and a signal terminal for LCD drive are used for key input. vinegar.

The purpose of this invention is to provide a device that makes it possible to read keys.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 5 is a detailed circuit diagram of a key reading section of a calculator to which the present invention is applied, and FIG. 6 is an overall configuration of this calculator.

7 are liquid crystal driving waveform diagrams.

That is, the calculator of this embodiment has an 8-digit display using the 1/3 equalization method with a duty of 1/4, and corresponds to that shown in FIGS. 3 and 4.

First, in the present invention, as shown in FIG.
Internally, the timing signals t1jD2. A pulse of rD2t 1〒D2t1 is obtained from r.

And as shown in FIG. 5, an N-channel MOS transistor TR.

TR2, P-channel MOS transistor TR3TR4
Segment drive buffer circuit 14 with complementary MOS configuration
form.

This circuit uses the pulse rD2t1. )2t1 are at -vb level, the transistors TR1 and TR4 are turned on by the output via the positive logic OR gate 15, so the transistors TR2 and TR3 act as mere imparks, and the segment drive signal is sent to the segment drive signal terminal 16. Supply Sa1.

Segment drive signals Sb1 to Sp2 are also supplied to corresponding segment drive signal terminals.

And pulse rD2t1 or 〒D2t1 is +vb
When it is at the level, the transistor T R1* T R4
is turned off, but the bias voltage -vb is applied to the buffer circuit 14.
There is a mutual conductance gm between the electrode and the output terminal that gives
Since the source and drain of the N-channel MOS transistor TR, which has a small resistance, that is, a sufficiently large on-resistance, are connected, if the transistor TR is turned on at the same time as the transistors TR1 and TR4 are turned off, a segment is formed as shown in FIG. The drive signals Sa, ~Sp2 are pulse rD2t
l) When rD2t is established, it always becomes -vb level.

Here, the timing pulse rD2t1. The pulse width of rD2t1 is sufficiently narrow compared to the segment drive signals Sa1 to 5l)2, for example, 1/160 in this embodiment, so it does not affect the liquid crystal display in any way, and the period is shorter than the key touch time. Since the segment drive signal is selected to be sufficiently small, the segment drive signal becomes -vb level once during one pulse.

As shown in FIG. 5, each segment drive signal output terminal is connected to positive logic Nant gates 191.19□ to 19.19. -1゜1
Connect it to the other input of 9A'.

Also, P channel MO whose source side is connected to power supply +vb
Connect the drain sides of S transistors TR6 and TR7 to terminal 1.
7.18.3 to the outside of the LSI and connected to the keyboard section 13.

That is, in this keyboard section 13, the segment drive signal S
Each segment drive signal line 20 connected to the corresponding segment electrode of the liquid crystal display device is introduced from each external lead-out terminal 16 corresponding to a1 to Sp2, and the terminal 1 is connected to these signal lines.
Connect one end of the number of keys corresponding to 7.18 (two in this case), and also connect the signal wire 21.22 from terminal 17.18.
and connect the other end of the key to it.

In the above configuration, when no keys on the keyboard section 13 are operated, the terminals 17 and 18 of the LSI are not connected to each terminal 16, so the pulse rD2t 1 or rD
Since the segment drive signal that becomes -vb level only when 2t1 is at +vb level is output from the segment drive signal output terminal, the outputs of positive logic AND gates 19□-191 always have -vb level. It's a story.

Next, for example, when key ■ is operated, segment drive signal S
a, output terminal 16 and pulse rD211 output terminal 17
However, since transistors TR1 and TR4 are off at the timing of pulse rD2t, the power supply (10 Vb) - transistor TR6 -
A current path from transistor TR5 to power supply (-vb) occurs, but since the on-resistance of transistor TR5 is selected to be sufficiently large compared to that of transistor TR6, the potential of output terminal 16 of segment drive signal Sa1 is approximately at +vb level. becomes.

Therefore, since the output of the gate 19□ becomes +vb level only when rD2t1 is established, if this is detected inside the LSI, it can be determined that the key □ has been operated.

As described above, according to the present invention, the liquid crystal drive signal terminal can also be used as a key input, so that key reading can be performed by simply providing one or two timing signal deriving terminals dedicated to key reading.

Note that in the above embodiment, the segment drive signals Sa1 to Sp
2, timing signal rD2t 1. 〒T) 2t.

Although the number of LSI pins is reduced by superimposing the digit selection signals L CDl to LCD4, the same effect can be obtained by superimposing the timing signals rD2hp〒D2t1 on the digit selection signals L CDl to LCD4.

Further, the timing signal rD2t1°rD2t1 can be a pulse with a sufficiently narrow pulse width and regularity, and the number of pulses can be changed depending on the number of keys.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram to explain the key reading method of a calculator using a fluorescent display tube, Figure 2 is a waveform diagram showing its operation,
Figure 3 is a circuit diagram to explain the key reading method of a conventional calculator using a liquid crystal, and Figure 4 is a waveform diagram showing its operation.
5 and 6 are circuit diagrams showing one embodiment of the present invention, and FIGS. 7 and 8 are waveform diagrams showing its operation. 11... LSI, 12... Liquid crystal display section, 13... Keyboard section, 14... Buffer circuit, 16-18 terminal... TR5...
...gm small transistor, rD2tl, rD
2t1... Timing signal.

Claims (1)

[Claims] 1 A liquid crystal drive signal buffer circuit consisting of an impark made up of complementary MO8I transistors and a control MOS transistor that stops functioning only when the impark is activated, and its drain and source connected between its output terminal and bias electrode. a MOS transistor with a small cap that turns on only at the above-mentioned timing; a gate circuit whose logic inputs are the signal of the output section of the buffer circuit and the signal supplied at the above-mentioned timing; and the output section of the buffer circuit and the output of the timing signal. and a key connected between the parts, the key is discriminated based on the output of the gate circuit, and the signal corresponding to the timing signal is supplied to the gate circuit via the operated key and the output terminal of the buffer circuit. and a key reading device characterized in that the timing signal has a short signal that does not affect a liquid crystal display and is generated at a cycle shorter than a key contact time.