JPS6040048B2 - Keyboard input circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input circuit for a keyboard, and more particularly to an input circuit for a keyboard through a low power consumption system.

Conventional keyboard input circuits consume a lot of power, so
It was not suitable for low power consumption portable electronic devices that use a 4-inch battery as a power source.

An object of the present invention is to provide a keyboard input circuit suitable for a portable electronic device with low power consumption, which is particularly applicable to a type of system in which the timing signal system is normally stopped in order to reduce power consumption. The purpose is to provide an input circuit.

For the above purpose, the input circuit of the present invention includes a plurality of detection column electrode lines connected to a first power supply potential side by an impedance element, a memory circuit provided for each of the lines, and a switching element connected to a second power supply potential side. a plurality of row electrode lines connected to one side; a memory circuit provided corresponding to each line and reading data when a switching element of the corresponding line is turned on; and a memory circuit that sequentially and periodically turns on the switching elements. It has a transmission means for transmitting a periodic signal to set the state.

When the keyboard is operated, the row and column of the operated key are stored in the memory circuit, and the operated key is detected from the stored signal. The device further includes a first gate circuit for controlling transmission of the periodic signal to the switching element, and the switching element is turned on by applying a control signal with a very small duty cycle to the gate circuit. Decrease time. This reduces the static current flowing from the second power supply potential side to the first power supply potential side while the key is being operated. In addition, in order to reduce power consumption, in order to be compatible with a system in which the timing signal system is stopped under normal conditions and the periodic signal is also stopped, all signals are processed independently of the signals of the first gate circuit. has a second gate circuit that turns on the switching element. The operation of the gate circuit makes it possible to detect that a key has been operated even when the periodic signal has stopped. This will be explained below based on the drawings.

FIG. 1 shows an external view of an embodiment of a portable electronic device equipped with a keyboard input circuit according to the present invention.

In Fig. 1, up to 10 bands can be worn on the arm, 102, 106, and 110 are switches that control each function, 104 is a display device that switches and displays calculation information and time information, and 108 is a keyboard. . FIG. 2 shows an embodiment of the keyboard input circuit according to the present invention, which is used in a system having both a computer library and a timekeeping function.

In FIG. 2, KH, , KH2, KH3, KH4 are row electrode lines and switching elements 200, 202, 204,
206, each is connected to the high potential side (hereinafter abbreviated as "day") of the power supply. KV,,KV2,KV3,K
V4 is a column electrode line for detection and impedance element 20
8, 210, 212, 214 connect the low potential side of the power supply (
(hereinafter abbreviated as L). Here, the impedance elements 208, 21 0, 21 2, 2 14 are MOS resistors. Data type flip-flop (hereinafter abbreviated as D-FF) 216, 218, 220
, 222 are column electrode lines KV, , KV2, KV, respectively.
3. Memory circuit provided in KV4, D-FF224, 2
26, 228, 230 are row electrode lines KH, .
This is a trust circuit provided corresponding to KH2, KH3, and K ratios. 2, 2 and t8 are timing signals having the relationship shown in FIG.
This is a periodic signal that sequentially and periodically turns on signals 04 and 206. AND gates 232, 234, 236, 23
8 is a first gate circuit that controls transmission of the periodic signals t2, L, t8 to the switching elements 200, 202, 204, 206. The output of the AND gate 240 is connected to the gate circuit as a control signal.
The calculation signal that is the input to the OR gate 242 is a signal that is present when the system is in calculation mode, that is, when the display device 104 in FIG. 1 is in a state where calculation information should be displayed.
The SET signal is a signal that indicates the time and date when the system is in a time setting state. Also, the 8 signals that are the input signals of the inverter 244 are the input signals of the switch 110 used as a clear key.
This is a signal that is activated when the is being operated. Therefore, when the clear key is not operated and the system is in calculation mode and time setting mode, a 32Hz' signal will appear at the output of AND gate 240. A if the situation is other than the above.
Since the output of the ND gate 240 is L, t2
, t8 are switching elements 200, 202, 204
, 206. Therefore, even if the keyboard 108 is operated, its signal is not read, and no current is consumed by the operation. In this manner, operations on the keyboard 108 are completely ignored in the normal time display state. The 32 Hz' signal is shown in the timing chart of FIG. 4, and is the only signal that occurs 32 times per second among the D and signals.

t, signal is approximately 4KHz, 32 in this example.
The duty cycle of the HZ' signal is approximately 1/125. 32 days, the signal is AND gate 2 as a control signal
32, 234, 236, and 238, the gate outputs the t signal only 32 times per second.

The outputs of AND gates 232, 234, 236, 238 are applied to switching elements 200, 202, 204, 206 via NOR gates 246, 248, 250, 252, respectively. When 32H2' becomes day, the switching element 200 is turned on by the signal t, and the row electrode line KH is connected.

Similarly, row electrode lines KH2, KH3, and KH4 are sequentially connected to each other by signals t2, t4, and so on. 32Hz
'When the signal becomes L, switching elements 200, 202,
204 and 206 are all turned off, and the row electrode lines are in a floating state until the next 32HZ becomes a day.

If the 7 key is now pressed, the row electrode line KH and column electrode line KV come into contact. Since the switching element 200 is turned on when both the 32nd and 2' signals are on the 32nd,
A current flows from the switching element 200 through the row electrode line KH, the column electrode line KV, and the impedance element 208 from the current to the switching element 208.

The potential of this time column electrode line KV is equal to 1. At times other than the above, the switching element 200 is turned off, so no chordal current flows and the potentials of KH, , KV both become L. 32Hz
'The temporal probability that the signals fall on the same day is about 1/500.

Therefore, static current is consumed for 1/500 of the time the 7 key is pressed. As described above, in the keyboard input circuit of the present invention, the power consumption of the circuit is significantly reduced. KV, is connected to the data terminal of D-FF216, and KV2, KV3, and KV4 are connected to D-FF218, 22 through AND gates 254, 256, and 258, respectively.
0,222 data terminal.

The data terminals of the D-FFs 216, 218, 220, and 222 are further connected to the input of an OR gate 260, and the output of this gate is connected to the data terminals of the D-FFs 224, 226, 228, and 230. ○-FF224, 226,
The output signals of AND gates 232, 234, 236, and 238 are connected to the clock terminals of 228 and 230, respectively.
AND gates 270, 272, 27 after being ANDed with signals from ND gates 262, 264, 266, 268.
4,276. OR gate 260
The output signals of column electrode lines KV, , KV2, KV3, K
The signal of V4 is an OR signal. Therefore, when the keys 7, 8, 9÷ corresponding to the row electrode line KH are pressed, both 2' and t on the 32nd become day and day, and similarly KH
If the key corresponding to 2 is pressed, the key corresponding to KH3 is pressed, t, and if the key corresponding to KH4 is pressed, the key is pressed. As is clear from the relationship between the 0 signal and the t signal shown in FIG.
The clock signal of 230 is 32HZ' signal, and
2, t4, etc. are output during the day. Therefore, when keys corresponding to row electrode lines KH, , KH2, KH3, KH are pressed, D-FF224, 226, 228, 23
0, the day is read and the line of the operated key is stored. AND gates 270, 272, 274, and 276 are gates provided to prevent double logic input of key signals, and when the date is read into one of the D-FFs corresponding to the row electrode line, the other D-FFs are It functions to prohibit the application of a clock signal to the FF. As a result, even if two or more keys are pressed at almost the same time, the line corresponding to the first key pressed can be detected. D-F/F224,2
The outputs of 26, 228, and 230 are input to an OR gate 278, and the output of this gate is passed through an OR gate 280 to D-F.
/F216, 218, 220, 222 clock terminals. The output of the OR gate 278 rises when any of the row electrode line FFs 224, 226, 228, and 230 reads the date. FF216 for this time column electrode line
, 218, 220, and 222 read the potentials of the column electrodes KV, to KV4 and store the column of operated keys. Other inputs to the OR gate 280 are a key ON signal and a milling signal. The key ON signal is a signal that is output while the keyboard is being pressed, and the 8 signal is a signal that is output when the clear key is being operated. These two signals limit the clock output of the column electrode FF to one per key operation. Due to the function of this gate, even if two or more keys are pressed at the same time, the column corresponding to the first pressed key can be detected. F for column electrode line
The gate group 282 detects the operated key based on the column information stored in the F and the row information stored in the row electrode line FF. When the TEN keys 0 to 9 are operated, the OR gate 284 outputs a TEN signal indicating that the TEN key has been operated, and the OR gate 286 outputs a Q signal indicating the numerical value of the operated key in time series. .
Note that key operations are read at a rate of 32 times per second, so the 3 hSec generated on the keyboard 108 is
・The following chattering signals have been removed. When the key operation is completed, the row electrode FF reads the L data and returns to the initial state, and the column electrode FF is reset to the initial state by the AND gate 288 signal output when the key ON signal falls. Return. Also, the row electrode FF is IN
It is reset by the ITIALRESET signal when the power is turned on. NOR gate 246, 248, 250, 25
2 is provided for when the timing signals t2, t8, and t8 are stopped. In the system in which the circuit of this embodiment is used, the timing signals t, -W are outputted only when calculations, data transfer, etc. are performed, and are normally stopped. When the timing signal is stopped, the timing output signal, which is the input to the inverter 290, is at L level. Therefore, when the timing signal is stopped in the time setting mode and the calculation mode, the output of the AND gate 292 becomes "day" and the switching elements 200, 202, 204, and 206 are all turned on. When the keyboard 108 is operated in this state, the output of the OR gate 260 immediately becomes the date.
This signal is a command signal for causing the system to output a timing signal, and this signal causes the timing signal t to be output.
, . . . are output, and the timing output signal becomes day. When the timing output signal is set to 1, the output of the AND gate 292 becomes L, so the circuit operates as described above. A
ND gate 254, 256, 2580R gate 294,
A circuit group consisting of 295 inverters 296, 297, and 298 is provided to prioritize signals on the column electrode lines. In other words, this is to prevent the date from being read into multiple column electrode FFs when the keyboard 108 is operated while the timing signal is stopped. The signal output of the column electrode line is prohibited. FIG. 5 shows an embodiment of a circuit for producing a 32-day 2' signal.

The 3 fox HZ signal is output from the oscillator 500, and the signal is 1
/ Divided by 2? It becomes a signal. ) signal is frequency-divided by 1'512 to become a 32Hz signal. ◇Signal is AND gate 50
2 to a timing pulse generator 504 to generate various timing pulses shown in FIG. When the timing output signal becomes L, transmission of the stop signal is prohibited and the timing pulse generator stops. The 2nd signal on the 32nd is sent to D-FF506. The output Q of the FF is read into the D-FF 508 with the signal, the output Q of the F is read into the D-FF 508 with the signal, and the inverted output Q2 of the FF and the The AND signal of Q, is 3
It becomes a 2HZ' signal.

As shown in Figure 4, the 32HZ' signal rises in synchronization with the first rise of D after the 32HZ signal rises, and
It is a pulse signal that lasts only during the signals of , and while the 32HZ' signal is on the day, t, , t2, t4, and t8 are on the day once each. In the embodiment circuit shown in FIG. 5, when the data input signal of the D-FF 506 is set to 256Hz or higher,
The duty cycle of the output signal is about 1/18, and when it is an IHZ signal, it is about 1/4000. As is clear from the above description, according to the present invention, a keyboard input circuit with low power consumption can be realized.

The input circuit according to the present invention is particularly effective when applied to a wristwatch-type portable electronic device using a small battery as a power source, a 4-inch calculator using a small power source, and the like.

[Brief Description of the Drawings] Figure 1 is an external view of an embodiment of a portable electronic device to which the present invention is applied, Figures 2 and 5 are circuit diagrams of an embodiment of a keyboard input circuit according to the present invention, Figures 4 and 6 are timing charts. 208, 210, 212, 214... Impedance element, KH,, KH2, KH3, K...... Row electrode line, KV,, KV2, KV3, KV4...
Example electrode line, 200, 202, 204, 206... switching element, 232, 234, 236, 238...
...first gate circuit, 246, 248, 250, 25
2...Second gate circuit. Figure 1 Figure 4 Figure N Ship Figure 3 Festival S Figure 6

Claims (1)

[Claims] 1. A plurality of detection column electrode lines connected to a first power supply potential side by an impedance element, and a plurality of row electrode lines connected to a second power supply potential side by a switching element. a periodic signal transmission means for periodically turning on the switching element, a first control signal, and a first control signal for controlling transmission of the periodic signal to the switching element according to the first control signal. 1 gate circuit, and a 2nd gate circuit.
a second gate circuit to which the second control signal and the output of the first gate circuit are applied, the output of which controls on/off of the switching element; The control signal becomes active when the periodic signal is not output, and the second control signal becomes active, so that the output of the second gate circuit changes to the state of the output of the first gate circuit. An input circuit for a keyboard, characterized in that all the switching elements are turned on regardless of the above.