JPH02210492A - Liquid crystal display driving device - Google Patents
Liquid crystal display driving deviceInfo
- Publication number
- JPH02210492A JPH02210492A JP2997889A JP2997889A JPH02210492A JP H02210492 A JPH02210492 A JP H02210492A JP 2997889 A JP2997889 A JP 2997889A JP 2997889 A JP2997889 A JP 2997889A JP H02210492 A JPH02210492 A JP H02210492A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- crystal display
- circuit
- display element
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 59
- 230000002457 bidirectional effect Effects 0.000 abstract description 13
- 230000002542 deteriorative effect Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000010355 oscillation Effects 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000003068 static effect Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、液晶表示素子の駆動装置に関する。[Detailed description of the invention] (Industrial application field) The present invention relates to a driving device for a liquid crystal display element.
(従来の技術)
近年、卓上型電子計算機を始めとして、液晶表示素子を
使用する電子機器が増加し、その電源として乾電池が多
く用いられるため装置の低消費電力化が望まれている。(Prior Art) In recent years, the number of electronic devices using liquid crystal display elements, including desk-top computers, has increased, and since dry batteries are often used as a power source for these devices, it is desired to reduce the power consumption of the devices.
第3図は、従来の液晶表示素子を直接駆動する集積回路
装置を示している。但し、液晶表示素子の駆動方式は一
般的なスタティック方式とする。FIG. 3 shows a conventional integrated circuit device that directly drives a liquid crystal display element. However, the driving method for the liquid crystal display element is a general static method.
第3図において、1および2はPチャンネルMOSトラ
ンジスタ、4および5はNチャンネルM、OSトランジ
スタ、10はE X、 −N OR回路、30は液晶共
通電極駆動回路、31は液晶セグメント電極駆動回路で
ある。In FIG. 3, 1 and 2 are P-channel MOS transistors, 4 and 5 are N-channel M, OS transistors, 10 is an EX, -NOR circuit, 30 is a liquid crystal common electrode drive circuit, and 31 is a liquid crystal segment electrode drive circuit. It is.
第4図は従来例の点灯、非点灯時の液晶表示素子の駆動
信号のタイミングチャートを示したちのである。FIG. 4 shows a timing chart of drive signals for a liquid crystal display element during lighting and non-lighting in a conventional example.
次に上記従来例の動作について説明する。第3図におい
て、クロック入力端子φL’CDをゲート入力とし、電
源端子V。I、と接地V S 、間に、PチャンネルM
OSトランジスタ]とNチャンネルMOSトランジスタ
4を直列接続して、いわゆる液晶共通電極駆動回路30
とし、MO5I−ランジスタのドレインを共通にした接
続点より出力信号端子CO,,Iを取り出す。また、ク
ロック入力端子φ1.C11と表示用データ入力りを各
入力端子とするEX−NOR回路10の出力を、前記液
晶共通電極駆動回路30と同様に構成した回路を別に設
け、その共通にしたゲートに接続して液晶セグメント電
極駆動回路31を構成し、その出力端子をS Outと
する。Next, the operation of the above conventional example will be explained. In FIG. 3, the clock input terminal φL'CD is used as a gate input, and the power supply terminal V. I, and ground V S , between P channel M
OS transistor] and an N-channel MOS transistor 4 are connected in series to form a so-called liquid crystal common electrode drive circuit 30.
Then, the output signal terminals CO, , I are taken out from the connection point where the drains of the MO5I transistors are shared. In addition, the clock input terminal φ1. A separate circuit configured similarly to the liquid crystal common electrode drive circuit 30 is provided, and the output of the EX-NOR circuit 10 whose input terminals are C11 and display data input is connected to the common gate of the liquid crystal segment. An electrode drive circuit 31 is configured, and its output terminal is designated as S Out.
φ1.。0は集積回路装置のクロック入力端子あるいは
クロック発振回路の信号を分周した液晶表示素子の駆動
クロック信号であり、表示データ信号りは、セグメント
電極を点灯するとき電源電圧V p 11レベルで、非
点灯時はV 3 Bレベルとなる。第4図に示すように
、表示データDがVSSレベルのときは、液晶共通電極
駆動回路30の出力端子C01,の信号出力と、液晶セ
グメント駆動回路31の出力端子S。utの信号出力は
同一となり、液晶表示素子の共通電極とセグメント電極
間の電位差は○となり非点灯となる。φ1. . 0 is a drive clock signal for a liquid crystal display element obtained by frequency-dividing the clock input terminal of an integrated circuit device or a signal from a clock oscillation circuit, and the display data signal is at the power supply voltage V p 11 level when lighting a segment electrode, and is non-active. When lit, it is at V 3 B level. As shown in FIG. 4, when the display data D is at the VSS level, the signal output from the output terminal C01 of the liquid crystal common electrode drive circuit 30 and the output terminal S of the liquid crystal segment drive circuit 31. The signal output of ut becomes the same, and the potential difference between the common electrode and the segment electrode of the liquid crystal display element becomes ◯, so that the liquid crystal display element is not lit.
次に、表示データDがvDDレベルのときは、出力端子
C8U、と出力端子S。utは逆相の信号出力となり、
液晶表示素子の共通電極とセグメント電極間の電位差は
電源電圧■Dlllとなり、点灯状態となる。Next, when the display data D is at the vDD level, the output terminal C8U and the output terminal S are output. ut becomes the signal output of the opposite phase,
The potential difference between the common electrode and the segment electrode of the liquid crystal display element becomes the power supply voltage ■Dllll, and the device is turned on.
(発明が解決しようとする課題)
しかしながら、上記従来の液晶表示駆動装置では、液晶
表示素子の駆動用のクロック信号は常時動作状態のため
に、装置の消費電力が多く、また、低消費電力化を図る
ためにクロック信号をセグメント点灯時に停止すると、
液晶表示素子の特性が劣化する問題点があった。このた
め、スタンバイ状態や液晶表示が不要なときでもクロッ
ク信号が必要となるため、低消費電力化が望まれている
電子機器しこは不向きである。(Problems to be Solved by the Invention) However, in the conventional liquid crystal display driving device described above, the clock signal for driving the liquid crystal display element is constantly in operation, so the device consumes a lot of power. In order to achieve this, if the clock signal is stopped when the segment lights up,
There was a problem that the characteristics of the liquid crystal display element deteriorated. For this reason, a clock signal is required even in a standby state or when a liquid crystal display is not required, making it unsuitable for electronic devices where low power consumption is desired.
本発明は、上記従来の問題を解決するものであり、液晶
表示素子の特性を劣化させることなく、容易に低消費電
力化を実現する液晶表示駆動装置を提供することを目的
とするものである。The present invention solves the above-mentioned conventional problems, and aims to provide a liquid crystal display driving device that easily realizes lower power consumption without deteriorating the characteristics of the liquid crystal display element. .
(問題を解決するための手段)
本発明は上記目的を達成するために、液晶表示素子の駆
動回路の電源に複数個の双方向の転送ゲートを有し、か
つ液晶表示素子のクロック信号を停止する機能を付加し
たものである。(Means for solving the problem) In order to achieve the above object, the present invention has a plurality of bidirectional transfer gates in the power supply of the drive circuit of the liquid crystal display element, and stops the clock signal of the liquid crystal display element. It has the added function of
(作 用)
したがって、本発明によれば、液晶表示素子駆動用の電
源に双方向転送グー1〜回路を、該装置内のスタンバイ
制御信号で非導通にすることにより、液晶表示素子駆動
用の全出力端子の出力が高インピーダンス状態となるた
めに、液晶表示素子の特性を劣化させることなく液晶表
示素子の駆動クロック信号を停止することが可能となり
、低消費電力化が容易に実現できるという作用を有する
。(Function) Therefore, according to the present invention, the bidirectional transfer circuit 1 to the power supply for driving the liquid crystal display element is made non-conductive by the standby control signal in the device, so that the power supply for driving the liquid crystal display element is made non-conductive. Since the outputs of all output terminals are in a high impedance state, it is possible to stop the drive clock signal for the liquid crystal display element without degrading the characteristics of the liquid crystal display element, which makes it easy to reduce power consumption. has.
(実施例) 第1図は本発明の一実施例を示す回路である。(Example) FIG. 1 shows a circuit showing one embodiment of the present invention.
@ I Mにおいて、1,2および3はPチャンネルM
O8+−ランジスタ、4,5および6はNチャンネルM
OSトランジスタ、10はE X、 −N OR回路、
11はOR回路、12はインバータ回路、20は双方向
転送ゲート回路であってソースと基板を接続して電源端
子VD、、と接続したPチャンネルMOSトランジスタ
からなる。21は双方向転送ゲート回路であって、ソー
スと基板を接続し接地端子■、8と接続したNチャンネ
ルMOSトランジスタからなる。@I M, 1, 2 and 3 are P channel M
O8+- transistor, 4, 5 and 6 are N channel M
OS transistor, 10 is EX, -NOR circuit,
11 is an OR circuit, 12 is an inverter circuit, and 20 is a bidirectional transfer gate circuit consisting of a P-channel MOS transistor whose source and substrate are connected to a power supply terminal VD. Reference numeral 21 denotes a bidirectional transfer gate circuit, which is composed of an N-channel MOS transistor whose source and substrate are connected and which are connected to ground terminals (2) and (8).
30は液晶共通電極駆動回路であって、各ゲートを共通
接続したPチャンネルMOSトランジスタ1のドレイン
と、ソースと基板を共通接続したNチャンネルM、08
l−ランジスタ4のドレインとを接続し、その接続点を
出力端子CoU、とじて液晶表示素子の共通電極駆動信
号の出力に用いられる。Reference numeral 30 denotes a liquid crystal common electrode drive circuit, in which the drain of a P-channel MOS transistor 1 whose respective gates are commonly connected, and the N-channel MOS transistor 08 whose source and substrate are commonly connected.
It is connected to the drain of the L-transistor 4, and the connection point is used as an output terminal CoU, which is used to output a common electrode drive signal for the liquid crystal display element.
31は液晶セグメント電極駆動回路であって、液晶共通
電極駆動回路30と同様な構成の回路の共通にしたゲー
トにE X、 −N OR回路10の出力を接続し−ご
用いられる。32は分周回路である。31 is a liquid crystal segment electrode drive circuit, which is used by connecting the output of the EX, -NOR circuit 10 to a common gate of a circuit having the same configuration as the liquid crystal common electrode drive circuit 30. 32 is a frequency dividing circuit.
前記双方向転送ゲート回路20.21にそれぞれ前記液
晶共通電極駆動回路30.液晶セグメン1〜電極駆動回
路31のPチャンネルMOSトランジスタ1゜2のソー
ス、およびNチャンネルMOSトランジスタ4,5のソ
ースに接続し、スタンバイ信号を直接またはインバータ
12を介して前記双方向転送ゲート回路20.21のP
チャンネルMO8I−ランジメタ3.NチヤンネルMO
3+−ランジスタロの各ゲートに接続され、また、スタ
ンバイ信号と入力信号φをOR回路11に入力し、OR
回路11の出力を分周回路32に入力接続し、該分周回
路32の出力を前記液晶共通電極駆動回路30の共通に
したゲートおよびEX−NOR回路10の一方の入力と
なるように接続している。The liquid crystal common electrode drive circuit 30.21 is connected to the bidirectional transfer gate circuit 20.21, respectively. It is connected to the sources of the P-channel MOS transistors 1 and 2 of the liquid crystal segment 1 to the electrode drive circuit 31 and the sources of the N-channel MOS transistors 4 and 5, and a standby signal is transmitted directly or via the inverter 12 to the bidirectional transfer gate circuit 20. .21 P
Channel MO8I-Rangemetal 3. N channel MO
It is connected to each gate of the 3+- range terminal, and also inputs the standby signal and the input signal φ to the OR circuit 11, and performs the OR circuit.
The output of the circuit 11 is connected as an input to a frequency dividing circuit 32, and the output of the frequency dividing circuit 32 is connected to the common gate of the liquid crystal common electrode driving circuit 30 and one input of the EX-NOR circuit 10. ing.
第2図は本実施例のタイミングを示した図である。FIG. 2 is a diagram showing the timing of this embodiment.
次に上記実施例の動作について説明する。第1図におい
て、集積回路装置の内部回路で発生あるいは外部端子よ
り入力されるスタンバイ信号がvssレベルのとき、双
方向転送グー1−回路20.21は共に導通し、かつ液
晶用クロックφ1.cnは動作する。第2図に示すよう
に、セグメントデータDがV55レベルでは液晶表示素
子は非点灯、V n nレベルでは点灯の通常の動作を
行う。次に、スタンバイ信号がVDDレベルになると、
液晶用クロック発生源にあるOR回路11により液晶駆
動クロックφLCDは停止し、かつ双方向転送ゲート回
路20゜21は共に非導通となるため、液晶駆動用の電
源Vr+n+tcn+ + V 5sLtcn+は供給
されず出力は高インピーダンス状態となる。Next, the operation of the above embodiment will be explained. In FIG. 1, when the standby signal generated in the internal circuit of the integrated circuit device or inputted from the external terminal is at the vss level, the bidirectional transfer circuits 1 and 20 and 21 are both conductive, and the liquid crystal clock φ1. cn works. As shown in FIG. 2, when the segment data D is at the V55 level, the liquid crystal display element does not light up, and when the segment data D is at the V n n level, it performs the normal operation of lighting. Next, when the standby signal reaches VDD level,
The liquid crystal drive clock φLCD is stopped by the OR circuit 11 in the liquid crystal clock generation source, and both the bidirectional transfer gate circuits 20 and 21 become non-conductive, so the liquid crystal drive power supply Vr+n+tcn+ + V5sLtcn+ is not supplied and output. becomes a high impedance state.
なお、本実施例は液晶表示素子の駆動方式をスタティッ
ク方式としたが、液晶用電源の多いダイナミック駆動方
式にも適用されるのは言うまでもない。In this embodiment, a static driving method is used for the liquid crystal display element, but it goes without saying that the present invention can also be applied to a dynamic driving method, which is often used as a power source for liquid crystals.
双方向転送ゲート回路の構成は、基板バイアス効果を考
慮し、PチャンネルMO8+−ランジスタロ個とNチャ
ンネルMOSトランジスタ1個を並列接続した回路構成
を用いてもよい。また、液晶駆動用クロック源の停止は
、水晶発振回路等の自励発振回路にも適用できるのは言
うまでもない。The configuration of the bidirectional transfer gate circuit may be a circuit configuration in which P-channel MO8+- transistors and one N-channel MOS transistor are connected in parallel in consideration of the substrate bias effect. It goes without saying that stopping the liquid crystal driving clock source can also be applied to self-excited oscillation circuits such as crystal oscillation circuits.
(発明の効果)
本発明は上記実施例より明らかなように、液晶表示素子
の駆動用クロック発振を停止しても、液晶表示素子の特
性を劣化することなく容易にスタンバイ機能を実現し、
消費電力を低減することができるという効果を有する。(Effects of the Invention) As is clear from the above embodiments, the present invention can easily realize a standby function without deteriorating the characteristics of the liquid crystal display element even if the driving clock oscillation of the liquid crystal display element is stopped.
This has the effect of reducing power consumption.
第1図は本発明の一実施例の液晶表示駆動装置の回路図
、第2図は第1図の実施例のタイミング図、第3図は従
来の液晶表示駆動装置の回路図、第4図は第3図の従来
例のタイミング図である。
1.2.3 ・PチャンネルMos+〜ランジスタ、
4,5.6 ・・NチャンネルMOSトランジスタ、
10・・・E X、 −N OR回路、11 ・O
R回路、12・・・インバータ回路、20.21・・・
双方向の転送ゲート回路、30・・液晶共通電極駆動回
路、31・・・液晶セグメント電極駆動回路、32・・
・分周回路。
特許出願人 松下電器産業株式会社FIG. 1 is a circuit diagram of a liquid crystal display driving device according to an embodiment of the present invention, FIG. 2 is a timing diagram of the embodiment of FIG. 1, FIG. 3 is a circuit diagram of a conventional liquid crystal display driving device, and FIG. 4 is a timing diagram of the conventional example shown in FIG. 1.2.3 ・P channel Mos+ ~ transistor,
4,5.6...N-channel MOS transistor,
10...EX, -N OR circuit, 11 ・O
R circuit, 12... Inverter circuit, 20.21...
Bidirectional transfer gate circuit, 30...Liquid crystal common electrode drive circuit, 31...Liquid crystal segment electrode drive circuit, 32...
・Frequency divider circuit. Patent applicant Matsushita Electric Industrial Co., Ltd.
Claims (1)
出力を分周回路に接続し、該分周回路の出力は、Pチャ
ンネルMOSトランジスタのドレインとNチャンネルM
OSトランジスタのドレインとを接続し、かつゲートを
共通にした、いわゆる共通電極駆動信号の第1の出力駆
動回路の前記共通にしたゲートに接続すると共に、前記
第1の出力駆動回路と同一の構成を有する第2の出力駆
動回路の共通にしたゲートに出力側を接続した排他的論
理和の否定回路(EX−NOR)に、データ入力と共に
別の入力端子にそれぞれ接続し、また、電源端子と前記
第1、第2の出力駆動回路のPチャンネルMOSトラン
ジスタのソース、および接地端子と前記第1、第2の出
力駆動回路のNチャンネルMOSトランジスタ間にそれ
ぞれ転送ゲートを介して接続し、前記転送ゲートをスタ
ンバイ信号で入り切りする構成としたことを特徴とする
液晶表示駆動装置。The output of the OR circuit that inputs and connects the input signal and standby signal is connected to a frequency dividing circuit, and the output of the frequency dividing circuit is connected to the drain of the P channel MOS transistor and the N channel M
A common electrode drive signal is connected to the drain of the OS transistor and has a common gate, and is connected to the common gate of the first output drive circuit of a so-called common electrode drive signal, and has the same configuration as the first output drive circuit. An exclusive OR inverting circuit (EX-NOR) whose output side is connected to a common gate of a second output drive circuit having a data input terminal and a separate input terminal, and a power supply terminal and The sources and ground terminals of the P-channel MOS transistors of the first and second output drive circuits are connected via transfer gates between the N-channel MOS transistors of the first and second output drive circuits, and A liquid crystal display drive device characterized by having a configuration in which a gate is turned on and off by a standby signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2997889A JPH02210492A (en) | 1989-02-10 | 1989-02-10 | Liquid crystal display driving device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2997889A JPH02210492A (en) | 1989-02-10 | 1989-02-10 | Liquid crystal display driving device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02210492A true JPH02210492A (en) | 1990-08-21 |
Family
ID=12291051
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2997889A Pending JPH02210492A (en) | 1989-02-10 | 1989-02-10 | Liquid crystal display driving device |
Country Status (1)
Country | Link |
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JP (1) | JPH02210492A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1083540A2 (en) * | 1999-09-10 | 2001-03-14 | Nec Corporation | Liquid crystal display device |
WO2001084226A1 (en) | 2000-04-28 | 2001-11-08 | Sharp Kabushiki Kaisha | Display unit, drive method for display unit, electronic apparatus mounting display unit thereon |
JP2001312253A (en) * | 2000-04-28 | 2001-11-09 | Sharp Corp | Driving method for display device and display device using the same and portable equipment |
US6795066B2 (en) | 2001-01-12 | 2004-09-21 | Sharp Kabushiki Kaisha | Display apparatus and driving method of same |
WO2005006302A1 (en) * | 2003-07-09 | 2005-01-20 | Sony Corporation | Flat display device and integrated circuit |
JP2008233925A (en) * | 2000-10-05 | 2008-10-02 | Sharp Corp | Method for driving display device, display device using same and portable device mounted with display device |
JP2015146029A (en) * | 2009-11-30 | 2015-08-13 | 株式会社半導体エネルギー研究所 | display device |
-
1989
- 1989-02-10 JP JP2997889A patent/JPH02210492A/en active Pending
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1083540A3 (en) * | 1999-09-10 | 2002-10-09 | Nec Corporation | Liquid crystal display device |
EP1083540A2 (en) * | 1999-09-10 | 2001-03-14 | Nec Corporation | Liquid crystal display device |
US7286108B2 (en) | 2000-04-28 | 2007-10-23 | Sharp Kabushiki Kaisha | Display device, method of driving same and electronic device mounting same |
JP2001312253A (en) * | 2000-04-28 | 2001-11-09 | Sharp Corp | Driving method for display device and display device using the same and portable equipment |
WO2001084226A1 (en) | 2000-04-28 | 2001-11-08 | Sharp Kabushiki Kaisha | Display unit, drive method for display unit, electronic apparatus mounting display unit thereon |
US7321353B2 (en) | 2000-04-28 | 2008-01-22 | Sharp Kabushiki Kaisha | Display device method of driving same and electronic device mounting same |
US7924276B2 (en) | 2000-04-28 | 2011-04-12 | Sharp Kabushiki Kaisha | Display device, method of driving same and electronic device mounting same |
JP2008233925A (en) * | 2000-10-05 | 2008-10-02 | Sharp Corp | Method for driving display device, display device using same and portable device mounted with display device |
US6795066B2 (en) | 2001-01-12 | 2004-09-21 | Sharp Kabushiki Kaisha | Display apparatus and driving method of same |
WO2005006302A1 (en) * | 2003-07-09 | 2005-01-20 | Sony Corporation | Flat display device and integrated circuit |
US7696989B2 (en) | 2003-07-09 | 2010-04-13 | Sony Corporation | Flat display apparatus and integrated circuit |
JP2015146029A (en) * | 2009-11-30 | 2015-08-13 | 株式会社半導体エネルギー研究所 | display device |
US10847116B2 (en) | 2009-11-30 | 2020-11-24 | Semiconductor Energy Laboratory Co., Ltd. | Reducing pixel refresh rate for still images using oxide transistors |
US11282477B2 (en) | 2009-11-30 | 2022-03-22 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device, method for driving the same, and electronic device including the same |
US11636825B2 (en) | 2009-11-30 | 2023-04-25 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device, method for driving the same, and electronic device including the same |
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