JPS58184749A - 半導体用リ−ドピンのろう付方法 - Google Patents

半導体用リ−ドピンのろう付方法

Info

Publication number
JPS58184749A
JPS58184749A JP57068209A JP6820982A JPS58184749A JP S58184749 A JPS58184749 A JP S58184749A JP 57068209 A JP57068209 A JP 57068209A JP 6820982 A JP6820982 A JP 6820982A JP S58184749 A JPS58184749 A JP S58184749A
Authority
JP
Japan
Prior art keywords
brazing
plated
ceramic substrate
lead
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57068209A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0226787B2 (OSRAM
Inventor
Hitoshi Tsuji
斉 辻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Kikinzoku Kogyo KK
Original Assignee
Tanaka Kikinzoku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Kikinzoku Kogyo KK filed Critical Tanaka Kikinzoku Kogyo KK
Priority to JP57068209A priority Critical patent/JPS58184749A/ja
Publication of JPS58184749A publication Critical patent/JPS58184749A/ja
Publication of JPH0226787B2 publication Critical patent/JPH0226787B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H05K3/3426—Leaded components characterised by the leads
    • H05K3/3465—

Landscapes

  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP57068209A 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法 Granted JPS58184749A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57068209A JPS58184749A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57068209A JPS58184749A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Publications (2)

Publication Number Publication Date
JPS58184749A true JPS58184749A (ja) 1983-10-28
JPH0226787B2 JPH0226787B2 (OSRAM) 1990-06-12

Family

ID=13367172

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57068209A Granted JPS58184749A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Country Status (1)

Country Link
JP (1) JPS58184749A (OSRAM)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003072288A1 (de) * 2002-02-28 2003-09-04 Infineon Technologies Ag Verbindung mit einer diffusionslotstelle und verfahren zu ihrer herstellung

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003072288A1 (de) * 2002-02-28 2003-09-04 Infineon Technologies Ag Verbindung mit einer diffusionslotstelle und verfahren zu ihrer herstellung
US7368824B2 (en) 2002-02-28 2008-05-06 Infineon Technologies Ag Diffusion solder position, and process for producing it

Also Published As

Publication number Publication date
JPH0226787B2 (OSRAM) 1990-06-12

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