JPS58176696A - Effect generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sound generation device flK, and more particularly to a sound effect generation device flK suitable for generating and simulating irregular sounds such as the sound of a large number of people clapping, the sound of the wind, and footsteps of rain.

Conventionally, sound effect generators have generally recorded actual sounds on magnetic tape or the like and reproduced them.

However, tape recorders that record on and play back magnetic tape use mechanical parts such as motors to run the tape, and often break down due to wear and tear on these parts. Furthermore, the magnetic tape itself could not be used permanently once it was recorded due to wear and tear with the magnetic head.

Other sound effect generators are synthesized by combining various oscillation circuits using electronic components, but since they are electronic circuits, there is no risk of failure due to wear and tear on mechanical parts, but the synthesized sound effects are far from the actual sound. It was unpopular. Especially the sound of many people clapping, and sounds of the natural world, such as the sound of waves and wind.

He was not good at hearing the sound of footsteps in the rain.

The purpose of the present invention is to create the sound of many people clapping, the sound of waves in the natural world, and the sound of the wind, which was impossible with conventional technology.

To provide a sound effect generating device which generates irregular sounds such as the sound of footsteps in the rain by an economical means.

In order to achieve this object, the present invention provides a read-only memory (hereinafter referred to as ROM) means in which a sound such as a short-time clap sound is converted into PCM and its information is digitally encoded and recorded, and a read-only memory (hereinafter referred to as ROM) means which sequentially reads out this digital code. A means for D/A converting to an analog signal, an address signal generating means for providing a ROMK address signal, and an M sequence signal generating means are provided, and the lower address of the previous ROM is converted into an upper address M sequence by the address signal means. The previous RO by giving a signal by means of generating
The purpose is to generate a short time clap sound recorded by MVC as if it were a long time clap sound.

The present invention will be explained below with reference to Examples. FIG. 1 is a block diagram showing an embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a read-only memory (hereinafter referred to as sound effect recording ROM) for recording sound effects (hereinafter abbreviated as sound effect recording ROM) in which a part of a sound, for example, the sound of many people clapping, is converted into PCM and the information is recorded in advance in digital code. is a digital-to-analog converter (hereinafter referred to as a router converter) that converts the digital code read from the sound effect recording ROM into an analog signal; S is a binary C1 bit) that generates a pseudo-random time series; 4 is an address signal generating circuit, and 5 is a clock signal generating circuit.

In order to explain the operation of FIG. 1, FIG. 2 shows concrete circuits of the M-sequence signal generation circuit 3 and the address signal generation circuit 4 in the embodiment of FIG. 1. In FIG. 2, the same symbols as in FIG. 1 indicate the same things, 5-1, 5-2, 5-
5, 5-4.

3-5 is a shift register, 6-6 is an exclusive OR circuit,
4-1. 4-2.4-5.4-4.4-5 is a T-shaped frig 70 tube circuit. Shift register 5-1, 5
-2, 5-5, 3-4.

3-5 and the exclusive OR circuit constitute an M-sequence signal generation circuit, and T-type flip-flop circuits 4-1, 4-2, 4-
5, 4-4, and 4-5 constitute address signal generation circuits. In this case, the 1st address signal generation circuit 4 becomes a 5-bit binary counter.

Furthermore, the M-sequence signal generation circuit 3 outputs a binary random time series whose period is 21-1 = 51 unit times, where one unit time is the clock signal period of the shift register.

Figure 6 shows the signal path 51, 41°42 of Figures 1 and 2.
, 51, which directly shows the timing relationship.

In FIG. 5, (al is a signal waveform diagram of the signal path 51, (
h) is a signal waveform diagram of signal path A1, which is one signal path of signal path 41, and (C) is a signal waveform diagram of signal path A2, which is one signal path of signal path 41.
The No. 1 waveform -1 (d) is the signal 12 which is one signal path of the signal path 41! Signal waveform diagram of IAs, (a) is signal-V5 path 4
Signal waveform diagram of signal path A4 of 1, ((l is signal path 42
and (A) is a signal waveform diagram of the signal path A5, which is one signal path of the signal path 41. .

The detailed operation of FIG. 1 will be explained. Sound effect recording ROM 1
In the PCM version, a portion of a large number of clapping sounds is encoded into a digital signal and recorded in advance. For the sake of explanation, it is now assumed that the waveform shown in FIG. 4 is recorded. For example, if this waveform is set to the sampling frequency IDK
Sampling is performed at Hz and 8-bit quantization. In Fig. 4, the points marked with * indicate sampling points.

The numbers at the bottom indicate the addresses at which the sound effects were recorded in the ROM. In this case, the required capacity of the sound effect recording ROM is 64×8:512 bits since the sampling points are 64 and the quantization number is 8 pits. 8 bytes
In terms of bits, it has a capacity of 64 bytes. This value can be sufficiently recorded in a 1-byte ROM that is already in practical use.

The clock signal generation circuit 5 generates a clock signal at a sampling frequency. This signal is input to the address signal generation circuit 4 through the signal path 51. (The signal waveform diagram in FIG. 2 (α) represents the clock signal.) Address signal generation circuit 4
The 05-bit binary counter is counted up by the clock signal. Output @ route of address signal generation circuit 4,
The signal waveforms of 41, A2, A5, A4, and As are shown in Fig. 2 IA), (C), (di, (gl,
(f), which are the four LSB4R of the address signal for the sound effect recording ROM. Output signal path 42 of address signal generation circuit 4 (this is the same as output signal path A5)
is connected to the M-series signal generation circuit 5. The M-sequence signal generation circuit 3 sends the signal shown in FIG. 2A (this is the same as the signal shown in FIG.
The j signal shown in FIG. 2 (Al) is output to the signal path 31 as the clock signal of -5. The signal shown in FIG.
-2 are the same ("0", 3-5 are the same ("0", 5-4 are the same °0°, 3-5 are the same <11°). Figure 2 [Waveform of A1] depends on the initial contents of the shift register, but all are binary pseudo-random time series.

The output signals (signal path 41 and signal path 51) of the address signal generation circuit 4 and the M-sequence signal generation circuit 3 are the sound effect recording R
Give the OM1WC sequential addresses and output the encoded recorded sound in digital format.

The repetition frequency of the address signal is the previous sampling frequency 1
It is 0Uz. Therefore, 8-bit digitized recorded sounds are outputted in parallel every 100 μI (10 KH2) to the signal path 11 which is the output of the sound effect recording ROM. Next, this 8-bit signal with an interval of 100 μI is converted into an analog signal Kf by a D/A converter 6. Thereafter, in order to prevent aliasing noise due to quantization, the signal is input to a 51 Jz low-pass filter 6, amplified by an amplifier 7, and output to an output terminal 8.

The address of the sound effect recording ROM is given by 6 bits, the signal path 51 represents the MSB of this address, and the signal path A5 . ...
, A1 represents the other 5-bit address, and the signal path A
1 represents the LSB of this address.

Now, the signal waveform of the signal path 31 is shown in FIG.
When the value is a pseudo-random time series, the sound effect recording ROM
The output waveform of is shown in the same figure (bIK). This is because the address of the lower 5 bits excluding the MSB of the sound effect recording ROM is given by the signal path 41 (-g'', that is, the 5-bit binary counter output). .

This is when the address number 0 to 51 CMSR is 10@)
and 31 to 65 (when MSE is 1°), and Fig. 5 (This is because the signal of al corresponds to the MSB. The numbers shown below bl are the sound effect records. R.O.
It shows the address number of M.

For comparison, let us now consider the case where the 6-bit address of the sound effect recording ROM is given as the output of a 6-bit binary counter.

In this case, according to the above explanation, the output waveform of the sound effect recording ROfi will be as shown in FIG.

Comparing the waveforms in Fig. 5(b) and Fig. 6, Fig. 6 shows periodicity (corresponding to address numbers 0 to 65, 1004.
? x 64 = 44 cycles).

FIG. 5 (It is clear that bl has no periodicity.

When obtaining a sound effect similar to irregular noise, such as the sound of multiple people applauding, the present invention can greatly reduce the capacity of the recording ROM. By the way, if you consider simply recording the clap/sound to ROM under the same conditions as used for WcB Akira, a 5 second clap sound would be 10fffz x 8 bits x
5 seconds = 400 f bits = 5 of bytes of capacity. In comparison, the present invention requires only 64 bytes.

In this example, the M-sequence signal is 65 x 100 μp x
It has a period of 64 points - 198 ml, but if the number of shift registers in the 1M series signal generation circuit is increased, this period will become longer in proportion to the power of the number, so in order to ignore the periodicity of 198 m &, it is sufficient to increase the number of shift registers. .

Further, in this embodiment, the most significant bit of the address signal output signal of the 1st address signal generation circuit w14 is used as the shift register clock signal of the M-series signal generation circuit 5, but the present invention is not limited to this. , an independent clock signal generation circuit with a different frequency may be provided, and this may be used as the shift register clock signal of the M-series signal generation circuit 3.

Furthermore, in this embodiment, there is only one M-sequence signal generating circuit 3, but it is obvious that a plurality of these may be prepared and a structure may be adopted in which the upper address of the sound effect recording ROM 1 is inputted.

Furthermore, the M-series signal generation circuit 5 has been shown to use a shift register and an exclusive OR circuit.

Any structure that outputs a binary pseudo-random time series may be used.

Furthermore, although the address signal generating circuit 4 is a binary counter using a T-type flip-flop, the present invention is not limited to this, and any circuit that generates an address signal may be used.

In addition, digital encoding to the sound effect recording ROM is performed using the PCM method, but is not limited to this method; delta pcM, ADpC
An information compression method such as M or a parameter encoding method such as pARcOR may be used. Also as a recording medium.

In addition to read-only semiconductor memory, there is also bubble memory, RAM with nonvolatile cells, and semiconductor RAM memory K.

It is also possible to use means for temporarily recording data from a cheap diskette or floppy disk.

As described above, according to the present invention, it is possible to economically generate sounds that sound irregular, such as the applause of a large number of people, the sound of waves in nature, and the sound of the wind, with a very small recording capacity (amount of information).

[Brief explanation of the drawing]

Figure 1 shows one embodiment of the present invention! Figure 2 shows the first
The specific circuit diagram in Figure 86 shows the signal path 51°41.42.
51Q signal generation diagram, FIG. 4 is a recording waveform diagram of the sound effect recording ROM, FIG. 5 is a signal waveform diagram of the signal path 61 and signal path 11, and FIG. 6 is for showing the effects of the present invention. FIG. 3 is a signal waveform diagram of the signal path 11 of FIG. 1...Sound effect recording ROM 2...Luta converter 5.
...M series signal generation circuit 4...Address signal generation circuit Patent attorney Susuki 1) Ri 4-

Claims (1)

[Scope of Claims] It has eleven or more pseudo-random time series signal generating means, a memory for recording digital codes, and an address signal generating means for generating an address signal of the memory, and among the addresses of the memory, The upper address is generated by the pseudo random time series signal generating means,
A sound effect generating device characterized in that a lower address is given by the address signal generating means. 2. The sound effect generating device according to claim 1, wherein the pseudo-random time-series signal generating means is an M-sequence signal generating means. 5. The sound effect generating device according to claim 2, wherein the address and other signal generating means is a binary counter.