JPS58171543U - code input device - Google Patents
code input deviceInfo
- Publication number
- JPS58171543U JPS58171543U JP6672882U JP6672882U JPS58171543U JP S58171543 U JPS58171543 U JP S58171543U JP 6672882 U JP6672882 U JP 6672882U JP 6672882 U JP6672882 U JP 6672882U JP S58171543 U JPS58171543 U JP S58171543U
- Authority
- JP
- Japan
- Prior art keywords
- bit
- input device
- code input
- setting
- predetermined state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Input From Keyboards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
1 第1図は本考案の1実施例に係わるコード入力装
置あ構成を示すブロック回路図、そ′して第2図は第1
図の装置における各信号間の関係を示す説明図である。
1、 2. 3. 4. 5. 6. 7. 8・・・
・・・スイッチ、9、 10. 11. 12・・・・
・・排他的論理和ゲート、13・・・・・・アンドゲー
ト、sl、 s2. s3. s4゜S5. S6.
S7.3B・・・・・・設定信号、Fl、 F2゜F3
.、F4・・・・・・出力コード信号、E・曲・設定無
効信号。1. FIG. 1 is a block circuit diagram showing the configuration of a code input device according to an embodiment of the present invention, and FIG.
It is an explanatory view showing the relationship between each signal in the device of the figure. 1, 2. 3. 4. 5. 6. 7. 8...
...Switch, 9, 10. 11. 12...
...Exclusive OR gate, 13...And gate, sl, s2. s3. s4゜S5. S6.
S7.3B...Setting signal, Fl, F2°F3
.. , F4...Output code signal, E/song/setting invalid signal.
Claims (1)
いて、該コード入力装置に、コード信号の各ビット対応
にそれぞれ複数個の2値スイツチ、および各ビットに対
応する2−値スイッチが各ビットごと一子め定められた
状態または予め定められた他の状態にセットされている
ことを検出するゲート回路を設け、各ビットに対応する
複数個の2値スイツチの内の1個の2値スイツチの設定
状態に応じて対応するビットのツー下信号を出力すると
ともに、少なくとも1つのビットに対応する2値スイツ
チが前記予め定められた状態または予め定められた他の
状態にセットされていないとき設定が無効であることを
示す設定無効信号を出力することを特徴とするコード入
力装置。In a code input device that outputs a coid signal of multiple bits, the code input device includes a plurality of binary switches corresponding to each bit of the code signal, and a binary switch corresponding to each bit for each bit. A gate circuit is provided to detect that the bit is set to a predetermined state or another predetermined state, and one of the plurality of binary switches corresponding to each bit is activated. Outputs a two-down signal of the corresponding bit according to the setting state, and when the binary switch corresponding to at least one bit is not set to the predetermined state or another predetermined state, the setting is A code input device characterized in that it outputs a setting invalidation signal indicating that the setting is invalid.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6672882U JPS58171543U (en) | 1982-05-10 | 1982-05-10 | code input device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6672882U JPS58171543U (en) | 1982-05-10 | 1982-05-10 | code input device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58171543U true JPS58171543U (en) | 1983-11-16 |
JPS6220020Y2 JPS6220020Y2 (en) | 1987-05-22 |
Family
ID=30076589
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6672882U Granted JPS58171543U (en) | 1982-05-10 | 1982-05-10 | code input device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58171543U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01112433A (en) * | 1987-10-27 | 1989-05-01 | Fujitsu Ltd | Data checking system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5460430U (en) * | 1977-10-05 | 1979-04-26 | ||
JPS56108153A (en) * | 1980-01-30 | 1981-08-27 | Toshiba Corp | Check device for data setting switch |
-
1982
- 1982-05-10 JP JP6672882U patent/JPS58171543U/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5460430U (en) * | 1977-10-05 | 1979-04-26 | ||
JPS56108153A (en) * | 1980-01-30 | 1981-08-27 | Toshiba Corp | Check device for data setting switch |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01112433A (en) * | 1987-10-27 | 1989-05-01 | Fujitsu Ltd | Data checking system |
Also Published As
Publication number | Publication date |
---|---|
JPS6220020Y2 (en) | 1987-05-22 |
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