JPS58170215A - Start circuit for pseudo random pattern generator - Google Patents

Abstract

PURPOSE:To obtain a start circuit for PN code generator not requiring phase matching from each FF even at high frequncies, by inputting an output of a pseudo random pattern generator PN to an integration means and discriminating the output of the integration means at a discriminating means. CONSTITUTION:A low-pass filter 6 is provided with an integration function, and a capacitor is charged in acordance with ''1'' outputted from FFs 1-1-6. When an output of the FFs 1-1-6 is impressed to the filter 6, the output of the filter 6 is a voltage about half the voltage corresponding to ''1'' and ''0'' normally. When the output of the filter 6 reaches a threshold value or below, ''0'' is outputted from a discriminator 7 and the FF1-1 is set to ''1''. Thus, the FFs 1-2- 6 go to ''1'' sequentially and when the FFs 1-1-6 go to all ''1'', the output of the filter 6 is increased more than the threshold value, the set input to the FF1-1 is released and the pseudo random pattern generator goes to the normal operation.

Description

Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to a start circuit for a pseudo-random pattern generator, and particularly to a start circuit for a pseudo-random pattern generator in an extremely high frequency range. The present invention relates to a start circuit for a pseudo-random pin generator that can generate a start signal by an extremely simple means without adjusting the phase of signals from flip-flops in each stage.

(2) Background of the Technology For example, in order to measure the operating state of a transmission line, random patterns are sent out and the error occurrence state is measured. In order to obtain a random pattern at this time, a pseudo-random pattern generator (hereinafter referred to as a PN generator) is used. This PN generator is constructed so that the number of stages of the flip 70 tubes (hereinafter referred to as 1F) which constitutes the generator is 2% - 1 (when the number of stages is deaf) different patterns are generated.

1st wAK The PN generator shown in FIG. 1, which is an example of a conventional PN generator, is based on six stages of FFl-1 to F'FI-6 and an exclusive OR circuit (hereinafter referred to as ilOR) 2. Since it has multiple configurations, it generates a 2-1 pattern. In this case, the exclusive 1Iiii logical sum of the outputs of FF1-5 and FF1-6 is obtained by ]1iOR2, and then FF1- 1 is set to ``1'' or ``0'', and the value set in FF1-1 is used as the clock C.
The signal is sequentially transmitted to FPI-2 to FPI-6 by L, and as a result, 92'-1 patterns are outputted from the output direction OUT.

However, in this PN generator, FFl-1~li'F1-
When all 6 are set to 0, gonz is set to 0.
” is output, but there is no change in the generated pattern, and it is no longer possible to generate a pseudo pattern. Therefore, by setting "1" to one FF suitable for "1'", the PN generator can output the desired PN code again. Therefore, when all of PFl-1 to FFl-6 are set to "0", that one FFKr I
A start circuit is required to set J.

Therefore, as shown in Fig. 1, the conventional start circuit 3 inputs the outputs of each PFI-1 to FFl-6 to the OR circuit 4, and all FFl-1 to FFl-6 are set to "0". When the
It was applied to the set terminal 8ET of No. 1. This FPI-1
is set terminal 8BT K “1 when OJ is input.
” and outputs this, so when “0” is output from the OR circuit 4, F F
Since 1-1 becomes "]", the PN generator can output a PN code again.

(3) Problems with the conventional technology However, in such a conventional start circuit 3, each FF
Since it is necessary to transmit the outputs of 1-1 to FF1-6 to the OR circuit 4, the following difference exists.

In other words, the outputs of each FFl-1 to FFl-6 are connected to the OR circuit 4.
The wiring is required to transmit the information to the

There is no problem when the frequency is low, but when the frequency is high (rl of each PFI-1 to FFl-6), it becomes very difficult to accurately match the states of fO.

For example, at 100 MHz, one period is 10 ss, and at 200 MHz, one period is as short as 5%. If the pattern is run for 2 ocILs on the transmission path, a delay of 1-I will occur. Therefore, each FFl-1-F
It is difficult to bring out the output lines of F1-6 to the OR line and perform an OR match to match the phases. This difficulty becomes even more complicated when the number of stages of the PF increases and K becomes larger, for example, 15 stages or 20 stages, and the implementation becomes extremely complicated. When operating at high speeds, malfunctions may occur due to variations in delay time of the FF or OR circuit.

(4) Purpose of the Invention The purpose of the present invention is to improve the above-mentioned problems and to provide a PN that does not require phase alignment of signals from each FF even in the high frequency region.
An object of the present invention is to provide a start circuit for a code generator.

(5) Structure of the Invention In order to achieve this object, in the start circuit for a PN code generator of the present invention, an integral and a discriminator, the output of the pseudo-random pattern generator is input to the integrating means, the output of the integrating means is discriminated by the discriminating means, and the pseudo-random pattern generator is configured based on the output of the discriminating means. It is characterized in that it starts at t.

(6) Examples of the invention An embodiment of the present invention will be explained between songs based on FIG.

In FIG. 2, the same reference numerals as in FIG. 1 indicate the same parts,
5 is a start circuit, which includes a low-pass filter 6 and a discriminator 7.
Equipped with: In addition, in Fig. 2, PFI-1 to PFI-1
FI-6 and BOR2i, like the top view 1, constitute a K PN generator and are a masterpiece.

The low-pass filmo is equipped with an integral function, and FFL-
When "1" is output from 5, the capacitor t is charged in response to this rlJ. When the PN generator is operating normally, its mark rate is 1/! in g%-1/2%-1! It is. Here, % indicates the number of FF stages, t PN
The generator does not start and the mark rate is 0 if all FPs are "0".

For this reason, if the output of the PN generator and the output of FF1-6 (t#) are applied to the low-pass filter 6, the output of the low-pass filter 6 will be in phase with the corresponding voltages of "1" and "0" under normal conditions. Approximately 1/ of the corresponding voltage of the summation knob "1" and "0"! becomes. However, if it has not started, “0
” is the voltage corresponding to . Therefore, 5 For example, if the voltage corresponding to "1" is Vl and the voltage corresponding to "0" is V., the center of these two voltages (v, -Vl)/2
A discriminator 7 configured by a voltage comparator with a threshold value V4 of
to the output of Lohas filter 6! ! Subsequently, if the discriminator 7 outputs "0" when the output of the low-pass filter 6 becomes less than the threshold value ■, PFI-111;
” and its output becomes “1”.

Therefore, due to this, the outputs of the other FFl-2 to FFl-5 also become "l", and by the way, the discriminator 7 shows that the outputs of the other PFI-1 to FFl-6 are all "1" K. Until it is set, the output of the low-pass filter 6 continues to output "0" because it is smaller than the threshold value ■5.

Therefore, FFl-1~l? When F1-6 becomes all "1", the input of low-pass filter 6 becomes all "1".
Therefore, after a certain period of time, the level rises above the threshold V4 and changes to the level ``1'' of ``1'', and the set input of FF1-1 is canceled. After this, the #iPN generator returns to normal operation.

Of course, in reality, the threshold value VA etc. will be appropriately selected experimentally or statistically.

(7) Effects of the Invention According to the present invention, it is possible to obtain a start circuit that operates only by monitoring the output of the PN generator.

Therefore, each FF constituting the PN generation circuit as in the conventional
Since it is possible to eliminate the need for an OR circuit that uses the output of , it is possible to easily construct a start circuit for a PN generator that operates accurately even in a very high frequency range.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional PN generation circuit and its start circuit, and FIG. 2 is a block diagram of an embodiment of the present invention. In the figure, 1-1 to 1-6 are flip-flops, 2 is an exclusive-reason circuit, 3 is a start circuit, 4tl OR circuit, 5F
! , a start circuit, an lj close filter, and 7 a discriminator. Patent Applicant Fujitsu Limited Representative Patent Attorney Akira Yamatani

Claims (1)

[Claims] (1) In a start circuit that includes a plurality of stages of flip-flop circuits and starts a nine pseudo-random pattern generator, an integrating means and a discriminating means are provided, and the output of the pseudo-random pattern generator is input to the integrating means and the output is integrated. A start circuit for a pseudo-random pattern generator, characterized in that the output of the means is discriminated by the discriminating means, and the pseudo-random pattern generator is started based on the output of the discriminating means.