JPS58166745A - Sealing method for chip carrier - Google Patents

Sealing method for chip carrier

Info

Publication number
JPS58166745A
JPS58166745A JP5075982A JP5075982A JPS58166745A JP S58166745 A JPS58166745 A JP S58166745A JP 5075982 A JP5075982 A JP 5075982A JP 5075982 A JP5075982 A JP 5075982A JP S58166745 A JPS58166745 A JP S58166745A
Authority
JP
Japan
Prior art keywords
carrier
cap
sealing
adhesive
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5075982A
Other languages
Japanese (ja)
Inventor
Masataka Koyama
小山 正孝
Kyoichi Rikitake
力武 恭一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5075982A priority Critical patent/JPS58166745A/en
Publication of JPS58166745A publication Critical patent/JPS58166745A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/10Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the generation of a pin hole in a sealing section (an adhesive solidifying layer), and to improve the reliability of sealing and yield on manufacture by coating the whole circumferential end surface of the carrier and the sealing bonding section of the carrier and a cap with a two-pack type shaping agent, which does not adhere on the solder pad of the carrier. CONSTITUTION:The shaping agent (such as a two-pack type silicon rubber) is compounded and defoamed, and the layer 12 of the shaping agent is applied and formed onto a metal (such as stainless) plate 11 on which a release agent is applied as shown in the figure. Each thickness of the carrier 2, the cap 4 and the layer 12 of the shaping agent on which adhesives 10 do not adhere is made thicker than that of the carrier 2 and thinner than the stacked thickness of the carrier 2 and the cap 4. Second curing treatment is a process in which adhesives 10 under a semirigid state are cured completely, the metal plate 11, on the cap 4 thereon a weight 13 is placed as shown in the figure, is placed into a high- temperature tank, and adhesives 10 are cured completely through heating for time such as approximately one hr. at a temperature under approximately 200 deg.C.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明はチップキャリヤのシール方法、特にキャップを
気密接着するスペースが狭く限定されたチップキャリヤ
のシール方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method for sealing a chip carrier, and more particularly to a method for sealing a chip carrier in which a space for sealing a cap is narrowly limited.

(b)技術の背景 LSIチップを収納し念各種のパッケージ構造にあって
、グイボンディング技術及びワイヤボンディング技術に
よりチップ素子を搭載し、該素子に形成された電極をパ
ッケージ内の電極に接続してなるチップキャリヤは、組
立て後に電気特性のチェックが可能であや回路基板に実
装する所要面積が少なく、かつ、パンダを形成させるが
如!特別な技術を必要としない利点を有する。しかし、
ハイブリッド技術の一環として発展し九チップキャリヤ
を、同種の目的で開発されたフィルムキャリヤと比較し
たとき、チップキャリヤ、41に搭載素子を密閉するキ
ャップを有するチップキャリヤはやや大形化されるため
、キャップ接着スペースをなるべく小さくしたいという
要望が強かった。
(b) Technology Background LSI chips are housed in various package structures, and chip elements are mounted using Gui bonding technology and wire bonding technology, and electrodes formed on the elements are connected to electrodes inside the package. This chip carrier allows for electrical characteristics to be checked after assembly, requires less surface area for mounting on a circuit board, and can be used to form pandas! It has the advantage of not requiring special technology. but,
When comparing the nine-chip carrier developed as part of hybrid technology with the film carrier developed for the same purpose, the chip carrier, which has a cap for sealing the mounted element on the chip carrier 41, is slightly larger. There was a strong desire to reduce the cap bonding space as much as possible.

(c)従来技術と問題点 第1図は2債の高密度チップ素子1を搭載するように小
形化設計されたチ・、・プキャリャ2の側断面図であり
、ダイボンディングにより搭載された素子1の電極(図
示せず)とキャリヤ上面に形成された電極(図示せず)
とを金属細線3で接続(ワイヤボンディング)したのち
、キャリヤ2の上面に素子1t−覆うキャップ4がエポ
キシ系接着剤にて接着されている。なお、キャリヤ2の
周端面5には第2図に拡大して示す如く、半円形#R面
の凹部にはんだパッド6を被着し、はんだパッド6はキ
ャリヤ上面に形成した導体パターン7及び金属細+13
を介して素子1に接続される。
(c) Prior art and problems Figure 1 is a side sectional view of a chip 2 designed to be miniaturized to mount two high-density chip elements 1, and the elements mounted by die bonding. 1 electrode (not shown) and an electrode formed on the top surface of the carrier (not shown)
After connecting them with a thin metal wire 3 (wire bonding), a cap 4 covering the element 1t is bonded to the upper surface of the carrier 2 using an epoxy adhesive. As shown in an enlarged view in FIG. 2, the peripheral end surface 5 of the carrier 2 is covered with a solder pad 6 in the recessed part of the semicircular #R surface. Thin +13
is connected to element 1 via.

かかるキャリヤ2において キャップ4の外縁端面がキ
ャリヤ2の上面の周縁部処気密接着するための@Aが必
要でちり、前記接着はキャップ4を所定の押圧力でキャ
リヤ2に押付は表から加熱するため、軟化して押され九
接着剤がキャリヤ凹部に流れ込みはんだパッド6を覆う
ことのないように、接着幅Aを約0.8−以上とし、か
つ、接着剤の童を厳しくコントロールする必要があった
In such a carrier 2, the outer end surface of the cap 4 is required to be air-tightly attached to the peripheral edge of the upper surface of the carrier 2, and the adhesion is performed by pressing the cap 4 against the carrier 2 with a predetermined pressing force by heating it from the front side. Therefore, it is necessary to set the adhesive width A to approximately 0.8 mm or more and to strictly control the adhesive thickness so that the adhesive does not soften and flow into the carrier recess and cover the solder pad 6. there were.

従って、キャリヤ2にキャップ4を接着する作業が困難
となり、その生部効率及び製造歩留りが損なわれていた
Therefore, the work of adhering the cap 4 to the carrier 2 has become difficult, and the efficiency and manufacturing yield have been impaired.

(d)発明の目的 本発明の目的は上記欠点を除去し九チップキャリヤのシ
ール(キャップcn着)方法を提供することである。
(d) OBJECTS OF THE INVENTION The object of the present invention is to eliminate the above-mentioned drawbacks and to provide a method for sealing (cn capping) a nine-chip carrier.

(e)  発明の構成 上記目的は、周縁端wK熱硬化性接着剤が塗着されたキ
ャップをチップキャリヤに積載する工程と、該接着剤を
半硬化させる工程と、鋏中ヤリャとキャップ並びにキャ
リヤのはんだパッドとに接着しない2液性の型jlD剤
にてキャリヤの全周端面並びにキャリヤと中ヤップとの
シール接着部を被覆する工程と、適宜の押圧力を咳キャ
リヤとキャップとの接着INK付加して咳接着剤を完全
硬化させる工程と、該被覆し九11取抄剤を剥離する工
11にてなることを特徴としたチップキャリヤのシール
方法により達成される0 1f)発明の実施例 以下、本発明方法會菖1wIに示すチップキャリヤとキ
ャップとの接着に適用した一実施例に係わる主要工程を
示す第3図と、該主要工程の説明図である第4図〜第9
図を用いて本発IjlIを説明する。
(e) Structure of the Invention The above objects include a step of loading a cap coated with a peripheral edge wK thermosetting adhesive onto a chip carrier, a step of semi-curing the adhesive, and a step of loading a cap coated with a thermosetting adhesive onto a chip carrier. A process of coating the entire circumferential end surface of the carrier as well as the seal bonding area between the carrier and the inner cap with a two-component type JLD agent that does not adhere to the solder pads, and applying an appropriate pressing force to bond the cough carrier and the cap. 01f) Embodiment of the invention achieved by a method for sealing a chip carrier characterized by the steps of adding and completely curing the adhesive and peeling off the coating agent. Below, FIG. 3 shows the main steps related to an embodiment applied to adhesion between a chip carrier and a cap shown in the method of the present invention, and FIGS. 4 to 9 are explanatory diagrams of the main steps.
The present IjlI will be explained using figures.

第3図は第1図に示す如きチップキャリヤ(匂にキャッ
プ(4をシール接着する工檻図で1りa、チップ素子(
1) tダイボンディングにて搭載し金属細線(3)に
よる接続を終ったキャリヤ2は第4図に示す如く、キャ
リヤ2の外部寸法に等しい寸法で雌型剤を塗布しえ治具
9の挿入孔8に挿入する0とともに、第5図に示す如く
キャップ40屑轍端面に熱硬化性接着剤(例えばシール
用エボ中シ接着剤)10を適量 かつ、むらなく塗着す
る。
Figure 3 is a schematic diagram of the process for sealing and adhering the chip carrier (1a) and the chip element (4) as shown in Figure 1.
1) The carrier 2 that has been mounted by T-die bonding and connected with the thin metal wire (3) is coated with a female molding agent with dimensions equal to the external dimensions of the carrier 2, as shown in Fig. 4, and the jig 9 is inserted. 0 inserted into the hole 8, and an appropriate amount of a thermosetting adhesive (for example, an embossed adhesive for sealing) 10 is evenly applied to the end surface of the scrap track of the cap 40 as shown in FIG.

次いで、チップキャリヤ2にキャップ4を積載する工程
は第6図に示す如く、治具9に挿入されたキャリヤ2の
上にキャップ4を伏載する0その際、キャリヤ2の外部
寸法と同じ外部寸法に加工されたキャップ4は、治具挿
入孔8 K L ) <りと嵌合し、キャリヤ2とキャ
ップ4は上下に揃うようになる。
Next, the step of loading the cap 4 onto the chip carrier 2 is to place the cap 4 face down on the carrier 2 inserted into the jig 9, as shown in FIG. The cap 4, which has been machined to the desired dimensions, is fitted into the jig insertion hole 8 (KL) so that the carrier 2 and the cap 4 are aligned vertically.

次いで、第1次硬化6理は接着剤10に一半硬化させる
工程であり、治具9に挿入されたキャリヤ2の上に積載
されたキャップ4は、治具9とともに例えば約150℃
で約1時間加熱して約7〇−だけ硬化させる0その結果
、キャリヤ2と中ヤップ4は仮付は状態になる〇 他方、型取り剤(例えば2液性シリコンゴム)を調合し
て脱泡したOち第7図に示す如く、雌型剤を塗付した金
属(例えばステンレス)@11の上に型喉り剤の層12
を塗布・形成する0ただし、キャリヤ2とキャップ4及
び接着剤10が接着しない臘取り剤の層12の厚さは、
キャリヤ2の厚さより厚くキャリヤ2とキャップ4t−
重ねた厚さより薄くする。
Next, the first curing step is a step in which the adhesive 10 is semi-hardened, and the cap 4 placed on the carrier 2 inserted into the jig 9 is heated at about 150° C., for example, together with the jig 9.
Heat it for about 1 hour and harden it by about 70℃.As a result, the carrier 2 and the middle coat 4 will be in a temporary condition.On the other hand, prepare a mold removal agent (for example, two-component silicone rubber) and remove it. As shown in Figure 7, a layer of mold throat agent 12 is placed on the metal (e.g. stainless steel) @11 coated with the female mold agent.
However, the thickness of the lint remover layer 12 to which the carrier 2, cap 4, and adhesive 10 do not adhere is as follows:
Carrier 2 and cap 4t- thicker than carrier 2
Make it thinner than the layered thickness.

次いで、第8図に示す如く臘取り剤層120上にキャッ
プ4が仮付けされ治具9から亀山した複数側の中ヤリャ
2を載置し九のち、各キャップ番の上に重り13を載せ
ると第9図に示す如く、各キャリヤ12とキャップ4は
金属[11と重113に挾まれるようになり、キャリヤ
2の全周側端面(第1図の5)及び骸端面のはんだパッ
ド(第2図の6)、並びに接着剤10t−介して接する
キャリヤ2とキャップ4との接合面周囲#ノがm取り剤
層12に埋没して覆われるようKなるO次いで、#E2
次硬化処理は半硬化状態の接着剤10t−完全硬化させ
る工程であり、第9図に示す如くキャップ4の上に重り
13を載せた金属板11を高温槽に入れて、例えば約2
00℃で約1時間加熱して接着剤10′t−完全硬化さ
せる。そして、接着剤10が温度上昇とともに軟化して
から硬化される過sにおいて、接着剤10から発生する
ガス等により固化した接着剤10にピンホールができ、
キャップ4の気密シールを損うことを、前記加熱の過程
中に硬化される型取り剤層12が抑えて防止するように
なる。
Next, as shown in FIG. 8, the cap 4 is temporarily attached on the lint remover layer 120, and the multi-sided inner ring 2 that has been hemmed from the jig 9 is placed on it, and after that, a weight 13 is placed on each cap number. As shown in FIG. 9, each carrier 12 and the cap 4 are sandwiched between the metal [11] and the weight 113, and the end surface of the entire circumference of the carrier 2 (5 in FIG. 1) and the solder pad (5 in FIG. 6) in FIG. 2, and the periphery of the bonding surface # of the carrier 2 and the cap 4 which are in contact through the adhesive 10t is buried and covered by the m-removal agent layer 12. Then, #E2
The next curing process is a process in which 10 tons of adhesive in a semi-hardened state is completely cured, and as shown in FIG.
The adhesive is completely cured by heating at 00 DEG C. for about 1 hour. When the adhesive 10 is softened and then hardened as the temperature rises, pinholes are formed in the hardened adhesive 10 due to gas generated from the adhesive 10.
The molding agent layer 12, which is hardened during the heating process, suppresses and prevents the hermetic seal of the cap 4 from being compromised.

次いで、型取p剤層12とチップキャリヤ2との分離は
、金属板11から型堆夛剤層12を剥離させると、me
り剤層12に付いて各キャリヤ2が金属板11から離さ
れる。そこで、可撓性を有する板状の臘取り剤層12f
:111せる、又は固化するl1IIZ、シ剤層(12
) t@断して、キャップシールの完了したチップキャ
リヤ2が得られる。
Next, the molding p agent layer 12 and the chip carrier 2 are separated by peeling the molding pagent layer 12 from the metal plate 11.
Each carrier 2 is separated from the metal plate 11 by the adhesive layer 12. Therefore, the flexible plate-shaped sludge remover layer 12f
: 111 or solidify l1IIZ, adhesive layer (12
) The cap-sealed chip carrier 2 is obtained by cutting.

なお、使用する型取り剤は型取り剤層12がはんだパッ
ド等に密着する丸めの粘度、例えば型取り剤NJ12の
上に蛾せたキャリヤ2が自然沈下する11fが望ましい
。また、重り13は主として固化した接着剤10が気密
を確保するためのものであり、例えばキャリヤ2とキャ
ップ4との接合面積1aiK付き1.5Kdl直になる
〇(g)  発明の詳細 な説明した如く本発明方法によれば、第1図に示す構成
のチップキャリヤC2にキャップ(4を気密接着(シー
ル)するに必要な接合幅間は従来的0.13mを必要と
し九のに対して約0.6■あれば良いためその差の分だ
けキャリヤ2が小形化されえこと、はんだパッド(6)
Kシール用接着剤(10)が流込まないためはんだパッ
ドの信蛎性と製造歩留りが向上したこと、キャリヤとキ
ャップとのシール部(接着剤固化層)にピンホールが生
じ難いためシールの信頼性及び製造歩留りが向上し九等
の効果を有する。
The molding agent to be used preferably has a viscosity that allows the molding agent layer 12 to adhere to the solder pad etc., for example, 11f, which allows the carrier 2 to sink naturally when placed on top of the molding agent NJ12. In addition, the weight 13 is mainly used to ensure airtightness of the solidified adhesive 10, and for example, the bonding area between the carrier 2 and the cap 4 is 1.5Kdl with a bonding area of 1AiK. According to the method of the present invention, the bonding width required for airtightly adhering (sealing) the cap (4) to the chip carrier C2 having the configuration shown in FIG. 1 is approximately 0.13 m compared to the conventional method. 0.6■ is all that is needed, so the carrier 2 can be made smaller by the difference, and the solder pad (6)
K-seal adhesive (10) does not flow, improving the reliability of the solder pad and manufacturing yield. Also, the reliability of the seal is improved because pinholes are less likely to form in the seal area (adhesive solidified layer) between the carrier and the cap. This improves performance and manufacturing yield, resulting in the 9th grade effect.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はチップ素子を搭載したチップキャリヤにキャッ
プを接着した概略構造を示す側断面図、第2図は前記チ
ップキャリヤの一部の拡大斜視図、第3図は本発明方法
の一実施例に係わる主要工福図、第4〜9図は前記主霞
工椙に係わる説明図である。 なお、図中において1はチップ素子、2はチップキャリ
ヤ、4はキャップ、5はチップキャリヤの側端面、6は
はんだパッド 9は仮接着用治真、10は熱硬化性接着
剤、11は金属板、12は型取り剤層、13は重りを示
す。 v1閃        更20 第3閃 Q 第6図 第V図
FIG. 1 is a side sectional view showing a schematic structure in which a cap is bonded to a chip carrier on which a chip element is mounted, FIG. 2 is an enlarged perspective view of a part of the chip carrier, and FIG. 3 is an embodiment of the method of the present invention. Figures 4 to 9 are explanatory drawings of the main construction plan. In the figure, 1 is a chip element, 2 is a chip carrier, 4 is a cap, 5 is a side end surface of the chip carrier, 6 is a solder pad, 9 is a temporary adhesive, 10 is a thermosetting adhesive, and 11 is a metal. The plate, 12 is a molding agent layer, and 13 is a weight. v1 flash further 20 3rd flash Q Figure 6 Figure V

Claims (1)

【特許請求の範囲】[Claims] 周端面に多数のはんだパッドを形成したチップキャリヤ
にチップ状素子を搭載し、該素子を気密新入するキャッ
プf:該チップキャリヤKI11着する方法であり、周
縁端面に熱硬化性接着剤が塗着され九キャップをキャリ
ヤに積載する工程と、蚊接yII剤を半硬化させ該キャ
リヤと中ヤップとを不十分K11着させる工程と、咳キ
ャリヤとキャップ並びにキャリヤのはんだパッドとに接
着し々い2液性o11取9剤にてキャリヤの全周端叫並
びにキャリヤと中ヤップとのシール接着mt−被覆する
工程と、適宜の押圧力を1償キヤリヤとキャップとの接
着111K付加して#接着剤を完全硬化させる工描と、
誼被覆し丸!1取り剤を剥離する工!1にてなることを
特徴としたチップキャリヤOシール方法〇
A chip-like element is mounted on a chip carrier with a large number of solder pads formed on the peripheral end face, and the element is sealed in a new cap f: This is a method of attaching the chip carrier KI11, and a thermosetting adhesive is applied to the peripheral end face. A step of loading the cap onto the carrier, a step of semi-curing the mosquito repellent and attaching the carrier to the middle cap, and a step of adhering the mosquito repellent to the carrier and the solder pad of the carrier. A process of coating the entire circumference of the carrier with a liquid O11 remover and sealing the carrier and the inner cap, and applying an appropriate pressing force of 111K for adhesion between the carrier and the cap, and #adhesive. The process of completely curing the
Covered circle! 1. Peeling off the removal agent! Chip carrier O-sealing method characterized by 1.
JP5075982A 1982-03-29 1982-03-29 Sealing method for chip carrier Pending JPS58166745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5075982A JPS58166745A (en) 1982-03-29 1982-03-29 Sealing method for chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5075982A JPS58166745A (en) 1982-03-29 1982-03-29 Sealing method for chip carrier

Publications (1)

Publication Number Publication Date
JPS58166745A true JPS58166745A (en) 1983-10-01

Family

ID=12867757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5075982A Pending JPS58166745A (en) 1982-03-29 1982-03-29 Sealing method for chip carrier

Country Status (1)

Country Link
JP (1) JPS58166745A (en)

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