JPS58166520A - Self-clock system of multitrack magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To perform multitrack magnetic recording and reproduction with high performance at low cost by employing a self-clock system which follows up mean variation in the frequency of an input data signal excellently. CONSTITUTION:An analog read signal outputted from a reading head 5 is amplified by a preamplifier 6. The output of the preamplifier 6 is differentiated by a differentiating circuit 7. The output of the differentiating circuit 7 is supplied to a comparing circuit 8, whose output is supplied to a self-clock device 2-0 and a data decision part 3-0. The output of the differentiating circuit 7 is supplied to a comparing circuit 9, whose output is supplied to a time sensor 10. The output of the time sensor 10 is inputted to a format detection part 4. The self-clock device 2-0 extracts a clock from a pulse string outputted from the comparing circuit 8.

Description

Detailed Description of the Invention [Technical Field of the Invention] The present invention relates to a seven-lua clock system in a multi-track magnetic tape device such as a magnetic tape device. This paper relates to improvements to the lure-ri-four-sku method.

Conventionally, as a self-clock system for multi-track magnetic tape devices such as magnetic tape devices, a phase-locked oscillator (PLL circuit) is provided for each track to extract a clock, or a mono-staple, etc., is provided for each track. A self-clocking device was used. Although the former method has sufficient performance, it requires a large amount of material and is expensive.

The latter frame did not have enough margin for frequency fluctuations in the input data.

[Purpose of the invention]

The present invention is based on the above consideration.

The object of the present invention is to provide a self-clocking method for constructing a multi-track magnetic recording/reproducing device that is inexpensive and has high performance.

[Structure of the invention]

For this reason, the self-clock method in the multi-track magnetic recording/reproducing apparatus of the present invention is as follows.

A phase detector compares the phase difference between the input data signal of the reference track and the output signal of a divider that divides the output of the voltage controlled oscillator to 1/N, and the phase detector outputs an electric signal corresponding to the phase difference. Input the signal to the loop filter and
A phase-locked oscillator configured to control an upper voltage controlled oscillator by the output signal of the filter, and a presettable N-ary counter, each having a one-to-one correspondence with each track. a plurality of 1 provided
a luer clock device, supplying the output signal of the voltage controlled oscillator to the clock input terminal of each of the N-ary counters, and supplying the input data of each track to the preset enable terminal of the corresponding N-ary counter. When the input data has a predetermined value, the corresponding N-ary counter can be preset to a preset value, and the output carry signal of each N-ary counter is output as a clock signal for each track, and is characterized by the following features: It is.

[Embodiments of the invention]

Hereinafter, the present invention will be explained with reference to the drawings. FIG. 1 is a diagram showing an overview of the data reproducing part of a multi-track magnetic recording and reproducing apparatus to which the present invention is applied, FIG. 2 is a block diagram of one embodiment of the present invention, and FIG. Figure 1g4 is a block diagram of the second embodiment of the self-clocking device used in the present invention, Figure 5 is a time chart explaining its operation, and Figure 6 is a time chart explaining the operation of the clock device. A diagram showing an outline of the third embodiment of the self-clock device used in the present invention, Fig. 7 is a time chart explaining its operation, and Fig. 8 is a diagram showing the outline of the third embodiment of the self-clock device. In Figure 1, which is a diagram showing details, 1-
0.1-1.・・・・・・・・・ is the playback device corresponding to each track, 2-0.2-1゜・・・・・・・・・
is a self-driving device, 3-0.3-1°...
... is the data discrimination section, and 4 is the 7-order detection section.

5 is the read head of the magnetic tape device%6 is the preamplifier%7
1 is a differential circuit, 8 and 9 are comparison circuits, and 10 is a time sensor.

T dog...... is track b (Am C
1e・・・・・・・・・ is clock h Die D1
＊、・・・・・・・・・ is tape, IBG is inter
Each block-gap is shown.

The analog read signal output from the read head 5 is amplified by a preamplifier 6. The output of the preamplifier 6 is amplified by a differentiating circuit 7.
is differentiated by The output of the differential path 7 is input to the comparator circuit 8, and the output of the comparator circuit is 0 or 0, which is input to the self@clock device 2-0 and the data discriminator 3-OK. The output of the differentiating circuit 70 is input to the comparator circuit 9, and the output of the comparator circuit 9 is the 0 time input to the time sensor IOK.
The output of sensor IO is input to 7-ohm detection s4.

The O data discriminator 3-0, which extracts the signal from the pulse train output from the self-clock device 2-Otl and the comparator circuit 8, uses the clock from the self-clock device 2-0 to determine whether the data is logical or not. 0” or logic “1” [1-1, ......Fi,
It has the same configuration as the playback device 1-0. The 7-match detection unit 4 detects each playback device 1-0.1-1.・・・・・・
. . . determines from the output from the time sensor IO whether the current read data is related to an IBG, a block, or a formed ore tape mark.

FIG. 2 shows an embodiment of the self-clock generation mechanism according to the present invention, in which 5 is a phase detector, 6 is a loop filter, and 7 is a voltage controlled oscillator.

8 indicates a 1/N-divisible program counter, and 9 indicates an N-ary programmaple counter. Also, DI・, DIIs・
・・・・・・・・・ DI(、・・・・・・・・・ D
I- is the corresponding playback device 1-0.1-1.・・・・・・
... 1-4.・・・・・・・・・ The input data output from the comparator circuit 8 of G1 is also shown respectively ◇ Phase detector 5s loop filter 6, voltage controlled oscillator 7
and 17N frequency divider 8 is a so-called PLL (Pi・-L
・#＾-dL...p).

A clock having a frequency 08 times that of the input data DI- is generated from this PLLK, and this clock is used for each self-repatch device 2-0.2-1°...
... 2-mK distributed.

Each self-clock device 2-0.2-1.・・・・・・
2-m have the same configuration. Therefore, only self-clocking device 2-0 will be described. The self-clock device 2-OFi corresponds to the rack TKa, and the 0 boogram pull counter 9, which has a program pull counter 9 inside, has a clock input terminal,
The clock input terminal of a zero programmable counter 9, which has a preset data input terminal, a preset enable terminal, and a carry output terminal, is supplied with the output signal of the voltage controlled oscillator tF7. The preset-data input terminal is supplied with a preset value from one of the preset data sources (not shown), and this self-
Fi in the clock device, and the preset value is approximately N/2. Input data D is input to the preset enable terminal.
I is applied, and the input data DI is logic jlr I J
, the preset value is set to program 2 mapple counter 9.
, and the count value of the Glogtsuma Blue counter 9 becomes the preset value.

The diagram is a time chart showing the operation of the self-clock device 2-00. When 0 input data DI is input, the counter 9 outputs the clock C after approximately 172 hours. If D I, is not input, the counter 9 receives the clock Ce every average period τ.
Figure 4 and gsaa illustrate a second embodiment of the self-clocking device used in the present invention. In Figure 14, 1G is an N-ary programmable counter, 11 is a preset fist data source, 1
2 indicates a flip 70 tube, and 13 indicates an AND circuit. The programmable counter 10 has a clock input terminal and a preset data input terminal.

It has a preset fog enable terminal and a carry output terminal. Preset data source 11 K Fi approximately N/
A value of 2 is stored. AND circuit 13 is.

When the flip 7a block 12 is reset, the input data is supplied to the preset enable terminal.The 0flip 7a block 12 is reset by the carry signal (clock) and the logic rl output by the AND circuit 13.
Reset by J signal.

Clock input terminal Kl of programmable counter IO
f1. Voltage controlled oscillation I! 7 output signals are provided.

FIG. 5 shows the operation of the self-clock device shown in FIG. #I4. As shown in Fig. 5, the dotted pulses indicate noise.

Noise can be controlled by presetting the programmable counter 10.
Since it is not input to the enable terminal, a self-clocking device that is resistant to noise can be obtained. Figures 6 to 8 illustrate 113 embodiments of the self-clocking device used in the present invention. 6 is a diagram showing an outline of the third embodiment of the self-teasing lock wrinkle arrangement,
FIG. 7 is a time chart showing the operation of the third embodiment of the self-loading device, and FIG. 8 is a diagram showing details of the third embodiment of the self-loading device. 01 indicates a free-running timer, and 15 indicates a decoder. 01-running tie-Vt4 oscillates free-running to generate a clock every period T when no input data is input, and 15 indicates a decoder. In this case, the preset value created by the decoder 15 is preset.
Find out in which time zone the trench is contained,
A preset value is created according to the time period.

You can determine when the input data's intermittent tying belongs to 1allK by checking the I timer value of the self-running timer 14. Figure 7 is a diagram for explaining the operation of the self-clock device shown in Figure 6. This is a time chart. The dotted line pulses indicate pulses of the input data that would occur if high frequency fluctuation components (such as jitter) were not present. 7th
As you can see from the figure.

If the arrival timing of the input data pulse belongs to the second time zone, a preset box is preset such that a clock is generated T hours after that timing. - is approximately r/2, where τ is eight times the period of the output pulse of the voltage controlled oscillator 7. 1 if the arrival timing of the input data pulse belongs to the third time zone.
A preset value is preset so that the clock is output after a certain period of time. If the arrival timing of the input data pulse belongs to the first time period, a preset value is set such that the clock is output T hours after the timing. Note that T6<T.

<　T.

FIG. 8 shows details of a third embodiment of the self-cooking device. In FIG. 8, 16 indicates a programmable counter. The 16 programmable counters have a clock input terminal, a preset data input terminal, a preset enable terminal, a data output terminal, and a carry output terminal. The output signal of the voltage controlled oscillator 7 is input to the clock input terminal, and the preset value created by the decoder 15 is applied to the 0 preset data input terminal. preset·
Input data is applied to the enable terminal.

The data output terminal is connected to the input side of the decoder 15. This data/output terminal indicates the counter 160 count value. The output signal from the carry output terminal of program counter 16 serves as a clock. The decoder 15 creates a preset value according to the count value of the counter 16.

When a pulse of input data is input to the blemish map pull contest counter 16, a preset value is preset, and the count value of the counter 16 becomes the preset value. This 1s3
According to the embodiment, a self-talock device that is resistant to high frequency fluctuation components (jitter, etc.) can be obtained.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, it is possible to realize a self-clocking system for a multi-track magnetic recording/reproducing apparatus that is inexpensive and has high performance.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an overview of the data reproducing part of a multi-track magnetic recording and reproducing apparatus to which the present invention is applied, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. N3 is a self-clock diagram of FIG. 182. Time chart explaining the operation of the device, No. 4
The figure is a block diagram of a second embodiment of the self-clocking device used in the present invention, FIG. 5 is a time chart explaining its operation, and FIG. 6 is a block diagram of the second embodiment of the self-locking device used in the present invention. 01-0.1- is a diagram showing an outline of the third embodiment, FIG. 7 is a time chart explaining its operation, and FIG. 8 is a diagram showing details of the third embodiment of the self-clock device.
1. . . . Playback device corresponding to each track, 2-0.2-1.・・・・・・・・・・・・
- Self-clock device, 3-0.3-1.・・・・・・
. . . Data discriminating section, 4... Formate detection section, 5... Reading head of magnetic tape device, 6...
・Preamplifier, 7... Differential circuit %8 and 9... Comparison circuit, 10... Time sensor. lO... N-ary programmable counter, 11.
...Preset data source, 12...Flip, 7
clyp, 13...AND circuit, 14...1 run tie ff, 15...decoder, 16...programmable counter. Patent Applicant: Fujitsu Ltd. Representative Patent Attorney Kyotani 4 Part 2 Figure 3 Figure 5 FF + 2#) Reset Sword Otsu Figure 9 Figure 9

Claims (1)

[Claims] A phase detector compares the phase difference between the input data signal of the reference track and the output signal of the frequency divider that divides the output of the voltage controlled oscillator into 1/NK divisions, and the phase difference corresponding to the phase difference output from the phase detector is compared. A phase synchronized oscillator configured to input an electrical signal to a loop filter and control the voltage controlled oscillator by the output signal of the loop filter, and a presettable Nm counter. However, each track is provided with a plurality of self-clock devices provided in an l-to-one correspondence, and
The output signal of the voltage controlled oscillator is supplied to the clock input terminal of each of the N-ary counters, and the input data of each track is supplied to the preset [phase] enable terminal of the corresponding N-ary counter so that the input data has a predetermined value. In a multi-track magnetic tape device, the preset value can be preset in a corresponding N-ary counter, and the output carry signal of each N-ary counter is outputted as a 4-way signal for each track. Self clock method.