JPS58165325A - Exposure of electron beam - Google Patents

Exposure of electron beam

Info

Publication number
JPS58165325A
JPS58165325A JP4850882A JP4850882A JPS58165325A JP S58165325 A JPS58165325 A JP S58165325A JP 4850882 A JP4850882 A JP 4850882A JP 4850882 A JP4850882 A JP 4850882A JP S58165325 A JPS58165325 A JP S58165325A
Authority
JP
Japan
Prior art keywords
chip
electron beam
data
stage
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4850882A
Other languages
Japanese (ja)
Inventor
Kunio Takeuchi
竹内 邦雄
Yoshio Fukazu
冨加津 好夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jeol Ltd
Original Assignee
Jeol Ltd
Nihon Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jeol Ltd, Nihon Denshi KK filed Critical Jeol Ltd
Priority to JP4850882A priority Critical patent/JPS58165325A/en
Publication of JPS58165325A publication Critical patent/JPS58165325A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174Particle-beam lithography, e.g. electron beam lithography

Abstract

PURPOSE:To remarkably cut down the time required for the entire patterning by a method wherein a stage is shifted at the distance equal to the maximum amplitude of the electron beam, thereby enabling to reduce the number of shifting. CONSTITUTION:The material to be exposed is divided into a plurality of chips of identical kind and the pattern in chips is drawn using the data sent from the chip data memory wherein the pattern data of the chip 1 are stored. At this time, the material to be exposed is divided into the square-shaped region (the regions divided by broken lines) having the largest amplitude L of the electron beam is virtually regarded as a side of the square-shaped region, and the stage is shifted in X or Y direction by the distance equal to the maximum amplitude of the electron beam. A patterning is performed on the regions in the order of 1, 2, 3 and so force, for example, using the chip data sent from the chip data memory effectively. Accordingly, the number of shifting of the stage required when a patterning is performed on the chips of lxXly (the region divided by solid lines) in size can be reduced remarkably as a whole.

Description

【発明の詳細な説明】 本発明は描画に要する時間を短縮した電子線露光方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electron beam exposure method that reduces the time required for drawing.

近時、LSI及び超LSI素子の製作手段として電子線
露光方法が最も注目を浴びている。さて、電子線露光方
法によるパターン描画は、電子線の振り幅に限度がある
ことから、被露光材料を載置したステージの移動を行い
、被露光材料上を電子線で走査することによりなされて
いる。一般に、チップの大きさは設計するデバイスに依
り決められるものであり、又、電子線の最大振り幅は装
置により決まってしまうものなので、チップの大きさは
電子線の最大振り幅より大きい場合や小さい場合、及び
電子線の最大振り幅と等しい場合がある。さて、チップ
の大きさが電子線の最大振り幅と等しい場合は問題ない
が、大きい場合や小さい場合に問題がある。例えばチッ
プの大きさが最大振り幅より大きい場合について以下に
説明する。
Recently, the electron beam exposure method has been attracting the most attention as a means of manufacturing LSI and VLSI devices. Now, pattern drawing using the electron beam exposure method is done by moving the stage on which the material to be exposed is placed and scanning the material with the electron beam, since there is a limit to the amplitude of the electron beam. There is. In general, the size of the chip is determined by the device being designed, and the maximum amplitude of the electron beam is determined by the equipment, so the size of the chip may be larger than the maximum amplitude of the electron beam. Sometimes it is small, and sometimes it is equal to the maximum amplitude of the electron beam. Now, there is no problem if the size of the chip is equal to the maximum amplitude of the electron beam, but there is a problem if it is large or small. For example, a case where the chip size is larger than the maximum swing width will be explained below.

第1図に示す様に、材料をl!xxf!yの同一チップ
に分け(実線で分けた領域)、該チップ内において電子
線の最大振り幅し毎にステージを移動し、1チツプのデ
ータを記憶したチップデータメモリからのチップデータ
をチップ毎に繰り返して使用し、チップ毎に露光してい
る(図中■、■、■。
As shown in Figure 1, the materials are l! xxf! y into the same chip (area divided by solid line), move the stage every time the maximum amplitude of the electron beam within the chip, and transfer the chip data from the chip data memory that stores the data of one chip to each chip. It is used repeatedly and exposed for each chip (■, ■, ■ in the figure).

・・・は描画順を付した領域を示す)。今、X方向のチ
ップ数をnx、Y方向のチップ数をnyとすれば、ステ
ージの移動数は全体で、(−ffi2−+ 1 ) n
 x−<h+ 1 )。、おなり、著しく多くなっ、し
ょし う。従って、ステージ移動時間と実際の露光時間の和を
描画に要する時間と定義すれば、結果的に描画全体に要
する時間は著しく長くなってしまう。
... indicates an area with a drawing order). Now, if the number of chips in the X direction is nx and the number of chips in the Y direction is ny, the total number of stage movements is (-ffi2-+ 1) n
x-<h+1). , the number of bells has increased significantly. Therefore, if the sum of the stage movement time and the actual exposure time is defined as the time required for drawing, the time required for the entire drawing will become significantly longer.

本発明は斯くの如き点に鑑みてなされたもので、材料を
歪等の程度を許容出来る範囲内での電子線の最大振り幅
を一辺とする正方形状の領域に分け、ステージをX又は
Y方向に、電子線の最大振り幅に等しい距離ずつ移動さ
せ、チップデータメモリからのチップデータを有効に使
用して、ステージの移動数を大幅に減することにより、
描画全体に要する時間を著しく短縮した新規な電子線露
光方法を提供するものである。
The present invention has been made in view of the above points, and consists of dividing the material into square regions each having one side the maximum amplitude of the electron beam within an allowable range of distortion, etc., and moving the stage to the By moving the stage by a distance equal to the maximum swing width of the electron beam in the direction, and effectively using the chip data from the chip data memory, the number of stage movements can be significantly reduced.
The present invention provides a novel electron beam exposure method that significantly shortens the time required for the entire drawing.

第2図は第1図と同じ様←、チップの大きさ!メ1: X1v(実線で分けた領域□)が電子線の振り幅より大
きい場合についての本嚢明の露光法を示した、[ もので、材料を電子線の最大振り・幅を一辺とする正方
形状の領域(破線で分けた領域)に分け、ステージを×
又はY方向に電子線の最大振り幅に等しい距離ずつ移動
させ、チップデータメモリからのチップデータを有効に
使用して、■、■、■。
Figure 2 is the same as Figure 1←, the size of the chip! Me1: The exposure method of this book is shown for the case where X1v (region □ divided by solid line) is larger than the amplitude of the electron beam. Divide the stage into square areas (areas divided by broken lines) and mark the stage with
Alternatively, move the electron beam in the Y direction by a distance equal to the maximum swing width, and effectively use the chip data from the chip data memory to perform ■, ■, ■.

・・・の順序に従い、領域を描画している。今、X方向
のチップ数をnx、 Y方向のチップ数をnyとすれば
、ステージの移動数は全体で、 (・月並欲千1)・(↓仕ツ+1)となり、第1図で示
L          L した従来法に比べ、全体で(nx−1>・(ny−1)
の大幅回数域ることになる。この効果は、チップの大き
さが電子線の振り幅より小さい場合についても全く同じ
様に得られる。では、次にこの場合を例にとって本発明
を説明する。先ず、ステージをX又はY方向に電子線の
最大振り幅りに大略等しい距離移動させる。尚、チップ
サイズは1××Jyで、1x<L<21X、fV<L<
21’Vであり、第1図に示す様に、被露光材料の被露
光領域I″l を実線でL×flyM)サイズに分けたち、の(例、C
H)tfif y 7 r−アsl”′uZ T、l 
7 ’) Get * 3 FjA K 7R1′:・
0 す様に、被露光M′:・料の被露光領域を破線でLXL
のサイズに分けた領域(以後LL領領域称す)Lll、
112,113.・・・、L21.122 (実際には
各LL領領域中心)に移動し、該移動の都度L1領域内
が露光される。
The areas are drawn according to the order of... Now, if the number of chips in the X direction is nx, and the number of chips in the Y direction is ny, the total number of stage movements is (・Monthly desire 1)・(↓Selection + 1), and as shown in Figure 1. Overall, (nx-1>・(ny-1)
This will result in a large number of times. This effect can be obtained in exactly the same way even when the size of the chip is smaller than the amplitude of the electron beam. Next, the present invention will be explained using this case as an example. First, the stage is moved in the X or Y direction by a distance approximately equal to the maximum amplitude of the electron beam. In addition, the chip size is 1××Jy, 1x<L<21X, fV<L<
21'V, and as shown in FIG.
H) tfif y 7 r-asl"'uZ T,l
7') Get * 3 FjA K 7R1':・
0, the exposed area of the material M' is indicated by a broken line LXL.
An area divided into sizes (hereinafter referred to as LL area) Lll,
112,113. ..., moves to L21, 122 (actually the center of each LL area), and the inside of the L1 area is exposed each time the movement is made.

さて、LL領域L11は区画Att*A+z。Now, the LL area L11 is a section Att*A+z.

A21.A22から、L12は区画At 3 、 AX
4 、Als 、A23.Az s 、A2 sから、
L13はAls、At7.Ate、Azs+Az7+A
28から、・・・・、L21はA3 t 、 A32 
A21. From A22, L12 is the section At 3 , AX
4, Als, A23. From Az s, A2 s,
L13 is Als, At7. Ate, Azs+Az7+A
From 28..., L21 is A3 t, A32
.

A4 + + A42 、As 1.As 2から、l
−22は・・・・、から各々成る。従って、ステージが
111に移動した時、例えば区画A+ 1+ At 2
1A2,2 + Az +の順にしL領域し11を露光
し、ステージが112に移動した時、区画A+3.A1
s + At s e A2 s + A24・A23
の順にI−L領域L12を露光し、以下同様に、ステー
ジが121に移動した時、区画A3r’、Aa 2 、
A42 、 A411 As 1* As 2の順に露
光される。
A4 + + A42, As 1. From As 2, l
-22 consists of..., respectively. Therefore, when the stage moves to 111, for example, section A+ 1+ At 2
1A2, 2+Az+, L area 11 is exposed, and when the stage moves to 112, section A+3. A1
s + At s e A2 s + A24・A23
The IL region L12 is exposed in the order of , and in the same manner, when the stage moves to 121, the sections A3r', Aa 2 ,
A42, A411 As 1*As 2 are exposed in this order.

そして、これらの露光には、1チップ分のデータを記憶
したチップデータメモリからのデータが使用される。で
はその露光法を以下に説明する。
For these exposures, data from a chip data memory storing data for one chip is used. The exposure method will be explained below.

先ず、チップデータメモリに1チップ分のデータ、例え
ばチップ内に描かれるパターンの位置データを入れてお
く。そして、描くべき区画の位置に応じて電子線にバイ
アスを掛ける。更に、区画内のパターンの位置がチップ
内の何処にあるのかに応じて、前記チップデータメモリ
の適宜な個所にあるデータのみを読み出して、該読み出
したデータとステージの位置のデータ及び前記バイアス
データに基づいて電子線の被露光材料への照射位置をコ
ントロールして、所定のパターンを描く。
First, data for one chip, for example, position data of a pattern drawn within the chip, is stored in the chip data memory. Then, a bias is applied to the electron beam depending on the position of the section to be drawn. Furthermore, depending on where in the chip the position of the pattern in the section is, only the data in the appropriate location of the chip data memory is read out, and the read data, stage position data, and the bias data are read out. A predetermined pattern is drawn by controlling the irradiation position of the electron beam on the material to be exposed based on the following.

表1は描画類に、区画基LL領域の中心からのX方向バ
イアス1ilBX、Y方向バイアス値BY1チップメモ
リから読み出すべきデータのある範囲(第4図のチップ
データメモリ参照)、及びステージ位置を表したもので
ある。
Table 1 shows the X-direction bias 1ilBX from the center of the division base LL area, the Y-direction bias value BY1, the range of data to be read from the chip memory (see chip data memory in Figure 4), and the stage position in the drawings. This is what I did.

では本発明の方法を実施する為の一例を示した第5図の
電子線露光装置により、LL領領域11とt−12の露
光について以下に説明する。
Exposure of the LL region 11 and t-12 will be explained below using the electron beam exposure apparatus shown in FIG. 5, which shows an example of carrying out the method of the present invention.

第2図において、1は電子線露光装置鏡筒で、2は電子
銃である。該電子銃から射出された電子線は照射レンズ
3により、中央部に正方形状又は矩形状の孔4日が穿た
れたマスク4M上に照射される。該マスクの孔を通過し
た断面形状が正方形状又は矩形状の電子線は集束レンズ
5により被露光材料6上に集束される。又、該電子線は
同時に走査用偏向系7により被露光材料6上で偏向され
る。11は描くべきパターンに関するデータを蓄積した
磁気ディスクで、該ディスクに蓄積されたデータはデジ
タル電子計算機12(以後CPUと称す)の指令により
読み出され、該CPLJに内蔵i ′ されたメモリや、ffi、 s C9を介してチップデ
ータメモリ13に記憶:′薯■、す。該H8C9は高速
データ伝送制御機構で、前記CPU内のメモリやチップ
データメモリ内のデータを読み出し、該各々のデータに
基づいて描くべきパターンが存在する[L領域のパター
ン位置座標に対応した信号を作成し、DA変換器8に送
る。該H8Gは又、前記CP LJ内のメモリから前記
被露光材料6を載置したステージ14の位置データを読
み出し、DA変換器15を介してステージ移動駆動機1
(例えばモータ)16に送ると同時に、前記DA変換器
8にも送る。該DA変換器8はLL領領域パターン位置
座標とステージの位置データから描くべきパターンの照
射位置信号を作成し、前2走査用偏向系  □7へ送る
In FIG. 2, 1 is an electron beam exposure device lens barrel, and 2 is an electron gun. The electron beam emitted from the electron gun is irradiated by the irradiation lens 3 onto a mask 4M having a square or rectangular hole in the center. The electron beam having a square or rectangular cross section that has passed through the hole in the mask is focused onto a material to be exposed 6 by a focusing lens 5. Further, the electron beam is simultaneously deflected onto the material to be exposed 6 by the scanning deflection system 7. Reference numeral 11 denotes a magnetic disk that stores data related to the pattern to be drawn, and the data stored on the disk is read out by commands from a digital computer 12 (hereinafter referred to as CPU), and is read out from the memory built into the CPLJ, ffi, s Stored in chip data memory 13 via C9: '薯■, s. The H8C9 is a high-speed data transmission control mechanism that reads out the data in the memory in the CPU and the chip data memory, and generates a signal corresponding to the pattern position coordinates of the L area, where there is a pattern to be drawn based on each data. and send it to the DA converter 8. The H8G also reads the position data of the stage 14 on which the material to be exposed 6 is placed from the memory in the CP LJ, and transfers it to the stage moving drive device 1 via the DA converter 15.
(for example, a motor) 16, and at the same time, it is also sent to the DA converter 8. The DA converter 8 creates an irradiation position signal of the pattern to be drawn from the LL area pattern position coordinates and the stage position data, and sends it to the deflection system □7 for the previous two scans.

さて、予めチップデータメモリ13に1チップ分のパタ
ーン位置データを記憶させておく。先ず区画A1+の描
画時には、CPtJ12のメモリからL++の中心座標
に対応したステージ位置データ(Xo 、 Yo )、
バイアスデータ(0,O)、チップデータメモリの読み
出すべき範囲を指定したデータ(以後読出し範囲データ
と称す) (0〜夕×、0〜Rv )がH8C9へ送ら
れる。該H8Cはステージ位置データ(Xo 、 Yo
 )をDA変換器8及び15へ送ると同時に、チップデ
ータメモリ13から前記読出し範囲データ(O〜ZX 
Now, pattern position data for one chip is stored in the chip data memory 13 in advance. First, when drawing section A1+, stage position data (Xo, Yo) corresponding to the center coordinates of L++ from the memory of CPtJ12,
Bias data (0, O) and data specifying the range to be read from the chip data memory (hereinafter referred to as read range data) (0 to Dx, 0 to Rv) are sent to the H8C9. The H8C has stage position data (Xo, Yo
) is sent to the DA converters 8 and 15, and at the same time, the read range data (O to ZX
.

O〜1v)に指定された範囲に記憶されたパターン位置
データ(Xl、Ys )を読み出し、該データとバイア
スデータ(0,0)とを前記DA変換器8へ送る。該D
A変換器はこれらのデータとステージ位置データとから
区画A+を内のパターンの照射位置信号(Xo +X+
 、Yo ・トY+ )を作成して走査用偏向系7へ送
る。又、DA変換器15はステージ位置データ(Xo 
、 Yo )をモータ16へ送るので、ステージ14は
L++の中心に位置する。この結果、区画A1+内に所
定のパターンが描画される。区画A12の描画時には、
CPU12のメモリからステージ位置データ(Xo 。
The pattern position data (Xl, Ys) stored in the range specified by O to 1v) is read out, and the data and bias data (0, 0) are sent to the DA converter 8. The D
The A converter uses these data and the stage position data to generate an irradiation position signal (Xo +X+) of the pattern within section A+.
, Yo and Y+) and send it to the scanning deflection system 7. Further, the DA converter 15 receives stage position data (Xo
, Yo) to the motor 16, so the stage 14 is located at the center of L++. As a result, a predetermined pattern is drawn within the section A1+. When drawing section A12,
Stage position data (Xo.

Yo)、バイアスデータ(、lx、O)、読出し範囲デ
ータ(0〜し一1y、o〜Iy )がH8C9へ送られ
る。該H8Cはステージ位置データ(Xo 、 Yo 
)をDA変換器8及び15へ送ると同時に、チップデー
タメモリ13から前記読出し範囲データ(0〜L−/y
、o〜)■)に指定された範囲に記憶されたパターン位
置データ(X+ ’ 。
Yo), bias data (, lx, O), and read range data (0 to 1y, o to Iy) are sent to H8C9. The H8C has stage position data (Xo, Yo
) is sent to the DA converters 8 and 15, and at the same time, the read range data (0 to L-/y
, o~) ■) The pattern position data (X+') stored in the range specified by ■).

Y1′ )を読み出し、該データとバイアスデータ(L
X、O)とを前記DA変換器8へ送る。該DA変換器は
、区画Al2内のパターンの照射位1信号(Xo +X
+ ’ + /x 、 Yo 4−Y+ ’ )を作成
して走査用偏向系7へ送る。この結果、前記と同様にし
て、区画Al1内に所定のパターンが描画される。以下
、表1に示す様に区画A22.A21が描画され、LL
領領域11の描画がなされる。次に区画A13の描画時
、CPL112のメモリからL12の中心座標に対応し
・たステージ位置データ(Xo +l、Yo )、バイ
アスデータ(0゜O)、読出し範囲データ(L−)X〜
Iy、o〜y)がH8C9へ送られる。該H8Cはステ
ージ位置データ(Xo +L、’Yo )をDA変換器
8:[。
Y1') is read out, and this data and bias data (L
X, O) are sent to the DA converter 8. The DA converter generates the irradiation position 1 signal (Xo +X
+'+/x, Yo4-Y+') and sends it to the scanning deflection system 7. As a result, a predetermined pattern is drawn within the section Al1 in the same manner as described above. Hereinafter, as shown in Table 1, section A22. A21 is drawn and LL
The territory area 11 is drawn. Next, when drawing section A13, stage position data (Xo +l, Yo), bias data (0°O), and readout range data (L-) corresponding to the center coordinates of L12 are extracted from the memory of CPL 112.
Iy, o~y) is sent to H8C9. The H8C sends the stage position data (Xo +L, 'Yo) to the DA converter 8:[.

及び15へ送ると同時に、チップデータメモリー3から
前記読出し範囲デー、夕(L−/X〜ly。
and 15, at the same time the read range data (L-/X~ly) is sent from the chip data memory 3.

0〜/V)に指定されたi)iに指定されたパターデー
タとバイアスデータ(0,O)とを前記DA変換器8へ
送る。該DA変換器は、区画Ala内のパターンの照射
位置信号(Xo +L+X+ 、Y6+Y1)を作成し
て走査用偏向系7へ送る。又、DA変換器15はステー
ジ位置データ(Xo +L。
i) Send the putter data and bias data (0, O) specified to i to the DA converter 8. The DA converter creates an irradiation position signal (Xo +L+X+, Y6+Y1) of the pattern within the section Ala and sends it to the scanning deflection system 7. Further, the DA converter 15 receives stage position data (Xo +L.

Yo )をモーター6へ送るので、ステージ14はL1
2の中心に移動する。この結果、区画Ata内に所定の
パターンが描画される。以下、表1に示す様に区画At
4*Ats+Azs、Az4′+A23が描画され、L
L領域L12の描画がなされる。以下、同様にして他の
LL領領域描画される。
Yo ) is sent to the motor 6, so the stage 14 is L1
Move to the center of 2. As a result, a predetermined pattern is drawn within the section Ata. Below, as shown in Table 1, the section At
4*Ats+Azs, Az4'+A23 is drawn, and L
The L area L12 is drawn. Thereafter, other LL regions are drawn in the same manner.

尚、前記実施例では孔を有するマスクが1枚配置された
露光装置に本発明の方法を適用したが、孔を有するマス
クが複数枚配置された電子線断面可変型の露光装置等に
適用してもよい。
In the above embodiments, the method of the present invention was applied to an exposure apparatus in which one mask with holes was arranged, but it could also be applied to an exposure apparatus of a variable electron beam cross-section type, etc. in which a plurality of masks with holes were arranged. It's okay.

斯くの如き本□発明によれば、ステージの移動臼・二 数を著しく少なべ出来るので、結果的に描画全体に要す
る時間mdしく短縮される。
According to the present invention as described above, the number of movable stages can be significantly reduced, resulting in a significant reduction in the time required for the entire drawing process.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の露光方法による材料上の描画を示し、第
2図は本発明の露光方法による材料上の描画の一例を示
し、第5図は本発明の露光方法の一応用例を示した電子
線露光装置の概略図、第3図及び第4図はその動作の説
明に使用した図である。 [:電子線の最大振り幅、lx=チップのX方向サイズ
、)■:チップのY方向サイズ、Lll。 L12.・・・:LL領領域A1□m A l 2 *
・・弓区画、BX:X方向バイアス値、BY:Y方向バ
イアス値、2:電子銃、6:被露光材料、7:走査用偏
向系、12:デジタル電子計算機、9:高速データ伝送
制御機構、8 : DA変換器、14:ステージ。 特許出願人 日本電子株式会社 代表者 加勢 忠雄
FIG. 1 shows drawing on a material by a conventional exposure method, FIG. 2 shows an example of drawing on a material by the exposure method of the present invention, and FIG. 5 shows an example of application of the exposure method of the present invention. The schematic diagrams of the electron beam exposure apparatus, FIGS. 3 and 4, are diagrams used to explain its operation. [: Maximum amplitude of electron beam, lx=X-direction size of chip,) ■: Y-direction size of chip, Lll. L12. ...: LL area A1□m A l 2 *
...Bow section, BX: X-direction bias value, BY: Y-direction bias value, 2: Electron gun, 6: Material to be exposed, 7: Scanning deflection system, 12: Digital electronic computer, 9: High-speed data transmission control mechanism , 8: DA converter, 14: stage. Patent applicant JEOL Ltd. Representative Tadao Kase

Claims (1)

【特許請求の範囲】[Claims] 被露光材料を複数の同一チップに分け、1チツプのパタ
ーンデータを記憶したチップデータメモリからのデータ
の使用によりチップ内のパターンを描画するようにした
方法において、被露光材料を仮想的に電子線の最大振り
幅を一辺とする正方形状の領域に分け、該被露光材料を
電子線の最大振り幅に等しい距離ずつ移動させ、その都
度正方形状の領域内のパターンを描画することを特徴と
する電子線露光方法。
In this method, the material to be exposed is divided into a plurality of identical chips, and the pattern within the chip is drawn using data from a chip data memory that stores the pattern data of one chip. The material to be exposed is moved by a distance equal to the maximum amplitude of the electron beam each time, and a pattern within the square area is drawn each time. Electron beam exposure method.
JP4850882A 1982-03-26 1982-03-26 Exposure of electron beam Pending JPS58165325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4850882A JPS58165325A (en) 1982-03-26 1982-03-26 Exposure of electron beam

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4850882A JPS58165325A (en) 1982-03-26 1982-03-26 Exposure of electron beam

Publications (1)

Publication Number Publication Date
JPS58165325A true JPS58165325A (en) 1983-09-30

Family

ID=12805307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4850882A Pending JPS58165325A (en) 1982-03-26 1982-03-26 Exposure of electron beam

Country Status (1)

Country Link
JP (1) JPS58165325A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0364929A2 (en) * 1988-10-20 1990-04-25 Fujitsu Limited Fabrication method of semiconductor devices and transparent mask for charged particle beam

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521155A (en) * 1978-08-02 1980-02-15 Fujitsu Ltd Electronic beam exposing system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5521155A (en) * 1978-08-02 1980-02-15 Fujitsu Ltd Electronic beam exposing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0364929A2 (en) * 1988-10-20 1990-04-25 Fujitsu Limited Fabrication method of semiconductor devices and transparent mask for charged particle beam

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