JPS58165165A - Switching system of microcomputer system - Google Patents

Switching system of microcomputer system

Info

Publication number
JPS58165165A
JPS58165165A JP57047333A JP4733382A JPS58165165A JP S58165165 A JPS58165165 A JP S58165165A JP 57047333 A JP57047333 A JP 57047333A JP 4733382 A JP4733382 A JP 4733382A JP S58165165 A JPS58165165 A JP S58165165A
Authority
JP
Japan
Prior art keywords
current
microcomputer
switching
circuit
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57047333A
Other languages
Japanese (ja)
Other versions
JPS6331819B2 (en
Inventor
Katsuyuki Nagao
長尾 勝行
Kazuhisa Iwamura
岩村 和久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57047333A priority Critical patent/JPS58165165A/en
Publication of JPS58165165A publication Critical patent/JPS58165165A/en
Publication of JPS6331819B2 publication Critical patent/JPS6331819B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To switch a microcomputer system quickly, by judging that the runaway of software, the electric power voltage drop, or the like occurs when the current integral value of a prescribed address bus is outside a prescribed range and switching the system in this case. CONSTITUTION:When detecting an abnormality in the current value of one of address busses, for example, an address bus A0 of a current microcomputer 1, an abnormality detecting circuit 4 transmits a switching interruption signal I to a stand-by microcomputer 1. As the result, the stand-by microcomputer 2 transmits a line switching signal S to a switch 5, and the connection between control lines 6 and 7 is switched to the connection between control lines 8 and 7. An integrating 41 of the abnormality detecting circuit 4 integrates (averages) the current of the address bus A0 with a prescribed time constant, and the output value is held constant approximately during a normal program processing. Consequently, it is discriminated whether the output value of the integrating circuit 41 is within a normal range or not; and when it is outside this range, the switching interruption signal I is outputted.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は1つの対象を2つのマイクロコンビ。[Detailed description of the invention] (1) Technical field of the invention The present invention combines one object with two microcombiners.

−タ、すなわち現用および予備用のマイタロコンビ、−
タを用いて制御するマイクロコンビ1−タシステ五の切
替方式に調する。
-ta, i.e. working and spare mitalo combination, -
The switching method of the microcombiner 1-ta system 5 is controlled using the controller.

(2)技術Ow景 リアルタイムオン・ライ・ン制御プロダラム等を奥行し
て1つの対象を制御するとき、1つの現用マイクロコン
fjL−夕によシ制御するが、この現用マイク”sr’
s−ンe−一夕に障害が発生した場合には、待機中の予
備用iイタロコンビ、−夕が制御ヲ引―ぐマイクローン
♂1−タシ゛ステムがある。このようなマイクロコンビ
、−タシステムにおいては、現用マイクロコン♂−−タ
の障害時に、制御を□現用マイクロコンC,,&−夕か
ら予備用マイクロコン♂、−夕に迅速に切替えることが
重要である。
(2) Technology view Real-time on-line control When controlling one object using a program, etc., one current microcomputer is used to control the current microphone "sr".
In the event that a failure occurs overnight, there is a standby I-Italo combination, a micro-clone ♂1 system which the ``Y'' will take over control of. In such a microcomputer system, it is important to quickly switch control from the active microcontroller C, , & - to the standby microcontroller in the event of a failure in the active microcontroller. It is.

(3)従来技術と問題点 従来のマイクロコンビ、−タシステムの切替方式によれ
ば、特定出力4−)の出方信号を用いてハードウェアの
異常を検出し、この結果、割込みプロダラムルーチンを
用いて現用マイクロコン♂1−夕による制御から予備用
!イクロコン♂、−タによる制御に切替えるようにして
いた。しかしながら、この従来方式においては、ソフト
ウェア(デ田ダラム)の暴走あるいは動作の異常(たと
えば電源ダウン)等を迅速には検出できず、従って、現
用iイクロコンビ、−夕から予備用マイクロコンビ、−
タへの切替えが迅速でないという問題点があった。
(3) Prior art and problems According to the switching method of the conventional microcombination system, a hardware abnormality is detected using the output signal of the specific output 4-), and as a result, the interrupt program routine is Use it for control from the current microcontroller ♂1-Y for backup! I was trying to switch to control using the microcontrollers ♂ and -ta. However, with this conventional method, it is not possible to quickly detect software runaways or malfunctions (for example, power down), etc.
There was a problem in that switching to data was not quick.

(4)発明の目的 本発明の目的は、リアルタイムオンライン制御ゾロダラ
ムのように一定周期のプロダラム実行時にはアドレスバ
スの電流の平均値(積分値)はほぼ一定にあるヒとに着
目し、所定アドレスバスの電流積分値が所定範囲から外
れたと亀にソフFつ1 エアの暴走あるいは電源ノウン等が発生したとみ? なし、現用マイクロコン:ビュー夕による制御から11 予備用マイクロコンビ、−夕による制御に迅速に且つ自
動的に切替え、それによシ、上述の従来方式における問
題点を解決することkある。
(4) Object of the Invention The object of the present invention is to focus on a person in which the average value (integral value) of the current of the address bus is almost constant when a program is executed at a constant cycle, such as the real-time online control Zorodram, and If the current integral value of the current is out of the specified range, it is assumed that an air runaway or a power failure has occurred. It is possible to quickly and automatically switch from control by the current microcontroller to control by the standby microcontroller, and thereby to solve the problems in the conventional system described above.

(5)発明の構成 上述の目的を達成する丸めに本発明によれば、1つの対
象を制御するために現用マイクロコンビ1−夕および予
備用マイクロコンビ、−夕を具備するマイクロコンビ、
−タシステムにおいて、前記現用マイクロコンビ、−夕
の所定アドレスバスの電流を積分する積分手段と、核積
分手段の積分値が所定範囲にあるか否かを判別する判別
手段と、骸判別手段の判別結果に応じて割込み信号を前
記予備用iイクロコンビ、−夕に送出する割込み信号発
生手段と、を具備し、前記割込み信号によシ前記対象へ
の制御を前記現用マイクロコンビ、−タから前記予備用
マイクロコンビ、−夕に切替えて行うようにしたことを
特徴とするマイクロコンビ、−タシステムにおける切替
方式が提供される。
(5) Structure of the Invention To achieve the above-mentioned object, according to the present invention, a microcombination unit comprising a working microcombination unit 1 and a standby microcombination unit for controlling one object;
- In the data system, the current microcombi, - an integrating means for integrating the current of a predetermined address bus, a discriminating means for discriminating whether the integral value of the nuclear integrating means is within a predetermined range, and a discriminating means for determining a skeleton. interrupt signal generation means for transmitting an interrupt signal to the standby i-microcombi, according to the result, and controlling the target from the working microcombi, -tar to the standby according to the interrupt signal; Provided is a switching method in a microcombi-ta system, characterized in that the microcombi-ta system is switched in the evening.

(6)発明の実施例 以下、図面に千)本発明を説明する・ :: 第1図は本実、@の一実施例としてマイクロコン111
゜ ピユータシステムの切替方式を示すゾロツク回路図であ
る。第1図において、現用マイクロコンビ1−ダ1およ
び予備側マイクロコンビ、−夕2は制御対象3を制御す
るものであシ、異常検出回路4が現用マイクロコン♂1
−夕1の異常を検出したときに、現用マイク協コンビ、
−夕IKよる制御から予備用マイクロコンf&−夕2に
よる制御に切替わる。
(6) Embodiments of the Invention The following drawings are used to explain the present invention: Figure 1 shows a microcomputer 111 as an embodiment of the present invention.
It is a Zoroku circuit diagram showing a switching method of the computer system. In FIG. 1, the working microcombiner 1 and the standby microcombiner 2 control the controlled object 3, and the abnormality detection circuit 4 is connected to the working microcombiner 1.
- When the abnormality of E1 is detected, the working microphone cooperation combination,
Control by IK is switched to control by backup microcontroller f&2.

すなわち、異常検出回路4は現用マイクロコンビ、−夕
1のアドレス/シス、、01つ九とえばム。の電流値か
ら異常を検出したときに、予備用マイクロコン♂1−夕
2に切替割込み信号Iを送出する。
In other words, the abnormality detection circuit 4 is located at the address/system of the current microcombi, for example, M. When an abnormality is detected from the current value, a switching interrupt signal I is sent to the standby microcontrollers #1 and #2.

この結果、予備用マイクロコンビ1.−夕2は不イッチ
器に回線切替信号名を送出し、この結果、制御ライン6
と制御ライン7との!i続が制御ライン8と制御ライン
7との接続に切替わる仁とになる。
As a result, the preliminary micro combination 1. - E2 sends the line switching signal name to the switch, and as a result, control line 6
and control line 7! The i connection becomes the connection switch to the connection between the control line 8 and the control line 7.

第2図は111図の異常検出回路4の詳細な回路図であ
る。第2図において−41はIイオードDおよびキャノ
臂シタCKよシ構成される積分回路、4・2.43は比
較回路、44はオア回路、4.5はワンシ、、トマルチ
バイブレータである。
FIG. 2 is a detailed circuit diagram of the abnormality detection circuit 4 shown in FIG. 111. In FIG. 2, -41 is an integrating circuit composed of an Iode D and a canopy CK, 4.2.43 is a comparison circuit, 44 is an OR circuit, and 4.5 is a multivibrator.

積分回路41はアドレスバスA、の電流を所定時定数で
積分(平均化)するものであシ、ダイオードD4D抵抗
値およびキャーシタ“CTCよって決定される鍍時定数
は、たとえば第3図に示されるようなリアルタイムオン
ライン制御ゾロでラムの@m1周期よシ長く設定される
。従って、積分回路41の出力値は第3図の正常なプロ
ダラム処理中にありてはほぼ一定値に保持される千とに
なる。
The integration circuit 41 integrates (averages) the current of the address bus A with a predetermined time constant, and the time constant determined by the resistance value of the diode D4D and the capacitor CTC is shown in FIG. 3, for example. With real-time online control, the output value of the integrator circuit 41 is set to be longer than @m1 period of the RAM. Therefore, the output value of the integrating circuit 41 is kept at a nearly constant value during normal program processing as shown in FIG. become.

比較回路42.43およびオア回路44は積分回路41
の出力値が正常な範囲内にあるかを判別するための手段
である。この場合1.正常な範囲はV、、〜V、2テ表
わされ、こO2)O値v11”12は抵抗R1、R2、
R3、R4によって設定される0次に、たとえば、積分
回路41の出力値が最小設定値711未満になると、比
較回路、42の出力信号がハイ、従?て、オア回路44
の出力信号がハイとなる。逆に、積分回路41の出力値
が最大設定値V□を超えると、比較回路43の出力信号
がノ)イ、従って、オア回路44の出力信号がハイとな
る。このように積分り路41の出力値が範囲vIt〜v
N2を外れると、オア回路44の出力信号はローからハ
イとなる。
Comparison circuits 42 and 43 and OR circuit 44 are integral circuits 41
This is a means for determining whether the output value of is within the normal range. In this case 1. The normal range is expressed as V,...~V,2, where the O value v11''12 is the resistance R1, R2,
For example, when the output value of the integrating circuit 41 becomes less than the minimum set value 711, the output signal of the comparator circuit 42 becomes high or low, set by R3 and R4. So, OR circuit 44
The output signal of becomes high. Conversely, when the output value of the integrating circuit 41 exceeds the maximum set value V□, the output signal of the comparison circuit 43 becomes negative, and therefore the output signal of the OR circuit 44 becomes high. In this way, the output value of the integral path 41 is in the range vIt~v
When N2 is removed, the output signal of the OR circuit 44 changes from low to high.

割込み信号発生手段であるワンシ、ットマルチノ4イデ
レータ45は上述のオア回路44の出力信号のローから
ハイへの立上〕変化に応答して所定ノ譬ルス幅の切替割
込み信号夏を送出することKなる。
The interrupt signal generator 45, which is an interrupt signal generating means, sends out a switching interrupt signal having a predetermined error width in response to a change in the output signal of the OR circuit 44 from low to high. Become.

このような積分回路41の出力値が範囲vIll〜V□
を外れる原因はソフトウェア(ゾログラム)の暴走およ
び電源ダウンを含むものである。
The output value of such an integrating circuit 41 is in the range vIll~V□
The causes of disconnection include software (zologram) runaway and power failure.

な説明したように本発明によれば、ソフトウェアの暴走
あるいは電源ダウン等の検出を現用マイクロコンビ、−
夕のアドレスノぐスの電流の積分値によ)判別すること
かで暑、これによシ、現用マイクロコンビ、−夕の制御
を予備用マイクロコンビ、−夕の制御に迅速に切替える
ことができる。
As explained above, according to the present invention, detection of software runaway or power down, etc.
By determining whether it is hot (based on the integrated value of the current of the evening address signal), it is possible to quickly switch from the current microcombi, -evening control to the standby microcombi, -evening control. can.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例としてのマイクロコンビーー
タシステムの切i方式を示すプロ、夕回路図、菖2図は
第1図の異常検出回路4の詳細な回路図、第3図はリア
ルタイムオンライン制御プログラムルーチンの一例を示
す図である。 l:現用マイク驕コンビ、−タ、2;予備用マイクロコ
ン♂1−タ、3:制御対象%4:異常検出回路、41:
積分回路(積分手段)、41!、43:比較回路(判別
手段)、44:オア回路(判別手段)、45:ワンショ
ットマルチバイブレータ(割込み信号発生手段)、A0
ニアドレスパス、l:切替割込み信号。 特許出願人 富士通株式会社 特許出願式通人 弁理士 育 木    朗 弁m*  m   舘  和  2 弁3!+、内 1)幸 男 1 弁理士 山  口  昭  之 w!11図。 @2図′ 3 1   第3図 □
Fig. 1 is a professional circuit diagram showing the switching method of a microconverter system as an embodiment of the present invention, Fig. 2 is a detailed circuit diagram of the abnormality detection circuit 4 of Fig. 1, and Fig. 3 is FIG. 3 is a diagram illustrating an example of a real-time online control program routine. l: Working microphone combination, -ta, 2; Backup microcontroller, 1-ta, 3: Controlled object%4: Abnormality detection circuit, 41:
Integrating circuit (integrating means), 41! , 43: Comparison circuit (discrimination means), 44: OR circuit (discrimination means), 45: One-shot multivibrator (interrupt signal generation means), A0
Near address path, l: switching interrupt signal. Patent Applicant: Fujitsu Limited Patent Application Certification, Competent Patent Attorney Iku Ki Roben m* M Tate Kazu 2 Bento 3! +, inside 1) Yukio 1 Patent attorney Akira Yamaguchi lol! Figure 11. @Figure 2' 3 1 Figure 3 □

Claims (1)

【特許請求の範囲】[Claims] 1.1つの対象を制御する九めに現用!イクロコンC&
−タシよび予備用!イクロコン♂1−タを具備するマイ
クロコンビ、−声システムにおいて、前記現用マイクロ
コンビ、−夕の所定アドレス・噌スO電流を積分する積
分手−と、該積分手段の積分値が所定範囲にあるか否か
を判別する判別手段と、鋏判別手段の判別結果に応じて
割込み信号を前艷予備用マイクI2=ンビ、−夕に送出
する割込み信゛号発生手段と、を具備し、前記割込み信
号によ)前記対象への制御を前記現用iイタロコンビ、
−夕から前記予備用マイクロコンビ、−タに切替えて行
うようにしたことを特徴とするマイクロコンビ、−タシ
ステムにおける切替方式。
1. Current use for controlling one target! Ikrocon C &
-For sash and spares! A microcombiner equipped with a microcomputer 1 - In a voice system, the current microcombiner - an integrator that integrates a predetermined address and an integer current, and an integral value of the integrator are within a predetermined range. and interrupt signal generating means for transmitting an interrupt signal to the foreboard backup microphone I2 in accordance with the determination result of the scissors determining means, control to the target (by signal) to the current iItalo combination;
- A switching system in a microcombi-ta system, characterized in that switching is performed from the evening to the backup micro-combi-ta.
JP57047333A 1982-03-26 1982-03-26 Switching system of microcomputer system Granted JPS58165165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57047333A JPS58165165A (en) 1982-03-26 1982-03-26 Switching system of microcomputer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57047333A JPS58165165A (en) 1982-03-26 1982-03-26 Switching system of microcomputer system

Publications (2)

Publication Number Publication Date
JPS58165165A true JPS58165165A (en) 1983-09-30
JPS6331819B2 JPS6331819B2 (en) 1988-06-27

Family

ID=12772289

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57047333A Granted JPS58165165A (en) 1982-03-26 1982-03-26 Switching system of microcomputer system

Country Status (1)

Country Link
JP (1) JPS58165165A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH054234U (en) * 1991-06-27 1993-01-22 データテツク・エンタプライゼズ・カンパニー・リミテツド Minicomputer control unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5552170A (en) * 1978-10-09 1980-04-16 Toshiba Corp Composite computer system
JPS55131535A (en) * 1979-04-02 1980-10-13 Honda Motor Co Ltd Engine controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5552170A (en) * 1978-10-09 1980-04-16 Toshiba Corp Composite computer system
JPS55131535A (en) * 1979-04-02 1980-10-13 Honda Motor Co Ltd Engine controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH054234U (en) * 1991-06-27 1993-01-22 データテツク・エンタプライゼズ・カンパニー・リミテツド Minicomputer control unit

Also Published As

Publication number Publication date
JPS6331819B2 (en) 1988-06-27

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