JPS58162870A - Frequency detection circuit - Google Patents

Frequency detection circuit

Info

Publication number
JPS58162870A
JPS58162870A JP4457782A JP4457782A JPS58162870A JP S58162870 A JPS58162870 A JP S58162870A JP 4457782 A JP4457782 A JP 4457782A JP 4457782 A JP4457782 A JP 4457782A JP S58162870 A JPS58162870 A JP S58162870A
Authority
JP
Japan
Prior art keywords
signal
pulses
frequency region
detecting
high frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4457782A
Other languages
Japanese (ja)
Inventor
Keijiro Sakai
慶次郎 酒井
Nobuyoshi Muto
信義 武藤
Hiroshi Nagase
博 長瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4457782A priority Critical patent/JPS58162870A/en
Publication of JPS58162870A publication Critical patent/JPS58162870A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • G01R23/15Indicating that frequency of pulses is either above or below a predetermined value or within or outside a predetermined range of values, by making use of non-linear or digital elements (indicating that pulse width is above or below a certain limit)

Abstract

PURPOSE:To detect wide-range frequencies successively and precisely, by detecting the number N of pulses with specific time width T in a high frequency range, and detecting the T wit specific N in a low frequency range. CONSTITUTION:An encoder signal S2, after being frequency-divided to a double period by a counter 12 triggers a monostable multivibrator 14 and when the pulse width of a signal S4 is greater than the output pulse width of the monostable multivibrator 14, the output of an FF11 is 0, indicating the low frequency range. When the pulse width of the S4 is less, the output is 1, indicating the high frequency range l. In the high frequency range, the output S3 of an FF9 synchronizing with a signal S2 is a reference signal S7 whose pulse number is N, and supplied to a programmable timer element 8. In the low frequency range, on the other hand, the signal S4 is the N reference signal S7, and while N is constant, the time width T varies. At a raise of the output S8 of a counter 13, an interruption is caused and a microcomputer device calculates N/T on the basis of the N and T latched in timers #2 and #3 of the timer element T to detect the frequency.

Description

【発明の詳細な説明】 本発明は方形波パルスの周波数検出回路に係り、特許、
インクリメンタルエンコーダ1i用イア’jモータ回転
数を検出する周波数検出回路に関する。
[Detailed Description of the Invention] The present invention relates to a frequency detection circuit for square wave pulses, and includes patents, patents, etc.
The present invention relates to a frequency detection circuit that detects the rotational speed of an ear'j motor for an incremental encoder 1i.

従来、パルス周波数検出回路として、高周波)くルスを
用い、一定時間内に入力されるノくルス数をカウンタ回
路管用いて計数する方式がある。これは低周波になるに
従い、一定時間内に入るノ(ルス数が少なくなるので同
波数の検出精度が悪くなる欠褪がめる。
Conventionally, as a pulse frequency detection circuit, there is a method in which a high frequency pulse is used and the number of pulses input within a certain period of time is counted using a counter circuit tube. This is because as the frequency becomes lower, the number of noises that enter within a certain period of time decreases, so the accuracy of detecting the same wave number decreases.

又、低周波パルスの場合は、入カッくルス幅Tを計数し
、f−〒から周波数を検出する方式があるが、高周波に
なる#1ど入力パルス幅Tが小さくなり、Tの測定種度
が悪くなり、周波数の検出精質が悪くなる欠点がある。
In the case of low-frequency pulses, there is a method of counting the input pulse width T and detecting the frequency from f-〒, but at high frequency, the input pulse width T becomes smaller and the measurement type of T This has the drawback that the accuracy of frequency detection is poor and the precision of frequency detection is poor.

又、これら両者を組み合わせ、高周波領域では入力パル
ス数ケ計数し、低周波領域ではパルス幅倉計数する方式
があるが、これはパルス数計数回路とパルス幅計数回路
の2系統の回路が必要となり、回路が複軸になると共に
、高周波領域と低周波領域を連続的に切替えるのが峻か
しい欠点がある。
There is also a method that combines both of these, counting the number of input pulses in the high frequency range and counting the pulse width in the low frequency range, but this requires two circuits: a pulse number counting circuit and a pulse width counting circuit. However, the disadvantage is that the circuit becomes multi-axis, and it is difficult to continuously switch between the high frequency region and the low frequency region.

本発明の目的は、簡単な検出回路により、広い範囲の周
波数音連続的に精度良く検出するパルス周波数検出回路
を提供するにある。
An object of the present invention is to provide a pulse frequency detection circuit that continuously and accurately detects frequency sounds in a wide range using a simple detection circuit.

本発明の特徴は高周波領域では、時間幅Tを入力パルス
の立Eりに同期させて測定し、時間幅Tに入るパルス数
N?検出してN/Tよシ周波数を検出し、低周波領域で
は、入カパルス数N會常に一定として、パルスの立上り
に同期したパルス数N個区間の時間@Tを検出して周波
数検出回路なう点にあり、また、高周波領域と低周波領
域の判別信号は入力パルスの立上りでワンショットマル
チを動作させ、その出力信号幅と入カパルス幅ケ比較し
て作る点にある。
The feature of the present invention is that in the high frequency region, the time width T is measured in synchronization with the rising edge of the input pulse, and the number of pulses N? entering the time width T? In the low frequency region, the input pulse number N is always constant, and the frequency detection circuit detects the time @T of the interval of the number N of pulses synchronized with the rising edge of the pulse. In addition, the discrimination signal between the high frequency region and the low frequency region is generated by operating the one-shot multi at the rising edge of the input pulse and comparing the output signal width with the input pulse width.

第1図は本発明の適用対象の一例倉示すマイクロコンピ
ュータを用いた誘導電動機の可変速制御装置を示す。ポ
テンショメータ1で指定された目#li![1波数f1
の情報はマイコン装置2に入力される。一方、実際の銹
導電@機3の回転数fMは電#dJmに直結されたイン
クリメンタルエンコーダ4の出力信号から、本発明であ
る周波数検出回路5を介してマイコン装置に入力される
。そこで、マイコン装置によりf、とfwが一致するよ
うにゲート信号が作られる。この信号はゲートドライブ
回路6?介して増幅され、インバータなどから成る電力
変換装置7に与えられ、この結果、誘導電動機は速度制
御される。
FIG. 1 shows a variable speed control device for an induction motor using a microcomputer as an example to which the present invention is applied. #li specified by potentiometer 1! [1 wave number f1
The information is input to the microcomputer device 2. On the other hand, the actual rotational speed fM of the electric conductor 3 is inputted to the microcomputer device from the output signal of the incremental encoder 4 directly connected to the electric current #dJm via the frequency detection circuit 5 of the present invention. Therefore, a gate signal is created by a microcomputer device so that f and fw match. Is this signal gate drive circuit 6? The signal is amplified through the power converter 7, which includes an inverter, etc., and as a result, the speed of the induction motor is controlled.

このようなシステムの一例であるNCf−ポジステムで
は速度比が1000対1など大きく、シA・も高精度、
高応答で速度制御する必要があり、エンコーダ信号を低
周波領域から高周波領域まで短か、いサンプリング周期
ごとに精度良く検出しなければならない。このためには
、1fOJ転尚りのパルス数が大きいエンコーダを用い
た方が良いが、これは信号ケーブルの長さなどから限界
があり、主に入力パルス数のカウント値から周波数を検
出する高周波領域と入力パルス幅から検出する低周波領
域に分けて検出する必要がある。
The NCf-posi system, which is an example of such a system, has a high speed ratio of 1000:1, and has high accuracy and
It is necessary to control the speed with high response, and the encoder signal must be detected accurately at every short sampling period from the low frequency region to the high frequency region. For this purpose, it is better to use an encoder with a large number of pulses at 1fOJ transition, but this has a limit due to the length of the signal cable, etc., and is mainly used for high-frequency encoders that detect the frequency from the count value of the number of input pulses. It is necessary to separate the detection into low frequency regions based on the region and input pulse width.

次に、本発明の鴫波数検出回路を第2図に示す。Next, FIG. 2 shows a wave number detection circuit according to the present invention.

この回路は左側のディスクリート回路と右端に示すマイ
クロコンピュータ周辺素子として市販されているプログ
ラマブルタイマ素子8から構成される。このタイマ素子
8は、例えば、3つのタイマφl、φ2.φ3が内蔵さ
れており、φlは方形波パルス81を発生させる機能、
÷2はパルス数Nの基準信号S7に入るエンコーダ信号
S2のパルス数Nt検出する機能、又、ナ3ti、Nパ
ルス幅’l検出する機能として使用される。
This circuit is composed of a discrete circuit on the left and a programmable timer element 8, which is commercially available as a microcomputer peripheral element, shown on the right. This timer element 8 includes, for example, three timers φl, φ2 . φ3 is built-in, and φl has the function of generating square wave pulse 81.
÷2 is used as a function to detect the number Nt of pulses of the encoder signal S2 entering the reference signal S7 having a number N of pulses, and also as a function to detect Nt pulse width 'l.

ディスクリート回路は第2図に示すように接続され、フ
リップフロップ9,10.11とカウンタ12,13、
ワンショットマルf−14、(ンパータ15,16、論
理積素子17.18、論理和素子19.抵抗20,21
、コンデンサ22゜23から成る。この回路で、昼周波
領域の+2ゲ一ト信号となるN基準信号83は、φlの
方形波パルス信号Slを入力として、エンコーダ信号8
2のehりでラッチされる。この結果、83信号はS2
の立Jニジで同期された信号となる。
The discrete circuits are connected as shown in FIG.
One-shot multi-f-14, (amplifier 15, 16, AND element 17, 18, OR element 19, resistor 20, 21
, capacitors 22 and 23. In this circuit, the N reference signal 83, which is a +2 gate signal in the daytime frequency region, is generated by inputting the square wave pulse signal Sl of φl to the encoder signal 83.
It is latched at eh of 2. As a result, the 83 signal is S2
It becomes a synchronized signal at the rising J position.

次に、低周波領域のφ2ゲート信号となるワンショット
マルチ14の入力信号84 /ri、エンコーダ信号S
2の2倍周期に分周され、82信号の立上りで同期され
た信号となる。一方、高周波領域と低周波領域の判別信
号86はS4の立上りでワンショットマルチが動作し、
コンデンサ22と抵抗20で決まるパルス幅より84の
パルス幅が大きいと作0になり、低周波領域となる。
Next, the input signal 84 /ri of the one-shot multi 14, which becomes the φ2 gate signal in the low frequency region, and the encoder signal S
The frequency is divided to twice the period of 2, and the signal is synchronized at the rising edge of the 82 signal. On the other hand, the high frequency region and low frequency region discrimination signal 86 operates as a one-shot multi at the rising edge of S4.
If the pulse width of 84 is larger than the pulse width determined by the capacitor 22 and the resistor 20, the output will be 0, and it will be in the low frequency region.

逆に、84パルス幅が小さいときはlになり、−周波領
域となる。フリップフロップ回路10゜11は低周波か
ら高周波に切替わるときの過渡状態を考1し、高周波、
低周波判別信号S6の信号がエンコーダ信号S2の立上
りで切替わるように設けたものである。又、抵抗21と
コンデンサ23から成るフィルタは、86の切替わり時
に発生する微少幅のパルスを吸収する丸めに設けられる
。上述の回路の定常状態での高周波領域の信号タイムチ
ャートを第3図に、低周波領域の信号タイムチャートを
第4図にそれぞれ示す。第3図から、高周波領域では判
別信号S6は工なので、エンコーダ信号S2の立上りと
同期されたS3信号がパルス数Nの基準信号S7となる
。この場合、時間1[Tは+1タイマの基準信号S1の
周期でほぼ決まり、エンコーダ信号S2のパルス数Nが
変わる。
On the other hand, when the 84 pulse width is small, it becomes l, which is the − frequency region. The flip-flop circuits 10 and 11 are designed to handle high frequencies, considering the transient state when switching from low frequency to high frequency.
It is provided so that the low frequency discrimination signal S6 is switched at the rising edge of the encoder signal S2. Further, a filter consisting of a resistor 21 and a capacitor 23 is provided in a round shape to absorb minute width pulses generated when the switch 86 is switched. FIG. 3 shows a signal time chart of the above-described circuit in the high frequency region in a steady state, and FIG. 4 shows a signal time chart of the low frequency region. From FIG. 3, since the discrimination signal S6 is low in the high frequency region, the S3 signal synchronized with the rise of the encoder signal S2 becomes the reference signal S7 with the number of pulses N. In this case, the time 1[T is approximately determined by the period of the reference signal S1 of the +1 timer, and the number N of pulses of the encoder signal S2 changes.

一方、第4図に示す低周波領域では、判別信号S6は0
となるので、エンコーダ信号S2の立丘シと同期した2
倍周期の信号S4がNl!に単信号S7となる。この場
合、Nは常に一定であり時間幅Tが変わる。
On the other hand, in the low frequency region shown in FIG. 4, the discrimination signal S6 is 0.
Therefore, 2 synchronized with Tateoka of encoder signal S2
The double period signal S4 is Nl! becomes a single signal S7. In this case, N is always constant and the time width T changes.

次に、高周波領域から低周波領域へ切替わる過渡状態の
タイムチャートl第5図に示す。この場合も、必ず、エ
ンコーダ信号S2の立上りにすべての信号が同期され連
続的に切替わる。低周波から高周波へ切替わる過渡状軸
のタイムチャート?第6図に示す。この場合も同様に、
エンコーダ信号82の立上シにすべての信号が同期して
連続的に切替わる。・ 次にプログラマグルタ1フ累子の動作を第7図により説
明する。エンコーダパルス数Nの基準信号S7とNパル
ス区間の周期FITの基準信号S8は必ずエンコーダ信
号S2の立上りに同期されており、夕(?VC82,8
’7.88?$2図に示す101略で入力し次場合、パ
ルス数Nは87信号の立下りから次の立下りまでに入る
エンコーダ信号S2がカウントされる。
Next, FIG. 5 shows a time chart of a transient state in which the high frequency region is switched to the low frequency region. In this case as well, all the signals are always synchronized with the rising edge of the encoder signal S2 and switched continuously. Time chart of transient axis switching from low frequency to high frequency? It is shown in FIG. Similarly, in this case,
All signals are continuously switched in synchronization with the rising edge of the encoder signal 82. - Next, the operation of the programmer grouper 1 will be explained with reference to FIG. The reference signal S7 with the number N of encoder pulses and the reference signal S8 with the cycle FIT of the N pulse section are always synchronized with the rising edge of the encoder signal S2,
'7.88? $2 In the case where 101 shown in the figure is input, the number of pulses N is 87. Encoder signal S2 that enters from the falling edge of the signal to the next falling edge is counted.

一方、19115蝙Tは88信号の0区間、タイマ内絨
クロック(通常lμS幅クコクロックカウントされ、時
間幅Tとなる。この結果、$8信号の立上りで割込みが
発生し、プログラマブルタイマにランチされたNとTの
情報ケマイコン装電で入力し、N/Tを、it寞して、
これが周波数検出値fにとなる。
On the other hand, 19115 FUT is counted during the 0 interval of the 88 signal, and the time width is T. The time width is T. As a result, an interrupt is generated at the rising edge of the $8 signal, and the programmable timer is launched. Input the N and T information on the microcomputer, and then convert the N/T to the computer.
This becomes the frequency detection value f.

本実施例によれば、エンコーダ信号S2の立上シと同期
してパルスdNとNパルス時間幅Tから周波数検出値る
ので高精度の検出ができる。更に、高周波領域と低周波
領域に分けた方式で検出し、この切替えを連続的に行な
うので周波数検出範囲が非常に大きくなる効果がある。
According to this embodiment, since the frequency detection value is obtained from the pulse dN and the N pulse time width T in synchronization with the rising edge of the encoder signal S2, highly accurate detection is possible. Furthermore, detection is performed using a method divided into a high frequency region and a low frequency region, and this switching is performed continuously, which has the effect of greatly increasing the frequency detection range.

なお、高周波領域においてタイマナlの発振周期tiえ
ることにより検出のサンプリング同期が変えられるとい
う効果もめる。
Furthermore, by increasing the oscillation period ti of the timer l in the high frequency region, the sampling synchronization of detection can be changed.

本発明によれば、簡単な回路で、エンコーダ信号と同期
してパルス数NとN /<ルス時間幅T1に連続して検
出できるので、検出精度が高く、検出範囲が拡大する。
According to the present invention, it is possible to continuously detect the number of pulses N and N/<pulse time width T1 in synchronization with the encoder signal with a simple circuit, so that the detection accuracy is high and the detection range is expanded.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の適用対象でるる誘導電動機の可変速制
御のブロック図、第2図は本発明の一実施例を示す周波
数検出回路図、第3図は高周波領域における本発明回路
の信号タイムチャート、第4図は低周波領域における本
発明の信号タイムチャート、第5図は高周波領域から低
周波領域へ切替わる際の本発明の信号タイムチャー、ト
、第6図は低周波領域から高周波領域へ切替わる際の本
発明の信号タイムチャート、第7図は本発明のプログラ
マブルタイマ素子の動作説明図である。 8・・・プログラマブルタイマ素子、9,10.11・
・・フリップ・フロップ、12.13・・・カウンタ、
14・・・ワンショットマルチ、15.16・・・イン
ノ(−タ、17.18・・・論理積素子、19・・・鍮
理和素¥3図 茶4図
Fig. 1 is a block diagram of variable speed control of an induction motor to which the present invention is applied, Fig. 2 is a frequency detection circuit diagram showing an embodiment of the present invention, and Fig. 3 is a signal of the inventive circuit in a high frequency region. 4 is a signal time chart of the present invention in the low frequency region. FIG. 5 is a signal time chart of the present invention when switching from the high frequency region to the low frequency region. FIG. 7 is a signal time chart of the present invention when switching to a high frequency region, and is an explanatory diagram of the operation of the programmable timer element of the present invention. 8...programmable timer element, 9,10.11.
...Flip-flop, 12.13...Counter,
14... One-shot multi, 15.16... Inno(-ta, 17.18... Logical product element, 19... Brass logic and sum element ¥ 3 figure Brown 4 figure

Claims (1)

【特許請求の範囲】 1、方形波パルスの周波数検出回路において、高周波領
域、低周波領域のそれぞれ判別信号管発生させる判別回
路と、高周波領域並びに低周波領域のそれぞれパルス数
N検出用基準信号ケ発生させる回路と、前記パルス数N
とNパルス時間幅Tar計数する回路とから成シ、入力
パルスのエツジと同期して、前記両判別信号?切替える
と共に、前記高周波領域では入力パルスのエツジと同期
して前記N%T?検出し、N/Tより周波数を検出する
手段と、前記低周波領域では入力パルスのエツジと同期
して、前記N一定状態で*紀Tfr検出し、N/Tより
周波数を検出する手段とからなることを特徴とする周波
数検出回路。 2、特許請求の範囲I41項において、前記パルス数N
とN ハルス時間巾Tfr計数する回路がプログラマブ
ルタイマ素子であり、両組判別信号が前記入力パルスの
エツジと同期したワンショットマルチ出力幅と入力パル
ス幅を比較することで設定された信号であシ、前記高周
波領域の前記ノくルス数N検出用基準信号が検出のブン
ブリングタイムを設定した信号を入力として、前記入カ
ッ(ルスのエツジでランチされた出力信号であり、そし
て、前記低周波領域のパルス数N検出用基準信号が前記
入力パルス?分周した信号であることを特徴とする周波
数検出回路。
[Scope of Claims] 1. In a square wave pulse frequency detection circuit, a discrimination circuit for generating signal tubes for discriminating each of the high frequency region and low frequency region, and a reference signal tube for detecting the number N of pulses for each of the high frequency region and the low frequency region are provided. The circuit for generating the pulses and the number of pulses N
and a circuit for counting the N pulse time width Tar, and in synchronization with the edge of the input pulse, the two discrimination signals ? At the same time, in the high frequency region, the N%T? is synchronized with the edge of the input pulse. means for detecting the frequency from N/T; and means for detecting the frequency from N/T in the low frequency region in synchronization with the edge of the input pulse in the N constant state, and detecting the frequency from N/T. A frequency detection circuit characterized by: 2. In claim I41, the number of pulses N
and N The circuit that counts the Hals time width Tfr is a programmable timer element, and the two-set discrimination signal is a signal set by comparing the input pulse width with the one-shot multi output width synchronized with the edge of the input pulse. , the reference signal for detecting the Norkle number N in the high frequency region is an output signal launched at the edge of the input pulse by inputting a signal in which a detection bumping time is set, and A frequency detection circuit characterized in that a reference signal for detecting the number N of pulses in a region is a frequency-divided signal of the input pulse.
JP4457782A 1982-03-23 1982-03-23 Frequency detection circuit Pending JPS58162870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4457782A JPS58162870A (en) 1982-03-23 1982-03-23 Frequency detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4457782A JPS58162870A (en) 1982-03-23 1982-03-23 Frequency detection circuit

Publications (1)

Publication Number Publication Date
JPS58162870A true JPS58162870A (en) 1983-09-27

Family

ID=12695353

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4457782A Pending JPS58162870A (en) 1982-03-23 1982-03-23 Frequency detection circuit

Country Status (1)

Country Link
JP (1) JPS58162870A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180460U (en) * 1984-10-31 1986-05-28
CN108169557A (en) * 2017-11-24 2018-06-15 中核控制系统工程有限公司 A kind of implementation method of high-speed pulse amount intelligent acquisition

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180460U (en) * 1984-10-31 1986-05-28
JPH0333013Y2 (en) * 1984-10-31 1991-07-12
CN108169557A (en) * 2017-11-24 2018-06-15 中核控制系统工程有限公司 A kind of implementation method of high-speed pulse amount intelligent acquisition

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