JPS58162653U

JPS58162653U - pressure sensitive device

Info

Publication number: JPS58162653U
Application number: JP5917582U
Authority: JP
Inventors: 安部　有正; 江原　正広
Original assignee: オムロン株式会社
Priority date: 1982-04-22
Filing date: 1982-04-22
Publication date: 1983-10-29

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図から第３図は従来例を示し、第１図は半導体感圧
装置の平面図、第２図は同断面図、第３図は電気回路図
、第４図はブリッジ回路の零点不平衡出力電圧の温度特
性曲線を示すグラフ、第５図は結晶軸方向と抵抗体の長
手方向との関係を説明するための図、第６図および第７
図はこの考案の実施例を示すものであって、第６図は半
導体感圧装置の平面図、第７図は電気回路図、第８図は
変形例を示す平面図である。１〜４．１１〜１４・・・ピエゾ抵抗体、５・・・半導
体基板、５ａ・・・ダイヤフラム部、５ｂ・・・肉厚部
、８．１８・・・ブリッジ回路、１０．２０・・・定電
流電源。第３図第４図、Figures 1 to 3 show conventional examples, where Figure 1 is a plan view of a semiconductor pressure-sensitive device, Figure 2 is a sectional view of the same, Figure 3 is an electric circuit diagram, and Figure 4 is a zero point fault of a bridge circuit. A graph showing the temperature characteristic curve of the balanced output voltage, Figure 5 is a diagram for explaining the relationship between the crystal axis direction and the longitudinal direction of the resistor, Figures 6 and 7.
The figures show an embodiment of this invention, in which FIG. 6 is a plan view of a semiconductor pressure-sensitive device, FIG. 7 is an electric circuit diagram, and FIG. 8 is a plan view showing a modified example. 1-4.11-14... Piezoresistor, 5... Semiconductor substrate, 5a... Diaphragm part, 5b... Thick part, 8.18... Bridge circuit, 10.20...・Constant current power supply. Figure 3 Figure 4

Claims

[Scope of utility model registration request]

(1) A substrate that deforms due to pressure. On this substrate, there is a first bridge circuit consisting of a piezoresistor arranged so that the resistance value changes as the substrate deforms, and on the substrate, the resistance value changes due to the deformation of the substrate. Alternatively, the temperature coefficient of the zero-point unbalanced output voltage of the first and second pull ridge circuits is are set so that their absolute values are equal and opposite in sign, and the first and second bridge circuits are connected to cancel the temperature dependence of their output voltages.

(2) The substrate is a semiconductor, and the piezoresistor is formed on this semiconductor substrate, the scope of utility model registration claim No. (
The pressure sensitive device described in section 1).

(3) The substrate is a semiconductor substrate, and the resistor of the second bridge circuit is arranged such that the longitudinal direction of the resistor of the first bridge circuit coincides with the crystal axis direction having a large piezoresistance coefficient of the semiconductor substrate. , the piezoresistor is formed on the semiconductor substrate so that its longitudinal direction coincides with the crystal axis direction in which the piezoresistance coefficient of the semiconductor substrate is zero or negligible; The pressure sensitive device according to item (1).

(4) The central part of the board is formed thinly, and this thin part becomes the pressure receiving part, and the piezoresistor of the first bridge circuit is the pressure receiving part, and the piezoresistor of the second bridge circuit is the part of the board. The pressure-sensitive device according to claim (1) of the utility model registration, wherein the pressure-sensitive device is arranged in each of the surrounding thick-walled portions.