JPS58161521A - Electronic volume device - Google Patents

Electronic volume device

Info

Publication number
JPS58161521A
JPS58161521A JP4495882A JP4495882A JPS58161521A JP S58161521 A JPS58161521 A JP S58161521A JP 4495882 A JP4495882 A JP 4495882A JP 4495882 A JP4495882 A JP 4495882A JP S58161521 A JPS58161521 A JP S58161521A
Authority
JP
Japan
Prior art keywords
electronic volume
volume device
operational amplifier
attenuation
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4495882A
Other languages
Japanese (ja)
Other versions
JPH0224404B2 (en
Inventor
Kozo Nuriya
塗矢 康三
Shinya Sano
信哉 佐野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4495882A priority Critical patent/JPS58161521A/en
Publication of JPS58161521A publication Critical patent/JPS58161521A/en
Publication of JPH0224404B2 publication Critical patent/JPH0224404B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/24Frequency-independent attenuators

Landscapes

  • Networks Using Active Elements (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To reduce the level of click sounds produced when the degree of attenuation is varied, by providing a diode limiter circuit at the input side of an operational amplifier which forms an electronic volume device. CONSTITUTION:A signal source 1 is connected to an operational amplifier 4 via a resistance network 2 and a switch means 3. The input signal supplied from the source 1 is extracted through an output terminal 6 after the degree of attenuation of the input signal is varied by controlling the means 3. Then a diode limiter circuit 7 consisting of diodes 20-1 and 20-2 connected adversely to each other is added to the input side of the amplifier 4 of an electronic volume device. The circuit 7 functions to suppress the level of impulsive noises that are produced when the degree of attenuation is varied for the input signal. Thus the generaton of click sounds can be reduced.

Description

【発明の詳細な説明】 本発明は抵抗ネットワークとスイッチ手段を介して入力
信号を演算増幅器に結合し、上記スイッチ手段を制御手
段によって制御して入力される信号の減衰度を変化する
ように構成した電子ボリウム装置に関するものであり、
犬の目的とするところは信号の減衰度を変化させる際に
発生するクリック音を小さくすることができる電子ボリ
ウム装置を提供することにある。
DETAILED DESCRIPTION OF THE INVENTION The present invention is configured to couple an input signal to an operational amplifier via a resistor network and a switch means, and control the switch means by a control means to change the degree of attenuation of the input signal. It relates to an electronic volume device,
The purpose of the dog is to provide an electronic volume device that can reduce the click noise generated when changing the degree of signal attenuation.

一般に、電子ボリウム装置は第1図に示すように信号源
1を抵抗ネットワーク2およびスイッチ手段3を介して
演算増幅器4に結合し、上記スイッチ手段3を制御手段
6によって制御することにより、出力端6に上記信号源
1からの入力信号Eの減衰度を変化して出力E0を取り
出すように構成していた。ここで、上記抵抗ネットワー
ク2は、直列に接続されたn−2個の抵抗器12−1゜
12−2.12−3 ・・・・・・12−71−2と、
これら抵抗器12−1.12−2.12−3・・・・・
・12−H−2の各抵抗値Rの2倍の抵抗値2Rを有し
、かつ上記抵抗器12−1.12−2.12−3・・・
・・・2−fi −2の両端にそれぞれ一端を接したn
+1個の抵抗器13−1.13−2.13−3・・・・
・・13−H+1とで構成されている。また、スイッチ
手段3は、上記抵抗器13−1.13−2.13−3・
・・・・・13−nの各々の他端に一端が接続されたn
個の半導体スイッチ14−1゜14−2.14−3・・
・・・・14−nと上記抵抗器13〜1 .13−2 
、13−3・ゆ・・・・13−fi’の各々の他端に一
端が接続され、かつ他端が接地されたn個の半導体スイ
ッチ15−1.15−2゜16−3・・・・・・15−
nとで構成されておシ、n対のスイッチ手段を有してい
る。まだ、演算増幅器4は、上記半導体スイッチ14−
1.14−2゜14−3・・・・・・14−nの各々の
他端に逆相入力端を接続し、同相入力端を接地した差動
増幅器16とその入出力端間に挿入して抵抗17とで構
成されている。まだ、制御手段6は、上記半導体スイッ
チ14−1.14−2.14−3・・・・・・14−n
にそれぞれ制御信号を入力するコントローラ18とこの
コントローラ18からの制御信号を反転して上記半導体
スイッチ15−1 、15−2 .15−3・・・・・
・15−nにそれぞれ入力するインバータ19−1.1
9−2.19−3=−・−19−nとで構成されている
。このような構成において、いま、マイクロコンピュー
タ等で構成されるコントローラ18が演算増幅器4の仮
想接地点に接続される半導体スイッチ14−1.14−
2.14−3・・・・・弓4−fiの半導体スイッチ1
4−1のみ導通させる制御信号を出しだ場合には、出力
端6の出力信号E。は、 R Eo=−yπE蝙−E・・・・・・1 の如くなり、まだ半導体スイッチ14−2のみが導通し
た場合は、 一一″−×(1/2E)=−1/2E・・・・2O−2
R の如くなり、この場合、A点から左右どちらを見ても合
成インピーダンスは、Rとなる為A点にかかる信号は1
/2Eとなる。
Generally, as shown in FIG. 1, an electronic volume device couples a signal source 1 to an operational amplifier 4 via a resistor network 2 and a switch means 3, and controls the switch means 3 by a control means 6, thereby controlling the output terminal. 6, the attenuation degree of the input signal E from the signal source 1 is changed to obtain an output E0. Here, the resistance network 2 includes n-2 resistors 12-1゜12-2.12-3...12-71-2 connected in series,
These resistors 12-1.12-2.12-3...
・Has a resistance value 2R that is twice the resistance value R of each resistor 12-H-2, and the resistor 12-1.12-2.12-3...
...2-fi -n with one end touching both ends of -2
+1 resistor 13-1.13-2.13-3...
...13-H+1. Further, the switch means 3 includes the resistors 13-1.13-2.13-3.
...13-n with one end connected to the other end of each
semiconductor switches 14-1゜14-2.14-3...
...14-n and the resistors 13-1. 13-2
, 13-3 y... 13-fi', and the other end is grounded. ...15-
n, and has n pairs of switch means. Still, the operational amplifier 4 is connected to the semiconductor switch 14-
1. Connect the negative phase input terminal to the other end of each of 14-2゜14-3...14-n, and insert it between the differential amplifier 16 whose common mode input terminal is grounded and its input/output terminal. and a resistor 17. Still, the control means 6 controls the semiconductor switches 14-1.14-2.14-3...14-n.
A controller 18 inputs a control signal to each of the semiconductor switches 15-1, 15-2 . 15-3...
・Inverters 19-1.1 each input to 15-n
9-2.19-3=-·-19-n. In such a configuration, a controller 18 composed of a microcomputer or the like is connected to a semiconductor switch 14-1.14- connected to a virtual ground point of the operational amplifier 4.
2.14-3... Bow 4-fi semiconductor switch 1
When outputting a control signal that makes only 4-1 conductive, the output signal E at the output terminal 6. is as follows: R Eo=-yπE-E...1, and if only the semiconductor switch 14-2 is still conductive, then 11''-x(1/2E)=-1/2E・...2O-2
In this case, no matter which way you look from point A to the left or right, the combined impedance is R, so the signal applied to point A is 1.
/2E.

まだ、半導体スイッチ14−2,14−3両方のみ導通
した場合は、 Eo−−←ン+÷)E=−3/、E・・・・・・3の如
くなる0そして、上記半導体スイ・ソチ14−1.14
−2・・・・・・14−nと対をなす半導体スイッチ1
5−1.15−2・・・・・・15−nはコントローラ
18からの制御信号を反転するインバータ19−1.1
9−2−−−−−−19−HにてOFFされる。例へば
半導体スイッチ14−1がONの場合、半導体スイッチ
IE)−1,はOFFと云う動作を作り出す。
If only both the semiconductor switches 14-2 and 14-3 are still conductive, then Eo--←+÷)E=-3/, E...3. Sochi 14-1.14
Semiconductor switch 1 paired with -2...14-n
5-1.15-2...15-n is an inverter 19-1.1 that inverts the control signal from the controller 18.
It is turned off at 9-2---19-H. For example, when the semiconductor switch 14-1 is ON, the semiconductor switch IE)-1 produces an OFF operation.

しかしながら、この様な電子ボリウム装置の構成におい
ては、半導体スイッチ14−1.14−2・・・・・−
14−nおよび15−1.15−2・・・・・・15−
nが切換る時、半導体スイッチの極間容量によりクリッ
ク音を発生するという問題があった。
However, in the configuration of such an electronic volume device, semiconductor switches 14-1, 14-2...-
14-n and 15-1.15-2...15-
There is a problem in that when n is switched, a clicking sound is generated due to the capacitance between the electrodes of the semiconductor switch.

その様子を第2図により説明すると、半導体スイッチと
して用いたMO8電界効果トランジスタ15−2のゲー
トに第2図に示す如く振幅がVの制御信号a、bが印加
されると、この電界効果トランジスタ15−2のゲート
−ソース間の容量C8により、演算増幅器4の人力にそ
の制御信号が微分された雑音(りlルック音)Cが印加
される。
To explain this situation with reference to FIG. 2, when control signals a and b with amplitudes of V are applied to the gate of the MO8 field effect transistor 15-2 used as a semiconductor switch, as shown in FIG. Due to the capacitance C8 between the gate and the source of 15-2, a noise (ril-look sound) C, which is obtained by differentiating the control signal, is applied to the human power of the operational amplifier 4.

本発明は、このような従来の欠点を解消するものであり
、演算増幅器の入力側にダイオードリミッタ回路を設け
、クリ、ツク音のレベルを低く抑えることにより、り1
ルツク音の発生を防止するようにしだものである。
The present invention eliminates these conventional drawbacks, and provides a diode limiter circuit on the input side of the operational amplifier to suppress the level of click and click noises.
This is designed to prevent the occurrence of sound.

以下、本発明の電子ボリウム装置につして実施例の図面
を基に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The electronic volume device of the present invention will be described below with reference to drawings of embodiments.

第3図は本発明の電子ボリウム装置の一実施例を示して
おり、第3図中、第1図に同一符号は同様の構成要素を
示している。第3図において、第1図と異なるところは
互に逆接続されたダイオード20−1 .20−2でな
るダイオードリミッタ回路7を演算増幅器4を構成する
差動増幅器16の逆相入力端と接地間に挿入したことで
ある。この場合、D点は半導体スイッチ14−1.14
−2.14−3・・・・・・14−nの仮想接地点であ
り、入力端子Cからの信号振幅はきわめて小さい(=’
OV)、ダイオード20−1.20−2による非通線歪
の発生は全く問題がない。このような構成において、い
ま、半導体スイッチ14−1の制御入力端に第4図に示
すように制御信号aが印加されると、上記半導体スイッ
チ14−1の仮想接地点りに第4図に破線で示すような
波高値Vの・パルス性雑音すが発生するが、上記ダイオ
ードリミッタ回路7により、上記パルス性雑音bt4の
波高値ゾは第4図に実線で示すようにダイオード20−
1.20−2の順方向電圧に相当する大きさvfに制限
され、雑音レベルを低く押えることができる。尚、一般
的にば1)=ts〜16Vであり、Z’ f= 0.2
 V程度である。
FIG. 3 shows an embodiment of the electronic volume device of the present invention, and in FIG. 3, the same reference numerals as in FIG. 1 indicate the same components. In FIG. 3, the difference from FIG. 1 is that diodes 20-1. 20-2 is inserted between the negative phase input terminal of the differential amplifier 16 constituting the operational amplifier 4 and the ground. In this case, point D is the semiconductor switch 14-1.14
-2.14-3...14-n is a virtual ground point, and the signal amplitude from input terminal C is extremely small (='
OV), there is no problem at all with the occurrence of non-conducting distortion due to the diodes 20-1 and 20-2. In such a configuration, when the control signal a is applied to the control input terminal of the semiconductor switch 14-1 as shown in FIG. 4, the virtual ground point of the semiconductor switch 14-1 is applied as shown in FIG. Pulse noise with a peak value V as shown by the broken line is generated, but the diode limiter circuit 7 reduces the peak value of the pulse noise bt4 by the diode 20- as shown by the solid line in FIG.
The noise level can be kept low by being limited to a magnitude vf corresponding to a forward voltage of 1.20-2. In general, 1) = ts ~ 16V, and Z' f = 0.2
It is about V.

以上、詳述したように本発明によれば、演算増幅器の入
力側にダイオードリミッタ回路を設けたので、入力され
る信号の減衰度を変化させる際に発生するパルス性雑音
を低く押えることができ、もってクリック音の発生を小
さくすることができる利点を有するものである。
As detailed above, according to the present invention, since a diode limiter circuit is provided on the input side of the operational amplifier, it is possible to suppress the pulse noise generated when changing the attenuation degree of the input signal. , which has the advantage of reducing the occurrence of click sounds.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電子ポリウム装置の回路図、第2図は同
装置の動作説明図、第3図は本発明の電子ボリウム装置
の一実施例を示す回路図、第4図は同装置の動作説明図
である。 1 ・・・・・・信号源、2・・・・・・抵抗ネットワ
ーク、3・・・・・・スイッチ手段、4・・・・・・演
算増幅器、6・・・・・・制御手段、6・・・・・・出
力端、7・・・・・・ダイオードリミッタ回路。 第1図 第3図 q/ 第4VA
Fig. 1 is a circuit diagram of a conventional electronic volume device, Fig. 2 is an explanatory diagram of the operation of the same device, Fig. 3 is a circuit diagram showing an embodiment of the electronic volume device of the present invention, and Fig. 4 is a circuit diagram of the same device. It is an operation explanatory diagram. 1... Signal source, 2... Resistor network, 3... Switch means, 4... Operational amplifier, 6... Control means, 6... Output end, 7... Diode limiter circuit. Figure 1 Figure 3 q/ 4th VA

Claims (1)

【特許請求の範囲】[Claims] 信号源を抵抗ネットワークおよびスイッチ手段を介して
演算増幅器に結合し、上記スイッチ手段を制御手段によ
って制御することにより上記信号源からの信号の減衰度
を変化して取シ出すように構成すると共に、上記演算増
幅器の入力側にダイオードリミッタ回路を設けてなる電
子ボリウム装置。
A signal source is coupled to an operational amplifier via a resistor network and a switch means, and the switch means is controlled by a control means to vary the degree of attenuation of the signal from the signal source and extract the signal; An electronic volume device comprising a diode limiter circuit provided on the input side of the operational amplifier.
JP4495882A 1982-03-19 1982-03-19 Electronic volume device Granted JPS58161521A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4495882A JPS58161521A (en) 1982-03-19 1982-03-19 Electronic volume device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4495882A JPS58161521A (en) 1982-03-19 1982-03-19 Electronic volume device

Publications (2)

Publication Number Publication Date
JPS58161521A true JPS58161521A (en) 1983-09-26
JPH0224404B2 JPH0224404B2 (en) 1990-05-29

Family

ID=12705988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4495882A Granted JPS58161521A (en) 1982-03-19 1982-03-19 Electronic volume device

Country Status (1)

Country Link
JP (1) JPS58161521A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6093812A (en) * 1983-10-26 1985-05-25 Nec Corp Integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511503A (en) * 1974-06-27 1976-01-08 Ngk Insulators Ltd TASOSERAMITSUKUKIBANNO SEIZOHO
JPS5334872U (en) * 1976-08-31 1978-03-27

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511503A (en) * 1974-06-27 1976-01-08 Ngk Insulators Ltd TASOSERAMITSUKUKIBANNO SEIZOHO
JPS5334872U (en) * 1976-08-31 1978-03-27

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6093812A (en) * 1983-10-26 1985-05-25 Nec Corp Integrated circuit
JPH0317244B2 (en) * 1983-10-26 1991-03-07 Nippon Electric Co

Also Published As

Publication number Publication date
JPH0224404B2 (en) 1990-05-29

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