JPH0224404B2 - - Google Patents
Info
- Publication number
- JPH0224404B2 JPH0224404B2 JP57044958A JP4495882A JPH0224404B2 JP H0224404 B2 JPH0224404 B2 JP H0224404B2 JP 57044958 A JP57044958 A JP 57044958A JP 4495882 A JP4495882 A JP 4495882A JP H0224404 B2 JPH0224404 B2 JP H0224404B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- operational amplifier
- semiconductor switch
- switching means
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 description 18
- 238000010586 diagram Methods 0.000 description 5
- 230000005669 field effect Effects 0.000 description 2
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/24—Frequency-independent attenuators
Landscapes
- Networks Using Active Elements (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
【発明の詳細な説明】
本発明は抵抗ネツトワークとスイツチ手段を介
して入力信号を演算増幅器に結合し、上記スイツ
チ手段を制御手段によつて制御して入力される信
号の減衰度を変化するように構成した電子ボリウ
ム装置に関するものであり、その目的とするとこ
ろは信号の減衰度を所望の値に変化させると共
に、この変化させる際に発生するクリツク音を小
さくすることができる電子ボリウム装置を提供す
ることにある。DETAILED DESCRIPTION OF THE INVENTION The present invention couples an input signal to an operational amplifier via a resistor network and switching means, and controls the switching means by control means to vary the degree of attenuation of the input signal. The purpose of this invention is to provide an electronic volume device that can change the degree of attenuation of a signal to a desired value and reduce the clicking noise that occurs during this change. It is about providing.
一般に、電子ボリウム装置は第１図に示すよう
に信号源１を抵抗ネツトワーク２およびスイツチ
手段３を介して演算増幅器４に結合し、上記スイ
ツチ手段３を制御手段５によつて制御することに
より、出力端６に上記信号源１からの入力信号Ｅ
の減衰度を変化して出力E0を取り出すように構
成していた。ここで、上記抵抗ネツトワーク２
は、直列に接続されたｎ−２個の抵抗器１２−
１，１２−２，１２−３…１２−ｎ−２と、これ
ら抵抗器１２−１，１２−２，１２−３…１２−
ｎ−２の各抵抗値Ｒの２倍の抵抗値2Rを有し、
かつ上記抵抗器１２−１，１２−２，１２−３…
２−ｎ−２の両端にそれぞれ一端を接したｎ＋１
個の抵抗器１３−１，１３−２，１３−３…１３
−ｎ＋１とで構成されている。また、スイツチ手
段３は、上記抵抗器１３−１，１３−２，１３−
３…１３−ｎの各々の他端に一端が接続されたｎ
個の半導体スイツチ１４−１，１４−２，１４−
３…１４−ｎと上記抵抗器１３−１，１３−２，
１３−３…１３−ｎの各々の他端に一端が接続さ
れ、かつ他端が接地されたｎ個の半導体スイツチ
１５−１，１５−２，１５−３…１５−ｎとで構
成されており、ｎ対のスイツチ手段を有してい
る。また、演算増幅器４は、上記半導体スイツチ
１４−１，１４−２，１４−３…１４−ｎの各々
の他端に逆相入力端を接続し、同相入端を接地し
た差動増幅器１６とその入出力端間に挿入して抵
抗１７とで構成されている。また、制御手段５
は、上記半導体スイツチ１４−１，１４−２，１
４−３…１４−ｎにそれぞれ制御信号を入力する
コントローラ１８とこのコントローラ１８からの
制御信号を反転して上記半導体スイツチ１５−
１，１５−２，１５−３…１５−ｎにそれぞれ入
力するインバータ１９−１，１９−２，１９−３
…１９−ｎとで構成されている。このような構成
において、いま、マイクロコンピユータ等で構成
されるコントローラ１８が演算増幅器４の仮想接
地点に接続される半導体スイツチ１４−１，１４
−２，１４−３…１４−ｎの半導体スイツチ１４
−１のみ導通させる制御信号を出した場合には、
出力端６の出力信号E0は、
E0＝−2R／2RＥ≒−Ｅ ………１
の如くなり、また半導体スイツチ１４−２のみが
導通した場合は、
E0＝−2R／2R×（1/2Ｅ）＝−1/2Ｅ ………２
の如くなり、この場合、Ａ点から左右どちらを見
ても合成インピーダンスはＲとなる為Ａ点にか
かる信号は1/2Ｅとなる。 Generally, an electronic volume device is constructed by coupling a signal source 1 to an operational amplifier 4 via a resistor network 2 and a switching means 3, and controlling the switching means 3 by a control means 5, as shown in FIG. , the input signal E from the signal source 1 is input to the output terminal 6.
The configuration was such that the output E 0 was obtained by changing the degree of attenuation. Here, the resistance network 2
is n-2 resistors 12- connected in series
1, 12-2, 12-3...12-n-2, and these resistors 12-1, 12-2, 12-3...12-
It has a resistance value 2R that is twice the resistance value R of each n-2,
and the resistors 12-1, 12-2, 12-3...
n+1 with one end touching each end of 2-n-2
resistors 13-1, 13-2, 13-3...13
-n+1. Further, the switch means 3 includes the resistors 13-1, 13-2, 13-
3...n with one end connected to the other end of each of 13-n
semiconductor switches 14-1, 14-2, 14-
3...14-n and the resistors 13-1, 13-2,
It is composed of n semiconductor switches 15-1, 15-2, 15-3...15-n, one end of which is connected to the other end of each of the switches 13-3...13-n, and the other end of which is grounded. It has n pairs of switch means. The operational amplifier 4 also includes a differential amplifier 16 whose anti-phase input ends are connected to the other ends of each of the semiconductor switches 14-1, 14-2, 14-3...14-n, and whose in-phase input ends are grounded. A resistor 17 is inserted between the input and output terminals. In addition, the control means 5
is the semiconductor switch 14-1, 14-2, 1
A controller 18 inputs a control signal to each of 4-3...14-n, and the control signal from this controller 18 is inverted to the semiconductor switch 15-n.
Inverters 19-1, 19-2, 19-3 input to 1, 15-2, 15-3...15-n, respectively
...19-n. In such a configuration, the controller 18 composed of a microcomputer or the like is connected to the semiconductor switches 14-1 and 14 connected to the virtual ground point of the operational amplifier 4.
-2, 14-3...14-n semiconductor switch 14
If you issue a control signal that makes only -1 conductive,
The output signal E 0 of the output terminal 6 is as follows: E 0 =-2R/2RE≒-E ......1, and when only the semiconductor switch 14-2 is conductive, E 0 =-2R/2R 1/2E)=-1/2E......2 In this case, the combined impedance will be R no matter which way you look from point A to the left or right, so the signal applied to point A will be 1/2E.
また、半導体スイツチ１４−２，１４−３両方
のみ導通した場合は、
E0＝−（１／２＋１／４）Ｅ＝−3/4Ｅ ………３
の如くなる。そして、上記半導体スイツチ１４−
１，１４−２…１４−ｎと対をなす半導体スイツ
チ１５−１，１５−２…１５−ｎはコントローラ
１８からの制御信号を反転するインバータ１９−
１，１９−２…１９−ｎにてOFFされる。例へ
ば半導体スイツチ１４−１がONの場合、半導体
スイツチ１５−１はOFFと云う動作を作り出す。 Moreover, when only both semiconductor switches 14-2 and 14-3 are conductive, E 0 =-(1/2+1/4)E=-3/4E...3. Then, the semiconductor switch 14-
The semiconductor switches 15-1, 15-2...15-n paired with the switches 1, 14-2...14-n are inverters 19-n that invert control signals from the controller 18.
It is turned off at 1, 19-2...19-n. For example, when the semiconductor switch 14-1 is ON, the semiconductor switch 15-1 produces an OFF operation.
しかしながら、この様な電子ボリウム装置の構
成においては、半導体スイツチ１４−１，１４−
２…１４−ｎおよび１５−１，１５−２…１５−
ｎが切換る時、半導体スイツチの極間容量により
クリツク音を発生するという問題があつた。その
様子を第２図により説明すると、半導体スイツチ
として用いたMOS電界効果トランジスタ１５−
２のゲートに第２図に示す如く振幅がＶの制御信
号ａ，ｂが印加されると、この電界効果トランジ
スタ１５−２のゲート−ソース間の容積C0によ
り、演算増幅器４の入力にその制御信号が微分さ
れた雑音（クリツク音）ｃが印加される。 However, in the configuration of such an electronic volume device, semiconductor switches 14-1, 14-
2...14-n and 15-1, 15-2...15-
There was a problem in that when n was switched, a clicking sound was generated due to the interpole capacitance of the semiconductor switch. To explain this situation with reference to FIG. 2, the MOS field effect transistor 15-
When control signals a and b having amplitudes of V are applied to the gates of the field effect transistors 15-2 and 15-2 as shown in FIG. Noise (click sound) c, which is a differentiated control signal, is applied.
本発明は、このような従来の欠点を解消するも
のであり、演算増幅器の入力側にダイオードリミ
ツタ回路を設け、クリツク音のレベルを低く抑え
ることにより、クリツク音の発生を防止するよう
にしたものである。 The present invention solves these conventional drawbacks by providing a diode limiter circuit on the input side of the operational amplifier to suppress the level of the clicking noise to a low level, thereby preventing the occurrence of the clicking noise. It is something.
以下、本発明の電子ボリウム装置について実施
例の図面を基に説明する。 DESCRIPTION OF THE PREFERRED EMBODIMENTS The electronic volume device of the present invention will be described below with reference to drawings of embodiments.
第３図は本発明の電子ボリウム装置の一実施例
を示しており、第３図中、第１図に同一符号は同
様の構成要素を示している。第３図において、第
１図と異なるところは互に逆接続されたダイオー
ド２０−１，２０−２でなるダイオードリミツタ
回路７を演算増幅器４を構成する差動増幅器１６
の逆相入力端と接地間に挿入したことである。こ
の場合、Ｄ点は半導体スイツチ１４−１，１４−
２，１４−３…１５−ｎの仮想接地点であり、入
力端子Ｃからの信号振幅はきわめて小さい（
0V）、ダイオード２０−１，２０−２による非通
線歪の発生は全く問題がない。このような構成に
おいては、いま、半導体スイツチ１４−１の制御
入力端に第４図に示すように制御信号ａが印加さ
れると、上記半導体スイツチ１４−１の仮想接地
点Ｄに第４図に破線で示すような波高値Ｖのパル
ス性雑音ｂが発生するが、上記ダイオードリミツ
タ回路７により、上記パルス性雑音ｂの波高値Ｖ
は第４図に実線で示すようにダイオード２０−
１，２０−２の順方向電圧に相当する大きさVf
に制御され、雑音レベルを低く押えることができ
る。尚、一般的にはＶ＝５〜16Vであり、Vf＝
0.2V程度である。 FIG. 3 shows an embodiment of the electronic volume device of the present invention, and in FIG. 3, the same reference numerals as in FIG. 1 indicate the same components. 3, the difference from FIG. 1 is that a diode limiter circuit 7 consisting of diodes 20-1 and 20-2 connected in opposite directions is connected to a differential amplifier 16 constituting an operational amplifier 4.
This is because it is inserted between the negative phase input terminal and ground. In this case, point D is the semiconductor switch 14-1, 14-
2, 14-3...15-n, and the signal amplitude from input terminal C is extremely small (
0V), there is no problem at all with the occurrence of non-conducting distortion due to the diodes 20-1 and 20-2. In such a configuration, when the control signal a is applied to the control input terminal of the semiconductor switch 14-1 as shown in FIG. 4, the virtual ground point D of the semiconductor switch 14-1 as shown in FIG. Pulse noise b with a peak value V as shown by the broken line is generated, but the diode limiter circuit 7 reduces the peak value V of the pulse noise b.
is the diode 20- as shown by the solid line in Figure 4.
The magnitude V f corresponding to the forward voltage of 1,20-2
control and can keep the noise level low. In addition, generally V = 5 to 16V, and V f =
It is about 0.2V.
以上、詳述したように本発明によれば、信号源
を抵抗ネツトワークおよびスイツチ手段を介して
演算増幅器に結合し、上記スイツチ手段を制御手
段によつて制御すると共に、演算増幅器の入力側
にダイオードリミツタ回路を設けたので、信号の
減衰度を所望の値に変化させることができ、さら
に入力される信号の減衰度を変化させる際に発生
するパルス性雑音を十分低く押えることができ、
もつてクリツク音の発生を小さくすることができ
る利点を有するものである。 As detailed above, according to the present invention, a signal source is coupled to an operational amplifier via a resistor network and a switching means, the switching means is controlled by a control means, and the signal source is connected to the input side of the operational amplifier. Since a diode limiter circuit is provided, the degree of attenuation of the signal can be changed to a desired value, and the pulse noise generated when changing the degree of attenuation of the input signal can be suppressed to a sufficiently low level.
This has the advantage that the generation of clicking noise can be reduced.
第１図は従来の電子ボリウム装置の回路図、第
２図は同装置の動作説明図、第３図は本発明の電
子ボリウム装置の一実施例を示す回路図、第４図
は同装置の動作説明図である。
１……信号源、２……抵抗ネツトワーク、３…
…スイツチ手段、４……演算増幅器、５……制御
手段、６……出力端、７……ダイオードリミツタ
回路。
Fig. 1 is a circuit diagram of a conventional electronic volume device, Fig. 2 is an explanatory diagram of the operation of the same device, Fig. 3 is a circuit diagram showing an embodiment of the electronic volume device of the present invention, and Fig. 4 is a circuit diagram of the same device. It is an operation explanatory diagram. 1... Signal source, 2... Resistance network, 3...
...Switch means, 4...Operation amplifier, 5...Control means, 6...Output end, 7...Diode limiter circuit.
Claims (1)
段を介して演算増幅器に結合し、上記スイツチ手
段を制御手段によつて制御することにより上記信
号源からの信号の減衰度を変化して取り出すよう
に構成すると共に、上記演算増幅器の入力側にダ
イオードリミツタ回路を設けてなる電子ボリウム
装置。1. A signal source is coupled to an operational amplifier via a resistor network and a switching means, and the switching means is controlled by a control means to extract a signal from the signal source while changing the degree of attenuation. Also, an electronic volume device comprising a diode limiter circuit provided on the input side of the operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4495882A JPS58161521A (en) | 1982-03-19 | 1982-03-19 | Electronic volume device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4495882A JPS58161521A (en) | 1982-03-19 | 1982-03-19 | Electronic volume device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58161521A JPS58161521A (en) | 1983-09-26 |
| JPH0224404B2 true JPH0224404B2 (en) | 1990-05-29 |
Family
ID=12705988
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4495882A Granted JPS58161521A (en) | 1982-03-19 | 1982-03-19 | Electronic volume device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58161521A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6093812A (en) * | 1983-10-26 | 1985-05-25 | Nec Corp | Integrated circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS511503A (en) * | 1974-06-27 | 1976-01-08 | Ngk Insulators Ltd | TASOSERAMITSUKUKIBANNO SEIZOHO |
| JPS5334872U (en) * | 1976-08-31 | 1978-03-27 |
-
1982
- 1982-03-19 JP JP4495882A patent/JPS58161521A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS511503A (en) * | 1974-06-27 | 1976-01-08 | Ngk Insulators Ltd | TASOSERAMITSUKUKIBANNO SEIZOHO |
| JPS5334872U (en) * | 1976-08-31 | 1978-03-27 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58161521A (en) | 1983-09-26 |
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