JPS58161426A - Loop filter of digital pll circuit - Google Patents

Loop filter of digital pll circuit

Info

Publication number
JPS58161426A
JPS58161426A JP57042268A JP4226882A JPS58161426A JP S58161426 A JPS58161426 A JP S58161426A JP 57042268 A JP57042268 A JP 57042268A JP 4226882 A JP4226882 A JP 4226882A JP S58161426 A JPS58161426 A JP S58161426A
Authority
JP
Japan
Prior art keywords
signal
set
loop filter
outputs
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57042268A
Other versions
JPH0429256B2 (en
Inventor
Hisahiro Koga
Yoshifumi Toda
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57042268A priority Critical patent/JPH0429256B2/ja
Publication of JPS58161426A publication Critical patent/JPS58161426A/en
Publication of JPH0429256B2 publication Critical patent/JPH0429256B2/ja
Anticipated expiration legal-status Critical
Application status is Expired - Lifetime legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop

Abstract

PURPOSE:To obtain a loop filter for a digital PLL circuit with a simple circuit constitution, by adopting a so-called continuous count system which outputs discrimination output only when N-set of consecutive ''1s'' or ''0s'' in discriminating a phase comparison signal. CONSTITUTION:A phase comparison signal A outputted from a phase comparator 1 is given to a shift register 21 in synchronizing with a clock signal CK. Further, AND gates 22 and 23 monitors at all times that outputs Q1, Q2...QN of a shift register 21 are all ''1'' or outputs Q1', Q2'...QN' are all zero, and when the conditions are satisfied, the AND gate 22 or 23 outputs a set signal S or a reset signal R. A flip-flop 24 generates a phase control signal B with the set signal S or the reset signal R. That is, the loop filter is the continuous count system which discriminates the phase control signal as ''1'' or ''0'', when the phase comparison signal A is ''1'' or ''0'' consecutively for N-set.
JP57042268A 1982-03-17 1982-03-17 Expired - Lifetime JPH0429256B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57042268A JPH0429256B2 (en) 1982-03-17 1982-03-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57042268A JPH0429256B2 (en) 1982-03-17 1982-03-17

Publications (2)

Publication Number Publication Date
JPS58161426A true JPS58161426A (en) 1983-09-26
JPH0429256B2 JPH0429256B2 (en) 1992-05-18

Family

ID=12631286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57042268A Expired - Lifetime JPH0429256B2 (en) 1982-03-17 1982-03-17

Country Status (1)

Country Link
JP (1) JPH0429256B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60244124A (en) * 1984-03-19 1985-12-04 Western Digital Corp Digital phase locked loop unit
US6157690A (en) * 1997-03-26 2000-12-05 Nec Corporation Digital PLL circuit
DE10129783C1 (en) * 2001-06-20 2003-01-02 Infineon Technologies Ag Delay locked loop for clock synchronization in IC includes regulating logic for filter controlling delay of variable delay stage

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49119503A (en) * 1973-03-15 1974-11-15
JPS56748A (en) * 1979-06-15 1981-01-07 Fujitsu Ltd Phase control circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49119503A (en) * 1973-03-15 1974-11-15
JPS56748A (en) * 1979-06-15 1981-01-07 Fujitsu Ltd Phase control circuit

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60244124A (en) * 1984-03-19 1985-12-04 Western Digital Corp Digital phase locked loop unit
US6157690A (en) * 1997-03-26 2000-12-05 Nec Corporation Digital PLL circuit
DE10129783C1 (en) * 2001-06-20 2003-01-02 Infineon Technologies Ag Delay locked loop for clock synchronization in IC includes regulating logic for filter controlling delay of variable delay stage
US6586978B2 (en) 2001-06-20 2003-07-01 Infineon Technologies Ag Delay locked loop

Also Published As

Publication number Publication date
JPH0429256B2 (en) 1992-05-18

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