JPS5815804B2 - Dengenkiyoukiyuhoushiki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply method for a system that uses a battery as a power source and includes a rush current generator.

For example, electronic clocks, electronic desk calculators, etc. that use a power source as a power source and supply battery voltage directly to logic circuits, etc., are equipped with a rush current generating section, that is, normally no current flows, or Although it is a relatively small current, a relatively large current flows instantaneously when starting, such as driving a lamp that illuminates a liquid crystal display device at night, or a buzzer that generates a notification sound such as an alarm clock. In devices equipped with a circuit, when this rush current flows, the battery voltage will drop significantly due to the internal resistance of the battery, and there is a risk that the logic circuit will malfunction.

One possible solution to the above problem is to install a capacitor in parallel with the battery to compensate for the drop in battery voltage, but in order to reliably prevent the effects of rush current, the capacitance of the capacitor must be made very large. Therefore, there is a problem that it cannot be applied to small-sized systems.

The present invention has been made in view of the above points, and an object of the present invention is to provide a power supply system that can reliably prevent the influence of rush current and can be miniaturized.

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, reference numeral 11 denotes a main power source composed of a battery 1, the output voltage of which is supplied to a rush current generator 12 such as a lamp circuit or a buzzer circuit, and is also supplied to an auxiliary power source 14 via a switch circuit 13. and is supplied to load circuits such as the control unit 15 and the logic circuit 16.

A switch 17 for issuing a drive command to the rush current generating section 12 is connected to the control section 15.

The control unit 15 normally keeps the switch circuit 13 in the on state, but when the switch 17 is operated, it turns off the switch circuit 13 for a predetermined period of time, and also turns it off for the predetermined period after the switch circuit 13 is turned off. The rush current generating section 12 is driven and controlled.

In the above configuration, since the switch circuit 13 is normally in an on state, the main power supply voltage is supplied to the control section 15 and the logic circuit 16 via the switch circuit 13.

Therefore, the logic circuit 16 is normally operated by the voltage supplied from the main power supply 11.

When the switch 17 that operates the rush current generator 12 is closed, the control section 15 detects the operation output of the switch 17, turns off the switch circuit 13, and then turns off the rush current generator 12. make it work.

When the rush current generating section 12 operates, a rush current is generated at the time of startup, but the switch circuit 13 is kept in an off state while this rush current is generated.

Then, after a predetermined period of time has elapsed and the current flowing through the rush current generating section 12 reaches a steady state, the control section 15 returns the switch circuit 13 to the on state.

While the switch circuit 13 is off, that is, while rush current is occurring, the control section 15 and logic circuit 16 operate with the voltage supplied from the auxiliary power supply 14.

Since the control unit 15 and the logic circuit 16 are connected to the main power supply 11 after returning to a steady state after the rush current occurs, they are not affected by the rush current at all.

FIG. 2 shows an example in which the rush current generating section 12 is constituted by a lamp 21, and the lamp 21 is driven and controlled by a transistor 22 which operates in accordance with a control signal D2 from a control section 15.

Further, the switch circuit 13 controlled by the control signal D1 from the control section 15 is constituted by a field effect type MO8) transistor 23, and the auxiliary power supply 14 is constituted by a capacitor 24.

FIG. 3 shows the detailed configuration of the control section 15.

In FIG. 3, 31 is a chattering prevention circuit to which the operation output of the switch 17 is applied, and 32 to 34 are cascade-connected delayed flip-flops, and the output of the chattering prevention circuit 31 is connected to the data input terminal of the first-stage flip-flop 32. Given.

Furthermore, the flip-flops 32 to 34 operate in synchronization with the rising edge of a clock signal of, for example, 64 Hz given from the logic circuit 16, and the Q expansion output of the flip-flop 32 and the Q output of the flip-flop 34 are The output is taken out as the control signal D1 via the NAND circuit 35, and the transistor 23 forming the switch circuit 13
is supplied to the gate.

Furthermore, the Q IIJ output of the flip-flop 33 is taken out as a control signal D2 via the inverter 36 and supplied to the base of the transistor 22 in the rush current generating section 12.

In the above configuration, the flip-flops 32 to 34 are
The human input signal is read periodically at the rising edge of the 64Hz clock signal shown in FIG. 4, but since the input to the control unit 15 is 0'' when the switch 17 is not operated, all It is in a reset state.

That is, the Q expansion output of flip-flops 32 to 34 is "
0'', and the Q expansion power is 1''.

Therefore, one input of the NAND circuit 35, that is, the Q side output of the flip-flop 32 becomes "0"', and the control signal D1 output from the NAND circuit 35 becomes 1", keeping the transistor 23 in the on state. .

Therefore, the capacitor 24, the control section 15, the logic circuit 16
The main power supply 11 is supplied to the main power supply 11 through a transistor 23 .

In this state, capacitor 24 is charged to the output voltage level of main power supply 11.

On the other hand, when the switch 17 is open, the Q expansion output of the flip-flop 33 is 1'', so the control signal D2 output from the inverter 36 is 011, keeping the transistor 22 in the off state. ing.

Therefore, the lamp 21 is in an off state. When the switch 17 is closed, its output becomes "1" as shown in FIG. 4, and is applied to the data input terminal of the flip-flop 32 via the chattering prevention circuit 31.

A "1" signal is read into the flip-flop 32 periodically at the rising edge of the 64 Hz clock signal, and the Q expansion output becomes "1" as shown in FIG. 4C.

At this point, the Q expansion output of flip-flop 34 is still "
1", so the power of both people in the NAND circuit 35 is 1"
Therefore, the output of the NAND circuit 35, that is, the control signal D1 changes from ``1'' to 0'' as shown in FIG. 4 fK.

As a result, the transistor 23 is turned off, and the discharge voltage of the capacitor 24 becomes the operating power source for the control circuit 15 and the logic circuit 16.

Next, after a "1" signal is read into the flip-flop 32, a +1" signal is read into the flip-flop 33 at the next rising edge of the 64 Hz clock signal, and the Q expansion output becomes "0" as shown in FIG. 4d. ”.

Therefore, the output of the inverter 36, that is, the control signal D2 becomes "1" as shown in FIG. 4g, and the transistor 2
Turn on 2.

By turning on this transistor 22, the lamp 2
1 is driven, a rush current flows at the time of starting, and the output voltage of the main power supply 11 drops rapidly as shown in the fourth diagram.

However, since the transistor 23 has already been turned off at this point, the control section 15 and the logic circuit 16 are not affected by the main power supply 11 and are operated by the discharge voltage of the capacitor 24 shown in FIG. 4i.

The generation period of the rush current flowing through the lamp 21 is usually about 6 m5 ec.

After the 1'' signal is read into the flip-flop 33, when the next 64Hz clock signal is applied,
At this rising edge, a "1" signal is read into the flip-flop 34, and its Q side output becomes "0" as shown in FIG.
As shown in Figure f.

The signal becomes "1'' again, turning on the transistor 23.

The above 64Hz clock signal has a period of 15.6m.
Since it is 5ec, 1 after the transistor 23 is turned off.
The rush current starts flowing after 5.6m5ec, and the transistor 23 turns on after another 15.6jmsec after this rush current starts flowing, that is, after the rush current generation period has passed.

By turning on this transistor 23, the main power supply 1
1 and the capacitor 24 are connected, and the capacitor 24
The terminal voltage matches the output voltage level of the main power supply 11.

In this case, the output voltage level of the main power supply 11 is
The current supplied to the rosin circuit 16 is only slightly lowered than the initial point, and has no effect on the rosin recirculating circuit 16.

In the above embodiment, in the rush current generating section 12, the amplifier 2
Although an example using No. 1 has been described, the same effect can be obtained with any device that generates a rush current when starting, such as a buzzer.

Further, the control section 15 is also not limited to this embodiment, but instead sends the output of the switch 17 as a control signal D1 to the transistor 23 via an inverter to cut off the circuit, and sends a control signal D2 to the transistor 22 via a delay circuit. The point is that various modifications may be made without departing from the gist of the present invention, such as a feed lamp may be turned on.

As described above, according to the present invention, before the terminal voltage of the main power supply drops due to rush current.

The main power supply and the load circuit are separated, and the auxiliary power supply is used to supply power to the load circuit in the meantime, making it possible to reliably prevent the effects of the main power supply's output voltage drop due to rush current.
In addition, the auxiliary power supply can sufficiently achieve its purpose with a small capacity, and can provide an extremely advantageous power supply system when downsizing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of the present invention, FIG. 2 is a diagram showing an embodiment of the present invention, FIG. 3 is a diagram showing details of the control section 15 in FIG. 2, and FIG. 1 is a timing chart for explaining the present invention in detail; 11... Main power supply, 12... Rush current generating section, 13... Switch circuit, 14...
...Auxiliary power supply.

Claims (1)

[Claims] 1. A battery power source, a rush current generating section that operates and is supplied with voltage by the battery power source and generates a large current at the time of startup, a load circuit that is normally supplied with an operating voltage from the battery power source, and the rush current generating section. and an auxiliary power source for supplying the operating voltage to the load circuit at the time of the interruption. A power supply system featuring: