JPS5815391U - circuit device - Google Patents

circuit device

Info

Publication number
JPS5815391U
JPS5815391U JP10949981U JP10949981U JPS5815391U JP S5815391 U JPS5815391 U JP S5815391U JP 10949981 U JP10949981 U JP 10949981U JP 10949981 U JP10949981 U JP 10949981U JP S5815391 U JPS5815391 U JP S5815391U
Authority
JP
Japan
Prior art keywords
circuit device
substrate
circuit blocks
circuit
recorded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10949981U
Other languages
Japanese (ja)
Inventor
込山 敏
富士夫 古川
Original Assignee
ミツミ電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ミツミ電機株式会社 filed Critical ミツミ電機株式会社
Priority to JP10949981U priority Critical patent/JPS5815391U/en
Publication of JPS5815391U publication Critical patent/JPS5815391U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面はいずれも本考案に係る回路装置の実施例を示すも
ので第1図は分解斜視図、第2図は正面図、第3図は平
面図、第4図は底面図である。 1・・・チューナ部、2−PIF部、13a、13b。 23a〜23g・・・調整孔、4・・・基板、41.4
m・・・貫通孔。
The drawings all show an embodiment of the circuit device according to the present invention; FIG. 1 is an exploded perspective view, FIG. 2 is a front view, FIG. 3 is a plan view, and FIG. 4 is a bottom view. 1... Tuner section, 2-PIF section, 13a, 13b. 23a to 23g...adjustment hole, 4...substrate, 41.4
m...through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の回路ブロックを基板に組付けると共に該複数の回
路ブロック間位置に対応させて該基板に貫通孔を形成し
たことを特徴とする回路装置。
A circuit device characterized in that a plurality of circuit blocks are assembled to a substrate and through holes are formed in the substrate corresponding to positions between the plurality of circuit blocks.
JP10949981U 1981-07-23 1981-07-23 circuit device Pending JPS5815391U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10949981U JPS5815391U (en) 1981-07-23 1981-07-23 circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10949981U JPS5815391U (en) 1981-07-23 1981-07-23 circuit device

Publications (1)

Publication Number Publication Date
JPS5815391U true JPS5815391U (en) 1983-01-31

Family

ID=29903878

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10949981U Pending JPS5815391U (en) 1981-07-23 1981-07-23 circuit device

Country Status (1)

Country Link
JP (1) JPS5815391U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56165639A (en) * 1980-05-22 1981-12-19 Toshiba Corp Paper-feeding cassette
JPS612626A (en) * 1984-06-15 1986-01-08 Matsushita Electric Ind Co Ltd Paper size detecting device
JPS6268928U (en) * 1985-10-18 1987-04-30

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5685891A (en) * 1979-12-14 1981-07-13 Hitachi Ltd Chip element mounting substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5685891A (en) * 1979-12-14 1981-07-13 Hitachi Ltd Chip element mounting substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56165639A (en) * 1980-05-22 1981-12-19 Toshiba Corp Paper-feeding cassette
JPS612626A (en) * 1984-06-15 1986-01-08 Matsushita Electric Ind Co Ltd Paper size detecting device
JPS6268928U (en) * 1985-10-18 1987-04-30
JPH0418984Y2 (en) * 1985-10-18 1992-04-28

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