JPS5815390U - circuit device - Google Patents

circuit device

Info

Publication number
JPS5815390U
JPS5815390U JP10949881U JP10949881U JPS5815390U JP S5815390 U JPS5815390 U JP S5815390U JP 10949881 U JP10949881 U JP 10949881U JP 10949881 U JP10949881 U JP 10949881U JP S5815390 U JPS5815390 U JP S5815390U
Authority
JP
Japan
Prior art keywords
circuit device
circuit blocks
circuit
adjustment
assembled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10949881U
Other languages
Japanese (ja)
Inventor
込山 敏
富士夫 古川
Original Assignee
ミツミ電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ミツミ電機株式会社 filed Critical ミツミ電機株式会社
Priority to JP10949881U priority Critical patent/JPS5815390U/en
Publication of JPS5815390U publication Critical patent/JPS5815390U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面はいずれも本考案に係る回路装置の実施例を示すも
ので第1図は分解斜視図、第2図は正面図、第3図は平
面図、第4図は底面図である。 1−−−チューナ部、2−PIF部、13a、  13
b。 23a〜23g・・・調整孔、4・・・基板、41.4
m・・・貫通孔。
The drawings all show an embodiment of the circuit device according to the present invention; FIG. 1 is an exploded perspective view, FIG. 2 is a front view, FIG. 3 is a plan view, and FIG. 4 is a bottom view. 1---Tuner section, 2-PIF section, 13a, 13
b. 23a to 23g...adjustment hole, 4...substrate, 41.4
m...through hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] それぞれに調整部をオIする複数の回路ブロックを備え
該複数の回路ブ「7ツクを互いに変位せしめて基板に組
付け、同一側から該調整部のそれぞれを調整しうる構成
とじj、・7ことを特徴とする回路装置。
A structure comprising a plurality of circuit blocks each having an adjustment section, and the plurality of circuit blocks disposed relative to each other and assembled on a board, allowing each of the adjustment sections to be adjusted from the same side. A circuit device characterized by:
JP10949881U 1981-07-23 1981-07-23 circuit device Pending JPS5815390U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10949881U JPS5815390U (en) 1981-07-23 1981-07-23 circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10949881U JPS5815390U (en) 1981-07-23 1981-07-23 circuit device

Publications (1)

Publication Number Publication Date
JPS5815390U true JPS5815390U (en) 1983-01-31

Family

ID=29903877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10949881U Pending JPS5815390U (en) 1981-07-23 1981-07-23 circuit device

Country Status (1)

Country Link
JP (1) JPS5815390U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137926U (en) * 1988-03-15 1989-09-20

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5749433U (en) * 1980-09-03 1982-03-19

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5749433U (en) * 1980-09-03 1982-03-19

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01137926U (en) * 1988-03-15 1989-09-20

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