JPS58148524A - Pulse counting system - Google Patents

Abstract

PURPOSE:To prevent flickering due to minute fluctuation in a measuring value and the shift in synchronism of an input pulse and to attain stable display, by displaying an operating value adding or subtracting a value in response to a prescribed number or the newest count value, to/from the newest count value, depending on the increase/decrease of the newest count value. CONSTITUTION:The input pulse is counted at a counter 2, stored in a latch circuit 4 via a gate circuit 3 and the count value is displayed on a display 6. The count value stored in the circuit 4 and the display value of the display 6 are compared at a comparator 7, and when the count value and the display value are the same or the count value is increasing to the display value, a load pulse is given to the circuit 4 from the comparator 7 via an OR gate 8, the measuring value is inputted to the circuit 4 for the revision of display. When the count value is decreasing, the count value is added with a prescribed value at an operator 9 for display. The preceding value and the output of shift registers 101, 102 inputting the newest count value are compared at a comparator 11, and it is detected that the value is made stable for a prescribed value, and the count value is revised at the stable state.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse counting method that prevents display values from flickering.

Generally, in the pulse counting method that counts and displays the number of input pulses for each gate period, frequent flickering occurs even when the frequency is stable due to minute fluctuations in the number of input pulses or out of synchronization with the number of gate pulses. The disadvantage is that it is difficult to see. For example, as shown in Figure 1, the input repetitive pulse signal A and gate signal (display switching signal) B are essentially not synchronized, so the repetitive pulse signal A is constant and stable. Even if the number of pulses is input, there will be a difference in one count value depending on the phase relationship between the number of repetitive pulses A and the gate signal B during counting. For example, in a pulse counting method using a counter that operates on the rising edge of an input signal, the count value of repeated pulses in the first gate signal a is "8", but The count value of pulse A is r
It becomes 7J.

Therefore, even if there is no variation in the frequency of the repetitive pulse signal A,
Furthermore, even if the repetitive pulse A is stably input, there is a drawback that the display flickers and is difficult to see. When displaying the running speed of a vehicle or the engine speed digitally, this means that when driving at a constant speed, the speed is ±1km/A.
This has the disadvantage of causing frequent flickering, which causes discomfort.

In order to eliminate the drawbacks of the above-mentioned conventional example, the present invention provides an operation in which a constant number or a value corresponding to the size of the latest counted value is added or subtracted from the latest counted value depending on the state of increase or decrease of the latest counted value with respect to the displayed value. It is characterized by displaying the latest count value and updating the display when the latest count value is the same and continues for a predetermined number of times.The purpose is to display minute fluctuations in the input pulse or out of synchronization between the input pulse and the gate signal. Prevents flickering of values, enables stable display, and
The present invention provides a pulse counting method that eliminates the error between a calculated value and a correct count value and can accurately display a count value in a stable state from a state in which the count value is increasing or decreasing. Embodiments will be described in detail below with reference to the drawings. 〇 Figure 1 shows a block diagram of a pulse counting method according to an embodiment of the present invention. It is counted, held in the latch circuit 4 via the gate circuit 3, and displayed on the display 6 via the decoder driver 5. Here, the counted value of the counter 2 and the displayed value held in the latch circuit 4 are The comparator 7 compares the difference between the values, and when the counted value and the displayed value are the same or the counted value is increasing with respect to the displayed value, a load pulse is sent from the comparator 7 to the launch circuit 4 via the OR gate 8. The counted value of the counter 2 is input from the counter 2 to the latch circuit 4 through the gate circuit 3, where it is held and updated and displayed. Further, when the change in the count value is in a decreasing direction with respect to the display value held by the latch circuit 4, a signal is sent from the comparator 7 to the gate circuit 3, and the gate circuit 3 is
The calculation unit '9 adds a predetermined value to the counted value of the counter 2 and displays the result. Furthermore, when the count value of the counter 2 becomes stable and remains the same for a predetermined period of time (for example, three times the gate period), it is determined that the state is stable, and an operation is performed to update and display the count value. Ru. That is, the count value of the counter 2 is supplied to the shift register 101, and sequentially shifted by 7 to the shift register 102.
The comparator 11 compares the previous count value supplied to page 2/ft register with the latest count value supplied to page 10 of the transfer register, and if the same count value continues for a predetermined time (predetermined number of times), the comparator 11
A signal is outputted to the gate circuit 3 via the OR gate 12, the gate circuit 3 is switched to the counter 2 side, and the displayed value is updated to the latest count value.

Table 1 Next, a specific example of this embodiment will be explained. In A of Table 1, when the counted value is in the increasing direction such as "5", "6J," and "7", the counted value is used as the displayed value, and the counted value changes from "7" to "6" relative to the displayed value. When the value is decreasing, a predetermined value, that is, "1" is added to the counted value and displayed, so that even if the counted value slightly fluctuates, the displayed value remains "7" and there is no flicker. Stable display is possible.

However, in B of Table 1, the count value is "7".
”, “6”, “5” and stabilizes at “5”, the displayed value will be “6” by adding rlJ to the counted value, and there will be no difference between it and the stable correct value “5”. cause an error.

Therefore, as shown in C of Table 1, the same count value "51
When this continues for a predetermined number of times (three times in this case), the gate circuit 3 is switched to the counter 2 side, and the correct counted value is updated as the displayed value.

Since this embodiment 3 is configured in this way, even if the count value changes in the correction direction, when the value is constant and stable, the calculated value obtained by adding rlJ to the same count value is displayed a predetermined number of times. After that, the correct count value can be displayed.

In the explanation of the above embodiment, when the count value is the same or increasing, the latest count value is updated and displayed as is, and calculation processing is performed only when the count value is decreasing. Flickering can be similarly prevented by performing the arithmetic processing of "count value - predetermined value" only when the value is , or by performing addition and subtraction processing in both directions of increase and decrease. .

In the above embodiment, a constant value is added or subtracted depending on the sign or minus of the difference between the displayed value and the counted value, but if the unstable fluctuation range of the measured quantity is different in the low and high ranges, It is desirable to add and subtract values according to the size of the count value. For example, there is a large fluctuation of ±1 in the low range of the measured quantity,
If there is a large fluctuation in the value of 3 in the high range, the value to be added or subtracted by the calculation unit 9 in Figure 2 should be set to ``1'' or ``3'' depending on the famous castle.
d Table 2, that is, A in Table 2 shows the low range, and the count value is "8".
When the value decreases from ``'' to ``7'', ``1'' is added to make the displayed value ``8'' to prevent flickering. Also, B in Table 2 indicates the high range, and the count value ranges from "52" to "4".
When the value decreases to 9, add 3 to change the displayed value to 5.
2" to prevent flickering.

In this way, by selecting the correction value according to the magnitude of the count value, stable display without flickering is possible in a wide area.

As explained above, according to the present invention, a constant number or a value corresponding to the latest counted value can be added or subtracted from the latest counted value and displayed in accordance with the increase or decrease of the latest counted value with respect to the displayed value. This prevents flickering of the displayed value due to minute fluctuations in the measured value or synchronization difference between the gate signal and the input pulse, making it possible to display a stable display, and eliminating the error between the correct counted value and the displayed value due to correction processing. , it has the advantage of being able to display the correct value of the stable count value from the increase/decrease state of the count value.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the relationship between repetitive pulses and gate signals;
FIG. 2 is a schematic diagram of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Input terminal, 2... Counter, 3... Gate circuit, 4... Latch circuit, 5... Decoder driver, 6... Display, 7... Comparator, 8...・OR gate, 9... Arithmetic unit, 10, . 10. ...Shift register, 11...Comparator, 12...OR gate.

Claims (1)

[Claims] Depending on the increase/decrease state of the latest count value obtained by counting pulse signals generated within a predetermined period with respect to the displayed value, a fixed number or a value according to the size of the count value is added or subtracted from the latest count value, and the calculated value is calculated. The pulse counting method is characterized in that the latest counted value is updated and displayed if the latest counted value is the same and continues a predetermined number of times.