JPS5814774B2 - Denkiyokusousahoshiki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electrode scanning method for time-divisionally scanning a plurality of electrode groups arranged in rows or columns.

Conventionally, as this type of electrode scanning method, a diode matrix method as shown in FIG.
A patent application has been filed as Patent Application No. 24123 in 2008.

That is, the diode matrix shown in FIG. 1 has row conductors 5 (hereinafter, suffixes will be omitted unless referring to a specific one).

) and a column conductor 6 perpendicular thereto.

Further, the collector of a PNP type transistor 3 is connected to one end of each of the row conductors 5, and the emitter of this PNP type transistor 3 is connected to a positive power source 11.

On the other hand, the collector of an NPN transistor 4 is connected to one end of each column conductor 6, and the emitter of this NPN transistor 4 is connected to ground.

Further, two series diodes 7 and 8 connected in the forward direction are connected to bridge the row conductor 5 and the column conductor 6 in the forward direction near the intersection of the matrix conductors 5 and 6, Output is taken from the midpoint of this series diode, and a discharge display panel having electrode groups facing each other and arranged in a matrix is driven once in a time-division manner.

Now, when a pulsed AC signal is applied to the row direction input terminal 11 and the column direction input terminal 21, and there is no signal input to the other input terminals 12, 13 and 22, 23, the transistor 31,
and 41 are alternately turned on and off, and a pulse output signal corresponding to the input signal is obtained at the output terminal 911, which is the midpoint between the row diode 711 and the column diode 811.

On the other hand, there is no pulse output signal at the other output terminals 9 (except 911).

That is, for example, output terminals 921 and 931 are NPN
When the PNP transistor 41 is turned on, the potential is at ground potential, and when the PNP transistor 31 is turned on, the row diodes 821 and 831 cut off the positive potential from the row conductor 61, so the positive power supply +V1 does not appear.
It remains at ground potential.

Furthermore, since the PNP transistor 31 is in the driven state, the output terminals 912 and 913 maintain a substantially positive potential.

Furthermore, the remaining output terminals 922, 923, 932 and 9
33 has no output pulse signal because the corresponding transistors 32, 33, 42 and 43 are all in the off state.

In this way, by selecting an appropriate pair of the PNP type transistor 3 and the NPN type transistor 4 and sending a pulse signal to the input terminals 1 and 2, a pulse output with a voltage of 1 V1 can be delivered to the output terminal 9 at the desired intersection. Obtainable.

Furthermore, a plurality of PNP type transistors 3 and a plurality of NP
If N-type transistor 4 is selected, multiple output terminals 9
It is also possible to obtain pulse output at the same time.

Further, by sequentially connecting the output terminal 9 to each electrode of the electrode group to be scanned, the electrode group can be scanned in a time-division manner.

For example, if N NPN transistors 4 and M PNP transistors 3 are used, MN electrode scans can be driven.

This conventional diode matrix has the following drawbacks:

That is, for example, it is assumed that the PNP type transistor 31 and the NPN type transistor 41 are selected and are in the driven state, and the other transistors are not selected and are in the off state.

From the output terminal 911, a PNP type transistor 31 and an NP
While the N-type transistor 41 is repeatedly turned on and off, a pulse output with an amplitude of +V1 is obtained.

The output terminals 912 and 913 maintain approximately positive potential because the PNP transistor 31 is in the driving state, and the output terminals 921 and 931 maintain approximately the ground potential because the NPN transistor 41 is in the 1 driving state. However, since the corresponding transistors 32, 33, 42 and 43 of the remaining output terminals 922, 923, 932 and 933 are in an off state, their potentials are not fixed and are in a floating state.

The floating matrix points are moved from V1 volts to ground potential by a change in the potential of the row and column conductors each time a pulse signal is induced through the capacitance between the electrodes or the selected position of the output terminal 9 changes. Alternatively, there is a state where the voltage varies from ground potential to V1 volt.

For this reason, unselected matrix points light up, causing erroneous display.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide an electrode scanning method that does not cause false displays.

According to the present invention, the row and column conductors are arranged in a matrix, two series-connected diodes are connected between their intersection points, and one of the row and column conductors is connected to a positive power source through a switching means. The other electrode is connected to a reference potential (for example, ground potential) via a switching means, and the row and column electrodes are clamped at a predetermined potential (a potential lower than the stop power potential). can get.

Next, the present invention will be described in detail with reference to FIG. 2 showing an embodiment of the present invention.

One embodiment of the invention shown in FIG.
In order to clamp the unselected output terminals among the output terminals 9 that are the intersections of and the column diodes 8 to a constant potential,
It has a column clamp transistor 12, a row clamp transistor 13, a column clamp diode 10, and a row clamp diode 11.

The clamp input terminals 14 of the column and row clamp transistors 12 and 13 are always supplied with the same signal as the pulsed AC signal applied to the row direction input terminal 1 and the column direction input terminal 2.

Thereby, clamp transistors 12 and 13 operate alternately and synchronously with switching transistors 4 and 3, respectively.

Now, if only output terminal 911 is selected, row conductor 51 is pulled to V1 volt by transistor 31, and row conductors 52 and 53 are pulled to V1 volt by clamp transistor 13.
2 volts, column conductor 61 is fixed to ground potential by transistor 41, and column conductors 62 and 63 are fixed to V2 volts by clamp transistor 12.

Therefore, the potential of the output terminals 912 and 913 fluctuates in the range of V1 volts and V2 volts, and the output terminals 922 and 913
923, 932 and 933 are each fixed at +V2 volts, and output terminals 921 and 931 are each varied between +V2 volts and ground potential.

That is, all output terminals are free from floating states.

The voltage V2 of the positive power supply for clamping is set to the positive power supply voltage for drive +
If the potential is selected to be about half of V1, the output terminal 912
+913+921 and 931 have a potential variation of only about 1/2 of the drive voltage and do not light up, so there is no erroneous display.

As described above, according to the electrode scanning method according to the present invention, pulse output does not leak into the electrodes in a floating state due to interelectrode capacitance, and no drive voltage is generated due to changes in the selection state of the electrodes. It is possible to improve the phenomenon in which unselected electrodes turn on and cause erroneous display.

In the embodiments of the present invention, a discharge display panel is used as the display element, but it goes without saying that other display elements such as light emitting diodes, EL, liquid crystals, etc. can also have the same effect.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional electrode scanning system configuration;
The figure is a circuit diagram of an embodiment of the present invention. 1: Row direction input terminal, 2: Column direction input terminal, 3: PNP
type transistor, 4: NPN type transistor, 5: row conductor, 6: column conductor, 7: row diode, 8: column diode, 9: output terminal, 10: column clamp diode, 11:
Row clamp diode, 12: Column clamp transistor, 13: Row clamp transistor, 14: Human power terminal for clamp.

Claims (1)

[Scope of Claims] 1. A plurality of row conductors, a plurality of column conductors, a series-connected diode connected to each of a plurality of intersections between the row conductors and the column conductors, and the plurality of row conductors. a plurality of first switching means each connected between the plurality of column conductors and a reference potential source; a plurality of second switching means each connected between the plurality of column conductors and a reference potential source; a plurality of first clamping diodes each connected between the row conductors and a second power supply having a voltage lower than the first power supply voltage;
a third switching element connected between the first clamping diode and the second power source and operating in synchronization with the first switching element, the plurality of column conductors and the second power source; a plurality of second clamping diodes connected between the second clamping diodes and the second power supply, and a second clamping diode connected between the second clamping diodes and the second power supply and operating in synchronization with the second switching element. An electrode scanning method characterized by having four switching elements and sequentially scanning a plurality of electrode groups arranged in rows or columns in a time-sharing manner.