JPS58147247A - Pulse code transmission system - Google Patents

Abstract

PURPOSE:To transmits binary-coded serial data through a commercial AC power line by turning on and off a switching circuit according to the binary-coded serial transmitted data, and superposing a high frequency signal which is outputted from an oscillating circuit during turn-on operation upon an AC voltage. CONSTITUTION:Respective electronic registers 1a-1c are connected electrically to the commercial AC power line L by connecting corresponding plugs 2a-2c to outlets 3a-3c. Similarly, a host computer is also connected electrically to the commercial AC power line L. Then, the electronic registers 1a-1c and the host computer interchange data through the commercial AC power line L.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse code transmission method for pulse-encoding data and transmitting it to other electronic equipment.

Conventionally, in order to transmit pulse-encoded data using the in-fin method, two electronic devices must be connected to each other. I or 3
It was necessary to connect with Type 11 cable. for example,
The wiring shown in No. 21!3 is performed between the plurality of electronic registers and the host computer (not shown). That is, each electronic register 1aslbsla is electrically connected to an outlet 31L13bs3c connected to a commercial AC power line through the correspondingly connected plugs 2&, 2bs2G, and receives power supply. On the other hand, the electronic registers 1m and 1bxlo are connected to a distributor 4 installed in the ceiling of the store where they are stacked, via a 1m cable for data transmission, and further cables! .

The distributor 4 and the host computer are connected via. And each electronic cash register
Data is exchanged between O and the main storage computer (user) via the distributor 4.

As mentioned by Cao Yu, in order to transmit data from electronic registers, a dedicated cable is required for transmission! ,~l, wiring worker◆
This has the drawback of requiring a lot of expense such as engineering** and W fees. Furthermore, since the wiring work requires a certain period of time, there is a drawback that the operation of the in-line electronic cash register system is delayed during that period.

This invention has been made based on the above-mentioned ◆Information 1.The purpose of this invention is to provide a path-pass code transmission system that transmits binary coded serial data using commercial AC power. It is.

Hereinafter, 2nd It to 4th I for one embodiment of the present invention will be described.
The explanation will be based on t. Figure 2 shows the electronic register 1&%t b% 1.
(not shown), each electronic register 1a N1. connected. Similarly, the host F computer is also electrically connected to the commercial AC power @L. And electronic register 11
~10 and the host combinator is powered by commercial AC power IIL.
In addition to receiving power supply via commercial AC power @L
Data is exchanged via the .

FIG. 3 shows a schematic system configuration diagram of the electronic registers 1&~1c, and shows the commercial AC power! The voltage from IL is transformed via the corresponding plug and power cord 3g @ 1 of 1
The reduced voltage from the secondary coil is applied to the secondary coil, and the voltage applied to the stabilizing current is maintained at a constant direct pressure value.・Reference numeral 17 is a CPU, to which operation signals from various keys provided in the input section 18 are inputted manually.
Performs processing according to the input key code. Also, C
The PU 17 outputs display data to the display section 19 and print data to the printing section 20, and display and printing are performed on the display section 19 and printing s20, respectively.

The CPU 17 also exchanges data with the storage section 21 and writes required data to the storage section 21 .

This CPU 17 sends out the transmission data and transmission data to the data buffer 22, and reads out the received data in the data bus buffer 22. The operating data stored in the data bus buffer 22 is transferred to the control register 23, the transmission data is transferred to the transmission data register 24, and the transmission data in the transmission data register 24 is input to the parallel-to-serial conversion circuit 25. Ru. Further, the binary coded serial data outputted from the waveform shaping 111ifI33, which will be described later, is input to the direct-to-end conversion circuit 26, converted to parallel data, and then stored in the Nanyoji-Nanaho reception data register 34. The received data in the received data register 34 is sent to the CPU 17 via the data bus buffer 22.
is loaded into. The control register 23 outputs a designation signal CJil for designating the parallel-to-direct conversion circuit 2s or a designation signal CHat for designating the direct-to-parallel conversion circuit 26 in accordance with the written retardation data. The parallel-to-serial conversion circuit 25 converts the input parallel transmission data V into serial data based on the threshold to which the designation signal cmI is input, and outputs binary coded serial transmission data.

Further, reference numeral 828 is an oscillation circuit, and the high frequency signal outputted from this oscillation circuit 2$ is also outputted to the amplifier circuit 29, and the high frequency signal amplified here is outputted to the switching path 27. The switching path 27 is constituted by a transistor, for example, and the parallel-to-direction conversion circuit 2s is connected to the gate of the transistor.
A binary coded serial signal is input from. Therefore, this switching circuit 27 can switch between "1" and "1" of the binary serial signal.
"ON" and "OFF" operations are performed depending on the signal 0'.

The output of the switching path 27 is connected to the switching circuit 16. This switching circuit 16 is composed of switching means such as a transistor or a relay, and switches between transmission and reception in response to a switching signal C8W from the control register 23. During transmission, the terminals 16a and 16b are in a connected state.

Terminal 16m is connected to one end of the transformer 1113$0 secondary winding, and the other end of the secondary winding is grounded. Transformer 15-1
Capacitors 13 and 14 are connected in series to the next winding,
Furthermore, it is connected to the power cord 35.

On the other hand, the received signal input through the secondary coil of the transformer 1B, that is, the signal in which a high frequency signal is superimposed on a commercial low layer wave signal, is passed through the filter circuit through the terminals 16a and 16 of the switching circuit 16, respectively. 30 is input. The filter circuit 30 removes the low frequency signal for the shrine, passes the high frequency signal, and outputs it to the amplifier circuit 31. The amplifier circuit 31 amplifies the input high frequency signal and outputs it to the rectifier circuit 32.
The high frequency signal increased here is outputted to the waveform shaping circuit 33 as a rectangular signal with a constant voltage value. Waveform shaping circuit 33
waveform-shapes the input rectangular signal and outputs the binary-coded serial received data to the serial-parallel conversion circuit 26.

Next, the operation of this invention will be explained. First, when the plugs 2&~2C of the microwave oven l&~10 are connected to the outlets 3&~3 of the commercial AC power IiL, the commercial AC voltage is applied to each of the registers inside the register via the transformer 11 and the stabilized power supply circuit 12. Supplied to the circuit. In this state, it is assumed that data is transmitted to the main line combinator connected to the commercial AC power line. That is, the CPU 17 also outputs the operation data to the data bus buffer 722, and this data is written to the control register 23. Then, the switching signal from the control register 23 is outputted to the switching rigid connection 16, and the terminals 16& and 16'b are electrically connected and switched to the transmitting koji.
A designation signal C8I designating the q direct 1 circuit 2S is output,
As a result, electronic register la is set to the transmitting state.

Next, parallel transmission data for predetermined bits is output from the CPU 17, and this transmission data is transferred to the data bus buffer 22.
, and are manually input to the parallel-to-serial conversion circuit 25 via the transmission data register 24.The parallel-to-serial conversion circuit 25 converts the manually input parallel transmission data into a binary coded-serial transmission as shown in FIG. 4(2). The data is sequentially outputted to the switching path 27. Then, since the switching 1 path 27 conducts the switch only when the input transmission data is in the 1'' state, during this conductive state, the high frequency signal output from the oscillation circuit 28 is transmitted to the amplifier circuit 29 and the switching circuit 27. is sent to the switching circuit 16 via the terminal 16klq16m of the switching circuit 16 as shown in Fig.
The high frequency signals are applied to the secondary coils of the transformer IS. By the way, the transformer 15 is shown in Fig. 4C)
Since a commercial AC voltage is applied as shown in FIG. 2, the high frequency g! Condensation f13 as shown in j14 [))
．． 14, and this superimposed high frequency signal is sent to the power cord 35, the bladder, and the commercial AC power f7gL.
are sent to the host combiator via the respective host combinators.

Next, a case will be described in which a transmission signal as shown in the fourth WI (b) sent from the host combinator via the tiM AC'IK line of force is received. In this case, C.P.
The operation data outputted from U17 passes through the data bus buffer 22 and the control register 23, and switches the terminal 16 of the switching circuit l to the terminal 16 side, and also performs the 1 straight-to-parallel conversion path 2. specify. As a result, the commercial AC voltage on which the high frequency signal inputted via the commercial AC power 11L is superimposed is converted to a capacitor. 13.14, Transformer 1! .

The input to the filter 3 is via the respective switching path 16. The filter 30 cuts off the commercial AC voltage and outputs a high frequency signal to the amplifier circuit 31 as shown in the 41st line. Increase circuit 3
1 is the input high frequency fr1 as shown in il+gF)
The signal is amplified and output to the rectifier path 32. The rectifier circuit 32 rectifies the amplified high-frequency signal as shown in the fourth section and outputs it to the waveform shaping circuit 33, where the waveform-shaped signal is converted into a binary series signal as shown in the diagram. It is output to the serial-parallel conversion circuit 26 as received data. When a certain amount of received data is stored, this stored data is sent to the received data register 34, and further inputted to the CPU 17 via the data bus buffer 22, where predetermined processing is performed.

In the above embodiments, the present invention is applied to an electronic register, but the present invention is not limited to this and can be applied to electronic equipment used for transmitting digital data. The switching circuit is turned on and off according to the serial transmission data, and the high-frequency signal output from the oscillation circuit when conduction is superimposed on the AC voltage of the commercial power line. Therefore, the binary series data can be transmitted using the commercial AC power line. can be transmitted. Therefore, even when transmitting data to other electronic devices, there is no need for special wiring work, so there is an advantage that construction costs, material costs, etc. can be saved. Another advantage is that data can be transmitted at the same time as electronic equipment is installed.

[Brief explanation of the drawing]

Figure 1 is a wiring state diagram of the in-line system of a conventional electronic register, Figure J112 is a wiring diagram of the in-line system of this invention, and Figure #I3 is a schematic system configuration diagram of this invention. is an output waveform diagram for explaining the operation. l&~lo...Electronic register, 16...
・Switching circuit, 27...Switching circuit, L・
...Commercial AC power line. Patent applicant Casio Computer Co., Ltd.

Claims (1)

[Claims] An oscillation circuit that outputs a high frequency signal, a switching circuit that conducts and cuts off according to binary series transmission data and sends out a high frequency signal from the oscillation circuit when conductive, and a switching circuit that converts the frequency signal to be output from this switching circuit. A pulse code transmission method comprising means for superimposing the AC voltage on an AC power line for use.