JPS58147123A - 半導体層のエツチング処理方法 - Google Patents

半導体層のエツチング処理方法

Info

Publication number
JPS58147123A
JPS58147123A JP57030293A JP3029382A JPS58147123A JP S58147123 A JPS58147123 A JP S58147123A JP 57030293 A JP57030293 A JP 57030293A JP 3029382 A JP3029382 A JP 3029382A JP S58147123 A JPS58147123 A JP S58147123A
Authority
JP
Japan
Prior art keywords
electrode
semiconductor layer
threshold voltage
gate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57030293A
Other languages
English (en)
Japanese (ja)
Other versions
JPH023295B2 (en:Method
Inventor
Yasumi Hikosaka
康己 彦坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57030293A priority Critical patent/JPS58147123A/ja
Publication of JPS58147123A publication Critical patent/JPS58147123A/ja
Publication of JPH023295B2 publication Critical patent/JPH023295B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P50/246—

Landscapes

  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
JP57030293A 1982-02-26 1982-02-26 半導体層のエツチング処理方法 Granted JPS58147123A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57030293A JPS58147123A (ja) 1982-02-26 1982-02-26 半導体層のエツチング処理方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57030293A JPS58147123A (ja) 1982-02-26 1982-02-26 半導体層のエツチング処理方法

Publications (2)

Publication Number Publication Date
JPS58147123A true JPS58147123A (ja) 1983-09-01
JPH023295B2 JPH023295B2 (en:Method) 1990-01-23

Family

ID=12299679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57030293A Granted JPS58147123A (ja) 1982-02-26 1982-02-26 半導体層のエツチング処理方法

Country Status (1)

Country Link
JP (1) JPS58147123A (en:Method)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02165641A (ja) * 1988-12-20 1990-06-26 Sanyo Electric Co Ltd 電界効果トランジスタの製造方法
US7494596B2 (en) 2003-03-21 2009-02-24 Hewlett-Packard Development Company, L.P. Measurement of etching
JP2022528648A (ja) * 2019-03-29 2022-06-15 華南理工大学 リセスゲートエンハンスメントデバイスを製造するための高精度エッチング装置、及びそれを用いたエッチング方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02165641A (ja) * 1988-12-20 1990-06-26 Sanyo Electric Co Ltd 電界効果トランジスタの製造方法
US7494596B2 (en) 2003-03-21 2009-02-24 Hewlett-Packard Development Company, L.P. Measurement of etching
US8173032B2 (en) 2003-03-21 2012-05-08 Hewlett-Packard Development Company, L.P. Measurement of etching
JP2022528648A (ja) * 2019-03-29 2022-06-15 華南理工大学 リセスゲートエンハンスメントデバイスを製造するための高精度エッチング装置、及びそれを用いたエッチング方法

Also Published As

Publication number Publication date
JPH023295B2 (en:Method) 1990-01-23

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