JPS58145193A - Low temperature operating circuit board mounting structure - Google Patents

Low temperature operating circuit board mounting structure

Info

Publication number
JPS58145193A
JPS58145193A JP2964282A JP2964282A JPS58145193A JP S58145193 A JPS58145193 A JP S58145193A JP 2964282 A JP2964282 A JP 2964282A JP 2964282 A JP2964282 A JP 2964282A JP S58145193 A JPS58145193 A JP S58145193A
Authority
JP
Japan
Prior art keywords
circuit board
mounting structure
low temperature
board mounting
operating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2964282A
Other languages
Japanese (ja)
Inventor
貴志男 横内
一典 山中
亀原 伸男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2964282A priority Critical patent/JPS58145193A/en
Publication of JPS58145193A publication Critical patent/JPS58145193A/en
Pending legal-status Critical Current

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  • Mounting Of Printed Circuit Boards And The Like (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は回路基板とこれら回路基板を多数装置した筐体
の構造に関し、特に低温度に冷却して誤りなく動作させ
ることができる構造に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a circuit board and a housing in which a large number of these circuit boards are installed, and particularly to a structure that can be cooled to a low temperature and operated without error.

コンピュータなどの情報Vヌデムでは、益々高速動作が
要求され、回路の高密度化−高集積化が進められている
が、シリコン集積回路などでは材質からくる限界があっ
て、現在では微細加工技術にその活路を見い出すべく鋭
意検討がなされている。しかし、一方、上記の限界を打
破する他の方向として、極低温度に冷却すると高速動作
する回路素子が開発されており、例えばジョセフソン素
子は液体ヘリムラ(I(、e)温度(4K)において超
高速動作する素子であ如、また消費電力も非常に小さい
ことが知られている。また、最近提唱された11 E 
M T (Ejgh Elaotron Mobili
ty Transistor )は新たな動作機構をも
つ素子で、これも低温度即ち液体窒素(N2)温度(7
7K)で高速に動作する素子である。
In information devices such as computers, high-speed operation is required, and circuits are becoming more dense and highly integrated.However, silicon integrated circuits and other devices have limitations due to their materials, and currently microfabrication technology is not available. Efforts are being made to find a way out. However, on the other hand, as another direction to overcome the above-mentioned limitations, circuit elements that operate at high speed when cooled to extremely low temperatures have been developed. For example, the Josephson element is It is known that the device operates at ultra-high speed and consumes very little power.
M T (Ejgh Elaotron Mobili
ty Transistor) is an element with a new operating mechanism, which also operates at a low temperature, that is, liquid nitrogen (N2) temperature (7
This is a device that operates at high speed (7K).

とのような素子を高密度に実装して小型化した超高速コ
ンピュータが近い将来出現する可能性は大きく、そのた
め電子回路基板を低温度に保持して、信頼性高く動作さ
せることが是非必要となる。
There is a strong possibility that miniaturized ultra-high-speed computers will appear in the near future with elements such as those mounted at high density, and it is therefore essential that electronic circuit boards be kept at low temperatures to operate reliably. Become.

ところで、既存する回路基板とこれを実装する筐体は主
として室温で動作する構造として作成されているから、
激しい温度冷却に対処することができず、特に回路基板
と筐体との接続部(コネクタ)で熱収縮のため接続が外
れて動作が不能となったり、外れなくても接触抵抗が増
加して高速動作が害されることになる。
By the way, existing circuit boards and the casings in which they are mounted are designed to operate mainly at room temperature.
Unable to cope with severe temperature cooling, the connection between the circuit board and the case (connector) may become disconnected due to heat shrinkage, making it impossible to operate, or even if it does not come off, contact resistance increases. High speed operation will be impaired.

したがって、このような温度変化の大きい場合の接続法
として、以前から水銀接点法があるが、それは高速動作
のだめの微細な高密度構造とすることが難しく、また構
造が弱体で、水銀はまた有毒物でもある。
Therefore, the mercury contact method has long been used as a connection method for cases where there are large temperature changes, but it is difficult to create a fine, high-density structure for high-speed operation, the structure is weak, and mercury is also a material. It is also poisonous.

(d)  発明の目的 本発明はかような問題点を除去し、低温度で高速動作か
えられる高密度実装の回路基板とその筐体の構造を提案
するものである。
(d) Purpose of the Invention The present invention eliminates the above-mentioned problems and proposes a high-density mounting circuit board and its housing structure that can be operated at low temperatures and at high speeds.

(0)  発明の構成 その目的は、回路基板と平行する筐体の外囲板は回路基
板と比べて温度収縮の大きな材料から構成されて、且つ
四路基板が該基板に垂直な筐体外はテーパー状で、その
面上に接続リードが設けられ、更にこれを挾持する筐体
内の挾持面もテーパー状で、その挾持面に上記の接続リ
ードに対接するリード端部が設けられた回路紙板実装構
造によって達成させることができる。
(0) Structure of the Invention The object of the invention is that the outer plate of the casing parallel to the circuit board is made of a material that has a larger temperature shrinkage than the circuit board, and the four-way board is perpendicular to the outer casing plate. Circuit paper board mounting having a tapered shape, on which a connection lead is provided, a clamping surface inside the casing that clamps the lead also having a tapered shape, and a lead end facing the connection lead mentioned above is provided on the clamping surface. This can be achieved through structure.

(f)  発明の実施例 以下、図面を参照して実施例によって詳細に説明する。(f) Examples of the invention Hereinafter, embodiments will be described in detail with reference to the drawings.

第1図は本発明にか覧る回路基板1とこれを装着した筐
体2の斜視図で、回路基板1は温度収縮の小さな材料、
例えばセラミック基板で形成され、それにジョセフソン
素子又はHEMT素子等の低温動作電子部品(図示せず
)が装着されており、その両側端ITは両面テーパー状
となっている。この回路基板1はこれに垂直な筐体外囲
板8で支持され、テーパー状の基板両側に嵌合する■形
状の支持部で挾持される。篩体2の回路紙板1と平行な
外囲板4は温度収縮の大きな材料例えばテフロン板で形
成される。
FIG. 1 is a perspective view of a circuit board 1 according to the present invention and a casing 2 equipped with the circuit board 1. The circuit board 1 is made of a material with small temperature contraction.
For example, it is formed of a ceramic substrate, on which low-temperature operation electronic components (not shown) such as Josephson elements or HEMT elements are mounted, and both ends IT thereof are tapered on both sides. This circuit board 1 is supported by a housing outer plate 8 perpendicular to the circuit board 1, and is held between two-shaped support portions that fit on both sides of the tapered board. The outer envelope plate 4 of the sieve body 2, which is parallel to the circuit paper board 1, is made of a material having a large temperature shrinkage, such as a Teflon plate.

このような構造とすれば、常温で回路基板1′Fr:筺
体2に無力で投入することができるが、動作時に4K又
は77に−に冷却すれば外囲板4は収縮が大きく、回路
が;板1は収縮が小さいから支持部に大きな圧力が生じ
る。したがって、第2図に示す支持部分の断面図のよう
に、回路基板1の表面に金や銅の薄膜又は厚膜による接
続リード5を形成し、これに対接する同材質のリード端
部6を筐体2の外囲板8に設けて、接触すると低温動作
用に適した接続部が形成される。この場合、筺体2の外
囲板4の長さに比べて、回路基板lを支持する外囲板8
の回路基板間の幅は充分小さく、例えば外囲板4の長さ
を20Qにとし、回路基板間の幅を数紹程度とすれば、
外囲板8の収縮は差程問題とはならない。
With this structure, the circuit board 1'Fr can be inserted into the housing 2 at room temperature, but if it is cooled to 4K or 77 - during operation, the outer envelope 4 will shrink significantly and the circuit will be damaged. ; Since the plate 1 has a small shrinkage, a large pressure is generated on the supporting portion. Therefore, as shown in the cross-sectional view of the support part shown in FIG. 2, connection leads 5 made of a thin or thick film of gold or copper are formed on the surface of the circuit board 1, and the lead ends 6 made of the same material are formed in contact with the connection leads 5. It is provided on the outer envelope plate 8 of the housing 2 and when brought into contact forms a connection suitable for low temperature operation. In this case, compared to the length of the outer cover plate 4 of the housing 2, the outer cover plate 8 supporting the circuit board l is
The width between the circuit boards is sufficiently small, for example, if the length of the outer plate 4 is 20Q and the width between the circuit boards is about a few inches,
Shrinkage of the outer envelope plate 8 does not pose much of a problem.

第8図は回路基板1の部分平面図を示し、テーパー状側
端ITでは、接続リード5の幅を数lOμ78程度とし
て、基板面上の配線幅より広くして、接触抵抗をできる
だけ小さくする。このような回路基板1は部品素子を搭
載するためにも、低温度り基板の他に、シリコン基板、
エポキシ樹脂板などが好適である。
FIG. 8 shows a partial plan view of the circuit board 1. At the tapered side end IT, the width of the connection lead 5 is set to about several lOμ78, which is wider than the wiring width on the board surface, so that the contact resistance is made as small as possible. In order to mount component elements on such a circuit board 1, in addition to a low-temperature substrate, a silicon substrate,
An epoxy resin plate or the like is suitable.

また、大きく収縮させて接触圧を強める外囲板4は上記
のテフロンの他にナイロンが適した材料で、次表に湿度
収縮率を他の材料と比較して示しており、またこれらの
ナイロン、テフロンは急冷などの温度変化に強い材料で
もある。
In addition to the above-mentioned Teflon, nylon is a suitable material for the outer envelope plate 4, which can be greatly shrunk to strengthen the contact pressure.The table below shows the humidity shrinkage rate compared to other materials. , Teflon is also a material that is resistant to temperature changes such as rapid cooling.

(g)  発明の効果 以上の実施例の説明から判るように、本発明は低温度に
おける熱収縮を利用して接続部の接触抵抗を低下させる
構造で、しかも非常に単純な構造であるから、微細パタ
ーンを形成し、高密度回路構成に最適である。
(g) Effects of the Invention As can be seen from the description of the embodiments above, the present invention has a structure that uses thermal contraction at low temperatures to reduce the contact resistance of the connection part, and has a very simple structure. It forms fine patterns and is ideal for high-density circuit configurations.

したがって、本発明は超高速コンピュータの作Therefore, the present invention enables the operation of ultra-high-speed computers.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は回路基板と筐体との斜視図、第2図は回路基板
の支持部分の断面図、第8図は回路基板の部分平面図で
ある。図中、■は回路基板、2は篩体、3は基板に垂直
な外囲板、4は基板に平行な外囲板、5は接続リード、
6はリード端部、ITは回路基板の側端部を示す。 代理人 弁理士  松 岡 宏四部 第1図 第2閏
FIG. 1 is a perspective view of the circuit board and the casing, FIG. 2 is a sectional view of the supporting portion of the circuit board, and FIG. 8 is a partial plan view of the circuit board. In the figure, ■ is a circuit board, 2 is a sieve, 3 is an outer plate perpendicular to the board, 4 is an outer plate parallel to the board, 5 is a connection lead,
6 indicates a lead end, and IT indicates a side end of the circuit board. Agent Patent Attorney Hiroshi Matsuoka Department 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 回路基板が実装される筐体において、回路基板と平行す
る外囲板は内蔵する回路基板と比べて温度収縮の大きな
材料から構成され、且つ該回路基板が該回路基板に垂直
な筐体外囲板で両端を支持されて、該回路基板の被支持
面はテーパー状として、その面上に接続リードが設けら
れ、更にこれを挾持する筐体内の挾持面もテーパー状と
して、その挾持面に上記接続リードに対接するリード端
部が設けられたことを特徴とする低温動作用回路基板実
装構造。
In a case in which a circuit board is mounted, an outer wall plate parallel to the circuit board is made of a material that has a larger temperature shrinkage than the built-in circuit board, and the outer wall board is perpendicular to the circuit board. The supported surface of the circuit board is tapered, and connection leads are provided on that surface, and the clamping surface in the casing that clamps it is also tapered, and the connection leads are provided on the clamping surface. A circuit board mounting structure for low-temperature operation characterized by having a lead end that contacts the lead.
JP2964282A 1982-02-23 1982-02-23 Low temperature operating circuit board mounting structure Pending JPS58145193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2964282A JPS58145193A (en) 1982-02-23 1982-02-23 Low temperature operating circuit board mounting structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2964282A JPS58145193A (en) 1982-02-23 1982-02-23 Low temperature operating circuit board mounting structure

Publications (1)

Publication Number Publication Date
JPS58145193A true JPS58145193A (en) 1983-08-29

Family

ID=12281734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2964282A Pending JPS58145193A (en) 1982-02-23 1982-02-23 Low temperature operating circuit board mounting structure

Country Status (1)

Country Link
JP (1) JPS58145193A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5904952A (en) * 1987-07-15 1999-05-18 The Boc Group, Inc. Method of plasma enhanced silicon oxide deposition

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5904952A (en) * 1987-07-15 1999-05-18 The Boc Group, Inc. Method of plasma enhanced silicon oxide deposition

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