JPS58141891U - Alarm Clock - Google Patents

Alarm Clock

Info

Publication number
JPS58141891U
JPS58141891U JP3861082U JP3861082U JPS58141891U JP S58141891 U JPS58141891 U JP S58141891U JP 3861082 U JP3861082 U JP 3861082U JP 3861082 U JP3861082 U JP 3861082U JP S58141891 U JPS58141891 U JP S58141891U
Authority
JP
Japan
Prior art keywords
alarm sound
circuit
alarm
control unit
alarm clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3861082U
Other languages
Japanese (ja)
Inventor
飯田 勤
Original Assignee
カルソニックカンセイ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by カルソニックカンセイ株式会社 filed Critical カルソニックカンセイ株式会社
Priority to JP3861082U priority Critical patent/JPS58141891U/en
Publication of JPS58141891U publication Critical patent/JPS58141891U/en
Pending legal-status Critical Current

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  • Electric Clocks (AREA)
  • Electromechanical Clocks (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案目覚まし時計の実施例の構成を示すブロ
ック図、第2図はアラーム音の発生モード図である。 1・°・ベースユニット、2.3・・・アラーム音制御
ユニット、4・・・計時部、5・・・発振回路、6・・
・分周回路、7・・・計数回路、8・・・切換回路、9
・・・脆憶回路、10・・・アラーム入力器、11・・
・表示部、12・・・デコーダ、13・・・ドライバ、
14・・・デジタル表示器、15・・・−数構出回路、
16・・・ナントゲート、1 17乃至19・・・アン
ドゲート、20・・・アラーム音停止スイッチ、21・
・・アラーム音発生回路、22・・・電圧利得制御型ア
ンプ、23・・・ブザー、24・・・標準電圧源、25
.26・・・ダイオード、27゜28・・・1/2分周
回路、29・・・インターバル設定スイッチ、30・・
・計数回路、31・・・D/A変換回路。
FIG. 1 is a block diagram showing the configuration of an embodiment of the alarm clock of the present invention, and FIG. 2 is a diagram showing the generation mode of the alarm sound. 1.° Base unit, 2.3 Alarm sound control unit, 4 Timing section, 5 Oscillation circuit, 6.
・Frequency dividing circuit, 7... Counting circuit, 8... Switching circuit, 9
...Brittle memory circuit, 10...Alarm input device, 11...
・Display unit, 12...decoder, 13...driver,
14...Digital display, 15...-number configuration circuit,
16... Nantes gate, 1 17 to 19... And gate, 20... Alarm sound stop switch, 21.
...Alarm sound generation circuit, 22...Voltage gain control type amplifier, 23...Buzzer, 24...Standard voltage source, 25
.. 26...Diode, 27°28...1/2 frequency divider circuit, 29...Interval setting switch, 30...
- Counting circuit, 31...D/A conversion circuit.

Claims (4)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)アラーム音の発生モードを制御する制御信号を発
する制御回路27.28又は30.31を備えたアラー
ム音制御ユニット2又は3が着脱自在に接続しうる端子
T□、T2又はT3.T4を有し、かつ該端子に前記ア
ラーム音制御ユニット2又は3が接続されていないとき
に固有のモードでアラーム音を発生するアラーム音発生
回路21を有することを特徴とする目覚まし時計。
(1) Terminal T□, T2 or T3 to which the alarm sound control unit 2 or 3 equipped with the control circuit 27.28 or 30.31 that emits a control signal for controlling the alarm sound generation mode can be detachably connected. An alarm clock characterized in that it has an alarm sound generation circuit 21 which has a timer T4 and generates an alarm sound in a specific mode when the alarm sound control unit 2 or 3 is not connected to the terminal.
(2)前記アラーム音発生回路21は、−足音量でかつ
継続的にアラーム音を発生する回路であることを特徴と
する実用新案登録請求の範囲第1項記載の目覚まし時計
(2) The alarm clock according to claim 1, wherein the alarm sound generation circuit 21 is a circuit that continuously generates an alarm sound at -foot volume.
(3)前記アーム音制御ユニット2の制御回路27゜2
8は、アラーム音を所定の断続比で断続させる制御信号
を発する回路であることを特徴とする実用新案登録請求
の範囲第2項記載の目覚まし時計。
(3) Control circuit 27°2 of the arm sound control unit 2
The alarm clock according to claim 2, wherein 8 is a circuit that generates a control signal to intermittent the alarm sound at a predetermined intermittent ratio.
(4)前記アラーム音制御ユニット3の制御回路30.
31は、アラーム音の音量を漸次増大させる制御信号を
発する回路であることを特徴とする実用新案登録請求の
範囲第2項記載の目覚まし時計。
(4) Control circuit 30 of the alarm sound control unit 3.
The alarm clock according to claim 2, wherein 31 is a circuit that issues a control signal to gradually increase the volume of the alarm sound.
JP3861082U 1982-03-18 1982-03-18 Alarm Clock Pending JPS58141891U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3861082U JPS58141891U (en) 1982-03-18 1982-03-18 Alarm Clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3861082U JPS58141891U (en) 1982-03-18 1982-03-18 Alarm Clock

Publications (1)

Publication Number Publication Date
JPS58141891U true JPS58141891U (en) 1983-09-24

Family

ID=30049940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3861082U Pending JPS58141891U (en) 1982-03-18 1982-03-18 Alarm Clock

Country Status (1)

Country Link
JP (1) JPS58141891U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5393065A (en) * 1977-01-26 1978-08-15 Seiko Instr & Electronics Ltd Electronic watch with alarm
JPS55134900A (en) * 1979-04-06 1980-10-21 Matsushita Electric Works Ltd Speaking apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5393065A (en) * 1977-01-26 1978-08-15 Seiko Instr & Electronics Ltd Electronic watch with alarm
JPS55134900A (en) * 1979-04-06 1980-10-21 Matsushita Electric Works Ltd Speaking apparatus

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