JPS58167491U - alarm clock - Google Patents

alarm clock

Info

Publication number
JPS58167491U
JPS58167491U JP6491682U JP6491682U JPS58167491U JP S58167491 U JPS58167491 U JP S58167491U JP 6491682 U JP6491682 U JP 6491682U JP 6491682 U JP6491682 U JP 6491682U JP S58167491 U JPS58167491 U JP S58167491U
Authority
JP
Japan
Prior art keywords
alarm
switch
alarm clock
generating means
sound generating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6491682U
Other languages
Japanese (ja)
Other versions
JPS6216707Y2 (en
Inventor
健二 奥山
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP6491682U priority Critical patent/JPS58167491U/en
Publication of JPS58167491U publication Critical patent/JPS58167491U/en
Application granted granted Critical
Publication of JPS6216707Y2 publication Critical patent/JPS6216707Y2/ja
Granted legal-status Critical Current

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  • Electric Clocks (AREA)
  • Electromechanical Clocks (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来例のブロック回路図、第２図は本考案の一
実施例のブロック回路図である。 Ａは時計本体、１はアラームスイッチ、２はセットスイ
ッチ、３は音声合成ＩＣ，４はスピーカ、５は微分回路
、６．７は遅延回路である。FIG. 1 is a block circuit diagram of a conventional example, and FIG. 2 is a block circuit diagram of an embodiment of the present invention. A is a watch body, 1 is an alarm switch, 2 is a set switch, 3 is a voice synthesis IC, 4 is a speaker, 5 is a differentiation circuit, and 6.7 is a delay circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 現在時刻を計時表示する時計本体と、現在時刻と目覚設
定時刻とが一致したときにオンになるアラームスイッチ
と、アラーム動作を行なうか否かを選択するセットスイ
ッチとを有し、アラームスイッチとセットスイッチの一
端同士を接続し、セットスイッチの他端を電源に接続し
、アラームスイッチの他端を遅延回路を介してアラーム
音発生手段に接続し、セットスイッチの上記一端を微分
回路を介してセット確認音発生手段に接続して成る目覚
時計。It has a clock body that measures and displays the current time, an alarm switch that turns on when the current time and the alarm setting time match, and a set switch that selects whether or not to perform an alarm operation. One end of the switch is connected, the other end of the set switch is connected to a power source, the other end of the alarm switch is connected to an alarm sound generating means via a delay circuit, and the above one end of the set switch is set via a differential circuit. An alarm clock connected to a confirmation sound generating means.
JP6491682U 1982-04-30 1982-04-30 alarm clock Granted JPS58167491U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6491682U JPS58167491U (en) 1982-04-30 1982-04-30 alarm clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6491682U JPS58167491U (en) 1982-04-30 1982-04-30 alarm clock

Publications (2)

Publication Number Publication Date
JPS58167491U true JPS58167491U (en) 1983-11-08
JPS6216707Y2 JPS6216707Y2 (en) 1987-04-27

Family

ID=30074926

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6491682U Granted JPS58167491U (en) 1982-04-30 1982-04-30 alarm clock

Country Status (1)

Country Link
JP (1) JPS58167491U (en)

Also Published As

Publication number Publication date
JPS6216707Y2 (en) 1987-04-27

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