JPS58141472A - Speed control signal generating circuit for magnetic head - Google Patents

Speed control signal generating circuit for magnetic head

Info

Publication number
JPS58141472A
JPS58141472A JP57024002A JP2400282A JPS58141472A JP S58141472 A JPS58141472 A JP S58141472A JP 57024002 A JP57024002 A JP 57024002A JP 2400282 A JP2400282 A JP 2400282A JP S58141472 A JPS58141472 A JP S58141472A
Authority
JP
Japan
Prior art keywords
magnetic head
integrator
converter
output
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57024002A
Other languages
Japanese (ja)
Inventor
Yoichiro Taki
滝 陽一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57024002A priority Critical patent/JPS58141472A/en
Publication of JPS58141472A publication Critical patent/JPS58141472A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/48Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
    • G11B5/54Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head into or out of its operative position or across tracks
    • G11B5/55Track change, selection or acquisition by displacement of the head
    • G11B5/5521Track change, selection or acquisition by displacement of the head across disk tracks
    • G11B5/5526Control therefor; circuits, track configurations or relative disposition of servo-information transducers and servo-information tracks for control thereof

Landscapes

  • Moving Of Head For Track Selection And Changing (AREA)
  • Control Of Position Or Direction (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

PURPOSE:To keep the output amplitude of an integrator constant to prevent the increment of the access time or the degradation of the transition response after arrival to a target cylinder, by applying a compensating voltage corresponding to the position of a magnetic head to the integrator. CONSTITUTION:An integrator 7 consists of an integrating circuit 24 and an integrating capcitor 25 and is provided with a switch 17 which short-circuits the integrating capacitor 25. A counter 21 generates an output signal indicating the current position of the magnetic head even during movement of the magnetic head, and this output signal is applied to a PROM 22. Data obtained by converting a value, which is proportional to a required compensation quantity corresponding to the position of the magnetic head, to a binary is written in the PROM 22, and the output is supplied to a DA converter 23. This DA converter 23 converts the input signal to an analog voltage to generate the correcting voltage, and this voltage is inputted to the integrating circuit 24 together with a speed signal 16.

Description

【発明の詳細な説明】 本発明は磁気ディスク装置の磁気ヘッド速度制御回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic head speed control circuit for a magnetic disk device.

磁気ディスクの磁気ヘッドの位置決め回路状磁気ヘッド
を必要な位置へ移動する際、磁気ヘッドを所定の速度ま
で加速し九俵、減速するように制御している。減速時の
速度は予め定められた基準速度に従うが、この丸めの基
準速度信号は、第1図に示すようにディ7アレンスレジ
スタIK移動すべきトラック数nがセットされ死後、磁
気ヘッドが1トラック通過するたびは1個発生するシリ
ンダパルスによす減算される。ディファレンスレジスタ
の出力は比較器2によつて予め設定された数値Nと比較
される。ディ7アレンスレジメタ出力が数値Nよシ大き
い場合は!ルチプレクt3は當に一定の値Nを選び、デ
ィ7アレンスレジスタ出力がN以下の場合はディファレ
ンスレジスタ出力そのものを選びDA*換器4へ送る。
Positioning of the magnetic head of a magnetic disk When moving the circuit-like magnetic head to a required position, the magnetic head is controlled to be accelerated to a predetermined speed and then decelerated by 9 degrees. The speed during deceleration follows a predetermined reference speed, but this rounded reference speed signal is determined by the number n of tracks to be moved in the deviation register IK as shown in FIG. Each time it passes, it is subtracted by one cylinder pulse. The output of the difference register is compared with a preset value N by a comparator 2. If the D7 arrangement register output is larger than the numerical value N! The multiplexer t3 selects a constant value N, and when the differential register output is less than N, selects the differential register output itself and sends it to the DA* converter 4.

DA賓換器はこれを第2図に示す様な階段状のアナログ
電圧lOに変換する。積分器7には速度信号5とすセッ
ト信号6が加えられる。リセット信号線、ディファレン
スレジスタ出力nがNよシ大きい場合は、常圧リセット
状態であシ、出力nがN以下の場合はシリンダパルスが
加えられシリンダパルスによって積分器がリセットされ
るので積分器出力は第2図に示す様な鋸歯状波形11と
なる。加算器8はDム変換−4の出力から積分器7の出
力が引算され第2図に示すように磁気ヘッドの移動と共
に滑らかに減少する出力信号12を出力端子9に発生す
る。この出力信号は更に非線形回路(E示せず)K加え
られ、磁気ヘッドの移動と共に目標トラックまでの距離
のほぼ平方根に比例して減少する速度基準信号になる。
The DA converter converts this into a stepped analog voltage lO as shown in FIG. A speed signal 5 and a set signal 6 are applied to the integrator 7. Reset signal line, difference register If the output n is larger than N, it is a normal pressure reset state, and if the output n is less than N, a cylinder pulse is added and the integrator is reset by the cylinder pulse, so the integrator The output becomes a sawtooth waveform 11 as shown in FIG. The adder 8 subtracts the output of the integrator 7 from the output of the Dm transform-4, and generates at the output terminal 9 an output signal 12 that smoothly decreases as the magnetic head moves as shown in FIG. This output signal is further applied to a non-linear circuit (not shown) to form a velocity reference signal which decreases as the magnetic head moves in proportion to approximately the square root of the distance to the target track.

ここで積分器は入力が速度信号であるので、磁気ヘッド
の移動量に比例した出力が生じるが、シリンダパルスに
よりて1トラック通過毎にリセットされる。この積分器
はシリンダパルスのパルス幅が1トラック通過時間に比
して十分小さければトラック間隔に比例する出力信号を
生ずる。また、積分器嬬トツック間隔が通常一定である
場合に積分器出力O包絡4113が1lIIt3HK示
す様に常に一定となるが、速度信号を得るのに電子ター
メーメと呼ばれる方式を用い九場合に種々のパラメータ
の位置による変動によって積分器出力振幅14が第3図
の様に変化する。仁の電子タコメータは、サーボ面と呼
ばれる位置決めの丸めの情報が予め書込まれえディスク
面を有する磁気ディスク装置において、サーボ面からの
読み出し信号を復調して得られる位置信号を微分し良信
号と、磁気ヘッドを移動させゐ丸めのボイス;イルモー
メを流れる電流値に比例し良信号とから速度信号を得る
方式で当分野では良く知られ良技術である。この鳩舎位
置信号は磁気ヘッドの移動と共に三角波形状に変化する
。この位置信号の磁気ヘッド変位に対する傾きおよび、
ボイスコイルモータの力定数は種々の原因によ如磁気ヘ
ッドの位置によって変化し従って速度信号がII!際の
速度に完全に比例しなくな〉、速度信号を入力とする積
分器の出力振幅が一定でなくなる。4IK積分器出力振
輻14が第3図に示す橡に目標シリンダ付近で増大すゐ
と速度基準信号が低下する丸めにアクセスタイムが長く
なシ、逆に目標シリンダ付近で減少すると速度基準信号
が増大し目標シリンダ到達後の過液応答が単化する。
Here, since the input to the integrator is a speed signal, an output proportional to the amount of movement of the magnetic head is generated, but the integrator is reset every time one track passes by the cylinder pulse. This integrator produces an output signal proportional to the track spacing if the pulse width of the cylinder pulse is sufficiently small compared to the one-track transit time. In addition, when the integrator toggle interval is normally constant, the integrator output O envelope 4113 is always constant as shown in 1lIIt3HK, but in some cases, a method called an electronic termimeter is used to obtain the speed signal, and various parameters are used. The integrator output amplitude 14 changes as shown in FIG. 3 due to variations in position. Jin's electronic tachometer uses a magnetic disk device that has a disk surface called a servo surface on which positioning rounding information is written in advance, and differentiates the position signal obtained by demodulating the read signal from the servo surface to determine a good signal. This method is well known in the art and is a good technique to obtain a speed signal from a rounded voice by moving a magnetic head; This pigeon coop position signal changes into a triangular waveform as the magnetic head moves. The slope of this position signal with respect to the magnetic head displacement and
The force constant of the voice coil motor changes with the position of the magnetic head due to various causes, and therefore the speed signal II! The output amplitude of the integrator that receives the speed signal as input is no longer constant. If the 4IK integrator output amplitude 14 increases as shown in Fig. 3 near the target cylinder, the speed reference signal will decrease, and the access time will become longer; conversely, if it decreases near the target cylinder, the speed reference signal will decrease. This increases, and the excessive fluid response becomes simple after reaching the target cylinder.

本発明は磁気ヘッドの位置に応じて補正電圧を積分器に
加えて積分器出力振幅を一定に保つ仁とにより上記欠点
をなくシ、種々のバフメータの位置による変動によらな
埴安定か磁気ヘッド速度制御回路を提供するものである
The present invention eliminates the above-mentioned drawbacks by applying a correction voltage to the integrator according to the position of the magnetic head to keep the integrator output amplitude constant. A speed control circuit is provided.

本発明によれば、磁気ヘッドの現在位置と目標位置との
差の信号をDA変換するDA変換器と、磁気ヘッドが1
トラック通過毎に鋸歯状波形を発生すゐ積分器と、前記
DA変換器の出力信号と前記積分器の出力信号とを加算
する加算器とを有し、前記加算器の出力信号を速度信号
とする磁気ヘッドの速度制御信号発生回路において、磁
気ヘッドの位置を示すカウンタと、位置に対応した補正
量を予め書込んだプログラマブル・リードオンリ争メモ
リと、諌リード・オンリメモリからの補正量を補正電圧
に変換する他ODA変換器とを有し、前記他のDA変換
器からの補正電圧を前記積分器に供給するようKしたこ
とを特徴とする磁気ヘッドの速度制御信号発生回路が得
られる。
According to the present invention, a DA converter that converts a signal of the difference between the current position and a target position of the magnetic head, and a
It has an integrator that generates a sawtooth waveform every time a track passes, and an adder that adds the output signal of the DA converter and the output signal of the integrator, and the output signal of the adder is used as a speed signal. In the speed control signal generation circuit for the magnetic head, there is a counter that indicates the position of the magnetic head, a programmable read-only memory in which a correction amount corresponding to the position is written in advance, and a correction voltage that outputs the correction amount from the read-only memory. There is obtained a magnetic head speed control signal generating circuit characterized in that it has a second ODA converter for converting the second ODA converter into an ODA converter, and is configured to supply a correction voltage from the other DA converter to the integrator.

次に本発明の一実施例について図面を参照して説明する
。本発明の一実施例は第1WJK示す磁気ヘッドの速度
制御信号発生回路とはぼ同一であゐので、その詳細な説
明を省略するが、前述のように第1tlK示す積分器7
に補正電圧を供給し、積分器出力振幅を一定に保つよう
にした4のでToゐ。
Next, an embodiment of the present invention will be described with reference to the drawings. One embodiment of the present invention is almost the same as the speed control signal generation circuit for the magnetic head shown in the first WJK, so a detailed explanation thereof will be omitted.
A correction voltage is supplied to keep the integrator output amplitude constant.

第411は本発明の一実施例における要部を示す。No. 411 shows a main part in an embodiment of the present invention.

第41g1において、積分器7は積分囲路J4と積分コ
ンテンt25とが設けられ、更に積分コンデンサ25を
短絡すゐスイッチ17が設けられている。
At No. 41g1, the integrator 7 is provided with an integration circuit J4 and an integration content t25, and is further provided with a switch 17 that short-circuits the integration capacitor 25.

一方カウンタ21はシリンダパルス18が供給すれゐが
、磁気ヘッドの移動方向に応じて論理信号191九は2
0が加えられ、ひとつの方向に移動する場合は加算され
、逆方向に移動する場合は減算される。カウンタ21は
磁気ヘッドの移動中においてもその時の磁気ヘッドの位
置を示す出力信号を発生しPROMzz K加えられる
。FROM22は磁気ヘッドの位置に対応した必要な補
正量に比例した値を2進数に換算したデータが書込まれ
てシシ、その出力をDム変換器23に供給する。この9
人変換器23は入力信号をアナログ電圧に変換して補正
電圧を発生し積分回路24に速度信号16と共に入力す
る。積分器7には更にリセット信号15が加えられスイ
ッチ17を閉じることによ如積分コンデンt25を短絡
して積分回路24にリセットする。この様に磁気ヘッド
の位置に応じた補正電圧を速度信号と共に積分器に加え
るととKよシ、第3図に示すIIK積分器出力の振幅1
3を一定にすることができる。
On the other hand, the counter 21 is supplied with the cylinder pulse 18, but the logic signal 1919 is 2 depending on the moving direction of the magnetic head.
0 is added, if moving in one direction it is added, and if moving in the opposite direction it is subtracted. Even when the magnetic head is moving, the counter 21 generates an output signal indicating the current position of the magnetic head and is applied to the PROMzz K. The FROM 22 is written with data obtained by converting a value proportional to the necessary correction amount corresponding to the position of the magnetic head into a binary number, and supplies its output to the DRAM converter 23. This 9
The human converter 23 converts the input signal into an analog voltage, generates a correction voltage, and inputs it to the integration circuit 24 together with the speed signal 16. A reset signal 15 is further applied to the integrator 7, and by closing the switch 17, the integration capacitor t25 is short-circuited and the integration circuit 24 is reset. In this way, if a correction voltage corresponding to the position of the magnetic head is applied to the integrator along with the speed signal, the amplitude of the IIK integrator output shown in FIG.
3 can be kept constant.

本発明は以上説明した様に積分器に磁気ヘッドの位置に
応じた補正電圧を加えることによ妙積分畳出力振幅を一
定に保ちアクセスタイムの増加あるいは目標シリンダ到
達後の過渡応答の悪化を防ぐ効果がある。
As explained above, the present invention maintains a constant integral output amplitude by applying a correction voltage to the integrator according to the position of the magnetic head, thereby preventing an increase in access time or deterioration of transient response after reaching the target cylinder. effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は速度基準信号発生回路の一部を表すプ關ツク図
、第2図は第1図のブーツク図の各部の出力波形、第3
図は積分器出力信号の包路線を示す図、第4図は本発明
のs麹例における主要部を示す図である。
Figure 1 is a boot diagram showing a part of the speed reference signal generation circuit, Figure 2 is the output waveform of each part of the boot diagram in Figure 1, and Figure 3 is a boot diagram showing a part of the speed reference signal generation circuit.
The figure shows the envelope line of the integrator output signal, and FIG. 4 shows the main parts of the s-koji example of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 磁気ヘッドの現在位置と目標位置との差信号をDA変換
するDA変換器と、磁気ヘッドが1トラック通過毎に鋸
歯状波形を発生する積分器と、前記DA変換器の出力信
号と前#2積分器の出力信号とを加算する加算器とを有
し、前記加算器の出力信号を速度信号をする磁気ヘッド
の速度制御信号発生回路において、磁気ヘッドの位置を
示すカウンタと、位置に対応した補正量を予め誓込んだ
プロゲラ!プル・リードオンリ・メモリと、該リード・
オンリ・メモリからの補正量を補正電圧に変換する他の
L)A変換器とを有し、前記他ODA変換器からの補正
電圧を前記積分器に供給するようにしたことを特徴とす
る磁気ヘッドの速度制御信号発生直結。
A DA converter that converts the difference signal between the current position and the target position of the magnetic head into a DA converter, an integrator that generates a sawtooth waveform every time the magnetic head passes one track, and an output signal of the DA converter and the front #2. A magnetic head speed control signal generation circuit that includes an adder that adds the output signal of the integrator and the output signal of the adder as a speed signal, and a counter that indicates the position of the magnetic head, and a counter that corresponds to the position. Progera that promised the amount of correction in advance! Pull read-only memory and the read-only memory
and another L)A converter that converts the correction amount from the only memory into a correction voltage, and the correction voltage from the other ODA converter is supplied to the integrator. Directly connected to head speed control signal generation.
JP57024002A 1982-02-17 1982-02-17 Speed control signal generating circuit for magnetic head Pending JPS58141472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57024002A JPS58141472A (en) 1982-02-17 1982-02-17 Speed control signal generating circuit for magnetic head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57024002A JPS58141472A (en) 1982-02-17 1982-02-17 Speed control signal generating circuit for magnetic head

Publications (1)

Publication Number Publication Date
JPS58141472A true JPS58141472A (en) 1983-08-22

Family

ID=12126355

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57024002A Pending JPS58141472A (en) 1982-02-17 1982-02-17 Speed control signal generating circuit for magnetic head

Country Status (1)

Country Link
JP (1) JPS58141472A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6198176A (en) * 1984-10-17 1986-05-16 Matsushita Electric Ind Co Ltd Motor controller
US4748607A (en) * 1985-07-11 1988-05-31 Kabushiki Kaisha Toshiba Track accessing system using an integrated velocity signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6198176A (en) * 1984-10-17 1986-05-16 Matsushita Electric Ind Co Ltd Motor controller
US4748607A (en) * 1985-07-11 1988-05-31 Kabushiki Kaisha Toshiba Track accessing system using an integrated velocity signal

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