JPS60169226A - Offset adjustment circuit of operational amplifier - Google Patents

Abstract

PURPOSE:To adjust automatically an offset amount generated at an output of an operational amplfier having a nonlinear feedback circuit by digitizing an offset to form a correcting analog signal. CONSTITUTION:When an output of a DA converter 20 is zero, an output of a voltage comparator 12 goes to a high level by a current flowing to a resistor 8. A clock signal 15 passes through an AND gate 16, is fed to a binary counter 19, and when the counter counts up, an output of the DA conerter 20 increases gradually, an output of an operational amplifier 9 also increases and the polarity of the output is changed. The output of the voltage comparator 12 changes from a high level to a low level, the gate 16 is closed and an output of the DA converter 20 is obtained according to a value stored in the binary counter to complete the offset adjustment operation.

Description

TECHNICAL FIELD The present invention relates to an operational amplifier offset adjustment circuit, and more particularly to an operational amplifier offset adjustment circuit suitable for use in a magnetic head speed reference signal generation circuit of a magnetic disk device.

In conventional magnetic disk drives, the speed of the magnetic head during deceleration is reduced in accordance with a constant speed reference signal in order to move the magnetic head to the target track in the shortest possible time. The velocity reference signal varies according to a curve similar to a square root curve for an input signal proportional to the distance to the target track, as shown in FIG.

This input signal proportional to the distance to the target track is generated by a counter called a difference register and a DA (digital-to-analog) converter that converts its output into an analog signal.

After the number of tracks to be moved is set, the difference register registers one value each time the magnetic head passes one track.
This is subtracted by the cylinder pulses generated one by one.

Conventionally, as a speed reference signal generation circuit, a circuit in which a nonlinear circuit 4 is connected to a feedback circuit of an operational amplifier 3 as shown in Fig. 2 has been used, but since the output signal is required to have characteristics similar to a square root curve. In addition, in the region where the output voltage is small, the equivalent impedance of the nonlinear circuit 40 connected to the feedback circuit increases, so an offset voltage is generated at the output due to the input offset voltage of the operational amplifier, and the accuracy of the speed reference signal near the target cylinder is reduced. As a result, the transient response during positioning after reaching the target cylinder deteriorates, so it was necessary to adjust the output offset voltage to zero using a variable resistor 2 as shown in FIG. Furthermore, 1 is DA
A converter is shown.

OBJECTS OF THE INVENTION An object of the present invention is to provide an operational amplifier offset adjustment circuit that can automatically adjust the offset generated in the output of an operational amplifier having a nonlinear feedback circuit, thereby eliminating the need for offset adjustment using a variable resistor. It is said that

Structure of the Invention The operational amplifier offset adjustment circuit according to the present invention has a D-
An offset adjustment circuit for an operational amplifier which takes the output of an A converter as an input and has a non-linear feedback circuit, the circuit comprising means for comparing the output of the operational amplifier with a reference level and generating a gate signal while the output is small; It has means for gating clock pulses by a gate signal, and digital-to-analog conversion means for generating an analog output according to the number of gated clock pulses, and supplies the output of this digital-to-analog conversion means to the input of an operational amplifier. The structure is as follows.

Embodiments of the present invention will be described below using the circuit shown in FIG. In the figure, a binary number corresponding to the number of tracks in the target track 1 is input to an input terminal 5, and the output of a current output type DA converter 6 is applied to an operational amplifier 9 whose feedback circuit is connected to a nonlinear circuit 10. . The signal at the output 11 of this operational amplifier 9 is applied to a voltage comparator 12, and its output 13
is applied to AND gate 16. A gate signal 14 and a clock signal 15 having a constant period are inputted from the outside together with the voltage comparator output 13 to the AND gate 16 , and its output 17 is added to the binary counter 19 .

In addition to the gate output 17, a reset signal 18 is applied to the binary counter 19, and the output thereof is converted into a current signal by a second current output type DA converter 20 and applied to the operational amplifier 9. The input of operational amplifier 9 is still connected to positive power supply 7 via resistor 8 .

The offset adjustment operation is performed when the binary number input to the input terminal 5 of the DA converter 6 is zero.

Like the DA converter 6, the DA converter 20 is of a sink current output type, and when the output data of the binary counter 19 is zero, the output current is zero, and when the output data is maximum, it generates the maximum output current. The value of the resistor 8 is such that the current flowing from the positive power supply 7 through the resistor 8 is 1/1 of the output current of the DA converter 20.
chosen to be equal to 2.

The operation of the circuit shown in FIG. 3 will be described with reference to the operation waveforms of each part shown in FIG. First, the binary counter 19 is activated by the reset signal 18.
When the DA converter 20 is reset, the output current of the DA converter 20 becomes zero, so the operational amplifier 9 generates a negative output voltage due to the current passing through the resistor 8. The output of the voltage comparator 12 is the operational amplifier 9
When the output of is negative polarity... it becomes level. Next, when the gate signal 14 from the outside goes to the high level, the clock signal 15 is applied to the binary counter 19 through the AND gate 16, and the counter is counted up. As the contents of the counter are added, the output of the DA converter 20 gradually increases as shown in FIG. 4, and the output of the operational amplifier 9 also increases accordingly, and the polarity changes from zero to positive. . At this time, the output of the voltage comparator 12 changes from high level to low level, so that the clock signal 15 is no longer applied to the binary counter 19, and the counter holds the current count number. After a certain period of time, the gate signal 14 becomes low level and the offset adjustment operation is completed.

Although the above description is about the offset adjustment circuit of the operational amplifier in the speed reference signal generation circuit of the magnetic head, the same applies to any operational amplifier that inputs the output of a DA converter and has a nonlinear circuit in its feedback section. Of course.

Effects of the Invention As described above, according to the present invention, it is possible to automatically adjust the offset of an operational amplifier with an extremely simple configuration, which eliminates the need for adjustment using a variable resistor as in the past, resulting in cost reduction. be.

[Brief explanation of the drawing]

FIG. 1 is an input/output characteristic diagram of a speed reference signal generation circuit, FIG. 2 is a block diagram of a conventional speed reference signal generation circuit, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. 4 is a block diagram of a conventional speed reference signal generation circuit. FIG. 3 is a waveform diagram of signals at each part of the block diagram in the figure. Explanation of symbols of main parts 6.20... DA converter 9... Operational amplifier 10.
...Nonlinear circuit 12...Comparator 16...Gate 1
9... Counter applicant NEC Corporation agent Patent attorney Yanagawa Input Hair 2 Figure 10V Figure 23 Figure 4

Claims (1)

[Claims] An offset adjustment circuit for an operational amplifier which takes an output of a digital-to-analog converter as an input and has a nonlinear feedback circuit, the circuit comprising means for comparing the output of the operational amplifier with a reference level and generating a gate signal while the output is small. , and digital-to-analog conversion means for generating an analog output according to the number of clock pulses according to the gate signal, and the output of the digital-to-analog conversion means is supplied to the input of the operational amplifier. Offcent adjustment circuit.