JPS58138142U

JPS58138142U - display device

Info

Publication number: JPS58138142U
Application number: JP3238482U
Authority: JP
Inventors: 鈴木　卓二
Original assignee: 株式会社富士通ゼネラル
Priority date: 1982-03-08
Filing date: 1982-03-08
Publication date: 1983-09-17

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は本考案による表示装置の一実施例を示すブロッ
ク図、第２図はフローチャートである。１・・・アドレスバスライン、２・・・データバスライ
ン、３・・・表示メモリブロック、３１，３゜〜３．．
・・・表示メモリブロック、４．、　４゜〜匂・・・第
１のアドレスデコーダ、５□、５□〜５ｎ・・・第２の
アドレスデコーダ、６１．　６゜〜６ｎ・・・セレクタ
、７・・・表示回路。FIG. 1 is a block diagram showing an embodiment of a display device according to the present invention, and FIG. 2 is a flow chart. 1...Address bus line, 2...Data bus line, 3...Display memory block, 31,3°~3. ．．
...display memory block, 4. , 4°~Oi...first address decoder, 5□, 5□~5n...second address decoder, 61. 6°~6n...Selector, 7...Display circuit.

Claims

[Claims for Utility Model Registration] A display circuit, a display memory block that stores display data displayed by the display circuit, and a designation for the display data to occupy an arbitrary address in the memory space of the display memory block. a plurality of first address decoders for selecting the first address decoders, selectors each forming a pair with the first address decoders, and a second address decoder coupled separately to each selector for selecting each selector. A display device characterized by: